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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / arch / powerpc / perf / power7-events-list.h
blob6c2b7066490b305af149bd138afb0d355c1bcc64
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Performance counter support for POWER7 processors.
4 *
5 * Copyright 2013 Runzhen Wang, IBM Corporation.
6 */
7
8 EVENT(PM_IC_DEMAND_L2_BR_ALL, 0x04898)
9 EVENT(PM_GCT_UTIL_7_TO_10_SLOTS, 0x020a0)
10 EVENT(PM_PMC2_SAVED, 0x10022)
11 EVENT(PM_CMPLU_STALL_DFU, 0x2003c)
12 EVENT(PM_VSU0_16FLOP, 0x0a0a4)
13 EVENT(PM_MRK_LSU_DERAT_MISS, 0x3d05a)
14 EVENT(PM_MRK_ST_CMPL, 0x10034)
15 EVENT(PM_NEST_PAIR3_ADD, 0x40881)
16 EVENT(PM_L2_ST_DISP, 0x46180)
17 EVENT(PM_L2_CASTOUT_MOD, 0x16180)
18 EVENT(PM_ISEG, 0x020a4)
19 EVENT(PM_MRK_INST_TIMEO, 0x40034)
20 EVENT(PM_L2_RCST_DISP_FAIL_ADDR, 0x36282)
21 EVENT(PM_LSU1_DC_PREF_STREAM_CONFIRM, 0x0d0b6)
22 EVENT(PM_IERAT_WR_64K, 0x040be)
23 EVENT(PM_MRK_DTLB_MISS_16M, 0x4d05e)
24 EVENT(PM_IERAT_MISS, 0x100f6)
25 EVENT(PM_MRK_PTEG_FROM_LMEM, 0x4d052)
26 EVENT(PM_FLOP, 0x100f4)
27 EVENT(PM_THRD_PRIO_4_5_CYC, 0x040b4)
28 EVENT(PM_BR_PRED_TA, 0x040aa)
29 EVENT(PM_CMPLU_STALL_FXU, 0x20014)
30 EVENT(PM_EXT_INT, 0x200f8)
31 EVENT(PM_VSU_FSQRT_FDIV, 0x0a888)
32 EVENT(PM_MRK_LD_MISS_EXPOSED_CYC, 0x1003e)
33 EVENT(PM_LSU1_LDF, 0x0c086)
34 EVENT(PM_IC_WRITE_ALL, 0x0488c)
35 EVENT(PM_LSU0_SRQ_STFWD, 0x0c0a0)
36 EVENT(PM_PTEG_FROM_RL2L3_MOD, 0x1c052)
37 EVENT(PM_MRK_DATA_FROM_L31_SHR, 0x1d04e)
38 EVENT(PM_DATA_FROM_L21_MOD, 0x3c046)
39 EVENT(PM_VSU1_SCAL_DOUBLE_ISSUED, 0x0b08a)
40 EVENT(PM_VSU0_8FLOP, 0x0a0a0)
41 EVENT(PM_POWER_EVENT1, 0x1006e)
42 EVENT(PM_DISP_CLB_HELD_BAL, 0x02092)
43 EVENT(PM_VSU1_2FLOP, 0x0a09a)
44 EVENT(PM_LWSYNC_HELD, 0x0209a)
45 EVENT(PM_PTEG_FROM_DL2L3_SHR, 0x3c054)
46 EVENT(PM_INST_FROM_L21_MOD, 0x34046)
47 EVENT(PM_IERAT_XLATE_WR_16MPLUS, 0x040bc)
48 EVENT(PM_IC_REQ_ALL, 0x04888)
49 EVENT(PM_DSLB_MISS, 0x0d090)
50 EVENT(PM_L3_MISS, 0x1f082)
51 EVENT(PM_LSU0_L1_PREF, 0x0d0b8)
52 EVENT(PM_VSU_SCALAR_SINGLE_ISSUED, 0x0b884)
53 EVENT(PM_LSU1_DC_PREF_STREAM_CONFIRM_STRIDE, 0x0d0be)
54 EVENT(PM_L2_INST, 0x36080)
55 EVENT(PM_VSU0_FRSP, 0x0a0b4)
56 EVENT(PM_FLUSH_DISP, 0x02082)
57 EVENT(PM_PTEG_FROM_L2MISS, 0x4c058)
58 EVENT(PM_VSU1_DQ_ISSUED, 0x0b09a)
59 EVENT(PM_CMPLU_STALL_LSU, 0x20012)
60 EVENT(PM_MRK_DATA_FROM_DMEM, 0x1d04a)
61 EVENT(PM_LSU_FLUSH_ULD, 0x0c8b0)
62 EVENT(PM_PTEG_FROM_LMEM, 0x4c052)
63 EVENT(PM_MRK_DERAT_MISS_16M, 0x3d05c)
64 EVENT(PM_THRD_ALL_RUN_CYC, 0x2000c)
65 EVENT(PM_MEM0_PREFETCH_DISP, 0x20083)
66 EVENT(PM_MRK_STALL_CMPLU_CYC_COUNT, 0x3003f)
67 EVENT(PM_DATA_FROM_DL2L3_MOD, 0x3c04c)
68 EVENT(PM_VSU_FRSP, 0x0a8b4)
69 EVENT(PM_MRK_DATA_FROM_L21_MOD, 0x3d046)
70 EVENT(PM_PMC1_OVERFLOW, 0x20010)
71 EVENT(PM_VSU0_SINGLE, 0x0a0a8)
72 EVENT(PM_MRK_PTEG_FROM_L3MISS, 0x2d058)
73 EVENT(PM_MRK_PTEG_FROM_L31_SHR, 0x2d056)
74 EVENT(PM_VSU0_VECTOR_SP_ISSUED, 0x0b090)
75 EVENT(PM_VSU1_FEST, 0x0a0ba)
76 EVENT(PM_MRK_INST_DISP, 0x20030)
77 EVENT(PM_VSU0_COMPLEX_ISSUED, 0x0b096)
78 EVENT(PM_LSU1_FLUSH_UST, 0x0c0b6)
79 EVENT(PM_INST_CMPL, 0x00002)
80 EVENT(PM_FXU_IDLE, 0x1000e)
81 EVENT(PM_LSU0_FLUSH_ULD, 0x0c0b0)
82 EVENT(PM_MRK_DATA_FROM_DL2L3_MOD, 0x3d04c)
83 EVENT(PM_LSU_LMQ_SRQ_EMPTY_ALL_CYC, 0x3001c)
84 EVENT(PM_LSU1_REJECT_LMQ_FULL, 0x0c0a6)
85 EVENT(PM_INST_PTEG_FROM_L21_MOD, 0x3e056)
86 EVENT(PM_INST_FROM_RL2L3_MOD, 0x14042)
87 EVENT(PM_SHL_CREATED, 0x05082)
88 EVENT(PM_L2_ST_HIT, 0x46182)
89 EVENT(PM_DATA_FROM_DMEM, 0x1c04a)
90 EVENT(PM_L3_LD_MISS, 0x2f082)
91 EVENT(PM_FXU1_BUSY_FXU0_IDLE, 0x4000e)
92 EVENT(PM_DISP_CLB_HELD_RES, 0x02094)
93 EVENT(PM_L2_SN_SX_I_DONE, 0x36382)
94 EVENT(PM_GRP_CMPL, 0x30004)
95 EVENT(PM_STCX_CMPL, 0x0c098)
96 EVENT(PM_VSU0_2FLOP, 0x0a098)
97 EVENT(PM_L3_PREF_MISS, 0x3f082)
98 EVENT(PM_LSU_SRQ_SYNC_CYC, 0x0d096)
99 EVENT(PM_LSU_REJECT_ERAT_MISS, 0x20064)
100 EVENT(PM_L1_ICACHE_MISS, 0x200fc)
101 EVENT(PM_LSU1_FLUSH_SRQ, 0x0c0be)
102 EVENT(PM_LD_REF_L1_LSU0, 0x0c080)
103 EVENT(PM_VSU0_FEST, 0x0a0b8)
104 EVENT(PM_VSU_VECTOR_SINGLE_ISSUED, 0x0b890)
105 EVENT(PM_FREQ_UP, 0x4000c)
106 EVENT(PM_DATA_FROM_LMEM, 0x3c04a)
107 EVENT(PM_LSU1_LDX, 0x0c08a)
108 EVENT(PM_PMC3_OVERFLOW, 0x40010)
109 EVENT(PM_MRK_BR_MPRED, 0x30036)
110 EVENT(PM_SHL_MATCH, 0x05086)
111 EVENT(PM_MRK_BR_TAKEN, 0x10036)
112 EVENT(PM_CMPLU_STALL_BRU, 0x4004e)
113 EVENT(PM_ISLB_MISS, 0x0d092)
114 EVENT(PM_CYC, 0x0001e)
115 EVENT(PM_DISP_HELD_THERMAL, 0x30006)
116 EVENT(PM_INST_PTEG_FROM_RL2L3_SHR, 0x2e054)
117 EVENT(PM_LSU1_SRQ_STFWD, 0x0c0a2)
118 EVENT(PM_GCT_NOSLOT_BR_MPRED, 0x4001a)
119 EVENT(PM_1PLUS_PPC_CMPL, 0x100f2)
120 EVENT(PM_PTEG_FROM_DMEM, 0x2c052)
121 EVENT(PM_VSU_2FLOP, 0x0a898)
122 EVENT(PM_GCT_FULL_CYC, 0x04086)
123 EVENT(PM_MRK_DATA_FROM_L3_CYC, 0x40020)
124 EVENT(PM_LSU_SRQ_S0_ALLOC, 0x0d09d)
125 EVENT(PM_MRK_DERAT_MISS_4K, 0x1d05c)
126 EVENT(PM_BR_MPRED_TA, 0x040ae)
127 EVENT(PM_INST_PTEG_FROM_L2MISS, 0x4e058)
128 EVENT(PM_DPU_HELD_POWER, 0x20006)
129 EVENT(PM_RUN_INST_CMPL, 0x400fa)
130 EVENT(PM_MRK_VSU_FIN, 0x30032)
131 EVENT(PM_LSU_SRQ_S0_VALID, 0x0d09c)
132 EVENT(PM_GCT_EMPTY_CYC, 0x20008)
133 EVENT(PM_IOPS_DISP, 0x30014)
134 EVENT(PM_RUN_SPURR, 0x10008)
135 EVENT(PM_PTEG_FROM_L21_MOD, 0x3c056)
136 EVENT(PM_VSU0_1FLOP, 0x0a080)
137 EVENT(PM_SNOOP_TLBIE, 0x0d0b2)
138 EVENT(PM_DATA_FROM_L3MISS, 0x2c048)
139 EVENT(PM_VSU_SINGLE, 0x0a8a8)
140 EVENT(PM_DTLB_MISS_16G, 0x1c05e)
141 EVENT(PM_CMPLU_STALL_VECTOR, 0x2001c)
142 EVENT(PM_FLUSH, 0x400f8)
143 EVENT(PM_L2_LD_HIT, 0x36182)
144 EVENT(PM_NEST_PAIR2_AND, 0x30883)
145 EVENT(PM_VSU1_1FLOP, 0x0a082)
146 EVENT(PM_IC_PREF_REQ, 0x0408a)
147 EVENT(PM_L3_LD_HIT, 0x2f080)
148 EVENT(PM_GCT_NOSLOT_IC_MISS, 0x2001a)
149 EVENT(PM_DISP_HELD, 0x10006)
150 EVENT(PM_L2_LD, 0x16080)
151 EVENT(PM_LSU_FLUSH_SRQ, 0x0c8bc)
152 EVENT(PM_BC_PLUS_8_CONV, 0x040b8)
153 EVENT(PM_MRK_DATA_FROM_L31_MOD_CYC, 0x40026)
154 EVENT(PM_CMPLU_STALL_VECTOR_LONG, 0x4004a)
155 EVENT(PM_L2_RCST_BUSY_RC_FULL, 0x26282)
156 EVENT(PM_TB_BIT_TRANS, 0x300f8)
157 EVENT(PM_THERMAL_MAX, 0x40006)
158 EVENT(PM_LSU1_FLUSH_ULD, 0x0c0b2)
159 EVENT(PM_LSU1_REJECT_LHS, 0x0c0ae)
160 EVENT(PM_LSU_LRQ_S0_ALLOC, 0x0d09f)
161 EVENT(PM_L3_CO_L31, 0x4f080)
162 EVENT(PM_POWER_EVENT4, 0x4006e)
163 EVENT(PM_DATA_FROM_L31_SHR, 0x1c04e)
164 EVENT(PM_BR_UNCOND, 0x0409e)
165 EVENT(PM_LSU1_DC_PREF_STREAM_ALLOC, 0x0d0aa)
166 EVENT(PM_PMC4_REWIND, 0x10020)
167 EVENT(PM_L2_RCLD_DISP, 0x16280)
168 EVENT(PM_THRD_PRIO_2_3_CYC, 0x040b2)
169 EVENT(PM_MRK_PTEG_FROM_L2MISS, 0x4d058)
170 EVENT(PM_IC_DEMAND_L2_BHT_REDIRECT, 0x04098)
171 EVENT(PM_LSU_DERAT_MISS, 0x200f6)
172 EVENT(PM_IC_PREF_CANCEL_L2, 0x04094)
173 EVENT(PM_MRK_FIN_STALL_CYC_COUNT, 0x1003d)
174 EVENT(PM_BR_PRED_CCACHE, 0x040a0)
175 EVENT(PM_GCT_UTIL_1_TO_2_SLOTS, 0x0209c)
176 EVENT(PM_MRK_ST_CMPL_INT, 0x30034)
177 EVENT(PM_LSU_TWO_TABLEWALK_CYC, 0x0d0a6)
178 EVENT(PM_MRK_DATA_FROM_L3MISS, 0x2d048)
179 EVENT(PM_GCT_NOSLOT_CYC, 0x100f8)
180 EVENT(PM_LSU_SET_MPRED, 0x0c0a8)
181 EVENT(PM_FLUSH_DISP_TLBIE, 0x0208a)
182 EVENT(PM_VSU1_FCONV, 0x0a0b2)
183 EVENT(PM_DERAT_MISS_16G, 0x4c05c)
184 EVENT(PM_INST_FROM_LMEM, 0x3404a)
185 EVENT(PM_IC_DEMAND_L2_BR_REDIRECT, 0x0409a)
186 EVENT(PM_CMPLU_STALL_SCALAR_LONG, 0x20018)
187 EVENT(PM_INST_PTEG_FROM_L2, 0x1e050)
188 EVENT(PM_PTEG_FROM_L2, 0x1c050)
189 EVENT(PM_MRK_DATA_FROM_L21_SHR_CYC, 0x20024)
190 EVENT(PM_MRK_DTLB_MISS_4K, 0x2d05a)
191 EVENT(PM_VSU0_FPSCR, 0x0b09c)
192 EVENT(PM_VSU1_VECT_DOUBLE_ISSUED, 0x0b082)
193 EVENT(PM_MRK_PTEG_FROM_RL2L3_MOD, 0x1d052)
194 EVENT(PM_MEM0_RQ_DISP, 0x10083)
195 EVENT(PM_L2_LD_MISS, 0x26080)
196 EVENT(PM_VMX_RESULT_SAT_1, 0x0b0a0)
197 EVENT(PM_L1_PREF, 0x0d8b8)
198 EVENT(PM_MRK_DATA_FROM_LMEM_CYC, 0x2002c)
199 EVENT(PM_GRP_IC_MISS_NONSPEC, 0x1000c)
200 EVENT(PM_PB_NODE_PUMP, 0x10081)
201 EVENT(PM_SHL_MERGED, 0x05084)
202 EVENT(PM_NEST_PAIR1_ADD, 0x20881)
203 EVENT(PM_DATA_FROM_L3, 0x1c048)
204 EVENT(PM_LSU_FLUSH, 0x0208e)
205 EVENT(PM_LSU_SRQ_SYNC_COUNT, 0x0d097)
206 EVENT(PM_PMC2_OVERFLOW, 0x30010)
207 EVENT(PM_LSU_LDF, 0x0c884)
208 EVENT(PM_POWER_EVENT3, 0x3006e)
209 EVENT(PM_DISP_WT, 0x30008)
210 EVENT(PM_CMPLU_STALL_REJECT, 0x40016)
211 EVENT(PM_IC_BANK_CONFLICT, 0x04082)
212 EVENT(PM_BR_MPRED_CR_TA, 0x048ae)
213 EVENT(PM_L2_INST_MISS, 0x36082)
214 EVENT(PM_CMPLU_STALL_ERAT_MISS, 0x40018)
215 EVENT(PM_NEST_PAIR2_ADD, 0x30881)
216 EVENT(PM_MRK_LSU_FLUSH, 0x0d08c)
217 EVENT(PM_L2_LDST, 0x16880)
218 EVENT(PM_INST_FROM_L31_SHR, 0x1404e)
219 EVENT(PM_VSU0_FIN, 0x0a0bc)
220 EVENT(PM_LARX_LSU, 0x0c894)
221 EVENT(PM_INST_FROM_RMEM, 0x34042)
222 EVENT(PM_DISP_CLB_HELD_TLBIE, 0x02096)
223 EVENT(PM_MRK_DATA_FROM_DMEM_CYC, 0x2002e)
224 EVENT(PM_BR_PRED_CR, 0x040a8)
225 EVENT(PM_LSU_REJECT, 0x10064)
226 EVENT(PM_GCT_UTIL_3_TO_6_SLOTS, 0x0209e)
227 EVENT(PM_CMPLU_STALL_END_GCT_NOSLOT, 0x10028)
228 EVENT(PM_LSU0_REJECT_LMQ_FULL, 0x0c0a4)
229 EVENT(PM_VSU_FEST, 0x0a8b8)
230 EVENT(PM_NEST_PAIR0_AND, 0x10883)
231 EVENT(PM_PTEG_FROM_L3, 0x2c050)
232 EVENT(PM_POWER_EVENT2, 0x2006e)
233 EVENT(PM_IC_PREF_CANCEL_PAGE, 0x04090)
234 EVENT(PM_VSU0_FSQRT_FDIV, 0x0a088)
235 EVENT(PM_MRK_GRP_CMPL, 0x40030)
236 EVENT(PM_VSU0_SCAL_DOUBLE_ISSUED, 0x0b088)
237 EVENT(PM_GRP_DISP, 0x3000a)
238 EVENT(PM_LSU0_LDX, 0x0c088)
239 EVENT(PM_DATA_FROM_L2, 0x1c040)
240 EVENT(PM_MRK_DATA_FROM_RL2L3_MOD, 0x1d042)
241 EVENT(PM_LD_REF_L1, 0x0c880)
242 EVENT(PM_VSU0_VECT_DOUBLE_ISSUED, 0x0b080)
243 EVENT(PM_VSU1_2FLOP_DOUBLE, 0x0a08e)
244 EVENT(PM_THRD_PRIO_6_7_CYC, 0x040b6)
245 EVENT(PM_BC_PLUS_8_RSLV_TAKEN, 0x040ba)
246 EVENT(PM_BR_MPRED_CR, 0x040ac)
247 EVENT(PM_L3_CO_MEM, 0x4f082)
248 EVENT(PM_LD_MISS_L1, 0x400f0)
249 EVENT(PM_DATA_FROM_RL2L3_MOD, 0x1c042)
250 EVENT(PM_LSU_SRQ_FULL_CYC, 0x1001a)
251 EVENT(PM_TABLEWALK_CYC, 0x10026)
252 EVENT(PM_MRK_PTEG_FROM_RMEM, 0x3d052)
253 EVENT(PM_LSU_SRQ_STFWD, 0x0c8a0)
254 EVENT(PM_INST_PTEG_FROM_RMEM, 0x3e052)
255 EVENT(PM_FXU0_FIN, 0x10004)
256 EVENT(PM_LSU1_L1_SW_PREF, 0x0c09e)
257 EVENT(PM_PTEG_FROM_L31_MOD, 0x1c054)
258 EVENT(PM_PMC5_OVERFLOW, 0x10024)
259 EVENT(PM_LD_REF_L1_LSU1, 0x0c082)
260 EVENT(PM_INST_PTEG_FROM_L21_SHR, 0x4e056)
261 EVENT(PM_CMPLU_STALL_THRD, 0x1001c)
262 EVENT(PM_DATA_FROM_RMEM, 0x3c042)
263 EVENT(PM_VSU0_SCAL_SINGLE_ISSUED, 0x0b084)
264 EVENT(PM_BR_MPRED_LSTACK, 0x040a6)
265 EVENT(PM_MRK_DATA_FROM_RL2L3_MOD_CYC, 0x40028)
266 EVENT(PM_LSU0_FLUSH_UST, 0x0c0b4)
267 EVENT(PM_LSU_NCST, 0x0c090)
268 EVENT(PM_BR_TAKEN, 0x20004)
269 EVENT(PM_INST_PTEG_FROM_LMEM, 0x4e052)
270 EVENT(PM_GCT_NOSLOT_BR_MPRED_IC_MISS, 0x4001c)
271 EVENT(PM_DTLB_MISS_4K, 0x2c05a)
272 EVENT(PM_PMC4_SAVED, 0x30022)
273 EVENT(PM_VSU1_PERMUTE_ISSUED, 0x0b092)
274 EVENT(PM_SLB_MISS, 0x0d890)
275 EVENT(PM_LSU1_FLUSH_LRQ, 0x0c0ba)
276 EVENT(PM_DTLB_MISS, 0x300fc)
277 EVENT(PM_VSU1_FRSP, 0x0a0b6)
278 EVENT(PM_VSU_VECTOR_DOUBLE_ISSUED, 0x0b880)
279 EVENT(PM_L2_CASTOUT_SHR, 0x16182)
280 EVENT(PM_DATA_FROM_DL2L3_SHR, 0x3c044)
281 EVENT(PM_VSU1_STF, 0x0b08e)
282 EVENT(PM_ST_FIN, 0x200f0)
283 EVENT(PM_PTEG_FROM_L21_SHR, 0x4c056)
284 EVENT(PM_L2_LOC_GUESS_WRONG, 0x26480)
285 EVENT(PM_MRK_STCX_FAIL, 0x0d08e)
286 EVENT(PM_LSU0_REJECT_LHS, 0x0c0ac)
287 EVENT(PM_IC_PREF_CANCEL_HIT, 0x04092)
288 EVENT(PM_L3_PREF_BUSY, 0x4f080)
289 EVENT(PM_MRK_BRU_FIN, 0x2003a)
290 EVENT(PM_LSU1_NCLD, 0x0c08e)
291 EVENT(PM_INST_PTEG_FROM_L31_MOD, 0x1e054)
292 EVENT(PM_LSU_NCLD, 0x0c88c)
293 EVENT(PM_LSU_LDX, 0x0c888)
294 EVENT(PM_L2_LOC_GUESS_CORRECT, 0x16480)
295 EVENT(PM_THRESH_TIMEO, 0x10038)
296 EVENT(PM_L3_PREF_ST, 0x0d0ae)
297 EVENT(PM_DISP_CLB_HELD_SYNC, 0x02098)
298 EVENT(PM_VSU_SIMPLE_ISSUED, 0x0b894)
299 EVENT(PM_VSU1_SINGLE, 0x0a0aa)
300 EVENT(PM_DATA_TABLEWALK_CYC, 0x3001a)
301 EVENT(PM_L2_RC_ST_DONE, 0x36380)
302 EVENT(PM_MRK_PTEG_FROM_L21_MOD, 0x3d056)
303 EVENT(PM_LARX_LSU1, 0x0c096)
304 EVENT(PM_MRK_DATA_FROM_RMEM, 0x3d042)
305 EVENT(PM_DISP_CLB_HELD, 0x02090)
306 EVENT(PM_DERAT_MISS_4K, 0x1c05c)
307 EVENT(PM_L2_RCLD_DISP_FAIL_ADDR, 0x16282)
308 EVENT(PM_SEG_EXCEPTION, 0x028a4)
309 EVENT(PM_FLUSH_DISP_SB, 0x0208c)
310 EVENT(PM_L2_DC_INV, 0x26182)
311 EVENT(PM_PTEG_FROM_DL2L3_MOD, 0x4c054)
312 EVENT(PM_DSEG, 0x020a6)
313 EVENT(PM_BR_PRED_LSTACK, 0x040a2)
314 EVENT(PM_VSU0_STF, 0x0b08c)
315 EVENT(PM_LSU_FX_FIN, 0x10066)
316 EVENT(PM_DERAT_MISS_16M, 0x3c05c)
317 EVENT(PM_MRK_PTEG_FROM_DL2L3_MOD, 0x4d054)
318 EVENT(PM_GCT_UTIL_11_PLUS_SLOTS, 0x020a2)
319 EVENT(PM_INST_FROM_L3, 0x14048)
320 EVENT(PM_MRK_IFU_FIN, 0x3003a)
321 EVENT(PM_ITLB_MISS, 0x400fc)
322 EVENT(PM_VSU_STF, 0x0b88c)
323 EVENT(PM_LSU_FLUSH_UST, 0x0c8b4)
324 EVENT(PM_L2_LDST_MISS, 0x26880)
325 EVENT(PM_FXU1_FIN, 0x40004)
326 EVENT(PM_SHL_DEALLOCATED, 0x05080)
327 EVENT(PM_L2_SN_M_WR_DONE, 0x46382)
328 EVENT(PM_LSU_REJECT_SET_MPRED, 0x0c8a8)
329 EVENT(PM_L3_PREF_LD, 0x0d0ac)
330 EVENT(PM_L2_SN_M_RD_DONE, 0x46380)
331 EVENT(PM_MRK_DERAT_MISS_16G, 0x4d05c)
332 EVENT(PM_VSU_FCONV, 0x0a8b0)
333 EVENT(PM_ANY_THRD_RUN_CYC, 0x100fa)
334 EVENT(PM_LSU_LMQ_FULL_CYC, 0x0d0a4)
335 EVENT(PM_MRK_LSU_REJECT_LHS, 0x0d082)
336 EVENT(PM_MRK_LD_MISS_L1_CYC, 0x4003e)
337 EVENT(PM_MRK_DATA_FROM_L2_CYC, 0x20020)
338 EVENT(PM_INST_IMC_MATCH_DISP, 0x30016)
339 EVENT(PM_MRK_DATA_FROM_RMEM_CYC, 0x4002c)
340 EVENT(PM_VSU0_SIMPLE_ISSUED, 0x0b094)
341 EVENT(PM_CMPLU_STALL_DIV, 0x40014)
342 EVENT(PM_MRK_PTEG_FROM_RL2L3_SHR, 0x2d054)
343 EVENT(PM_VSU_FMA_DOUBLE, 0x0a890)
344 EVENT(PM_VSU_4FLOP, 0x0a89c)
345 EVENT(PM_VSU1_FIN, 0x0a0be)
346 EVENT(PM_NEST_PAIR1_AND, 0x20883)
347 EVENT(PM_INST_PTEG_FROM_RL2L3_MOD, 0x1e052)
348 EVENT(PM_RUN_CYC, 0x200f4)
349 EVENT(PM_PTEG_FROM_RMEM, 0x3c052)
350 EVENT(PM_LSU_LRQ_S0_VALID, 0x0d09e)
351 EVENT(PM_LSU0_LDF, 0x0c084)
352 EVENT(PM_FLUSH_COMPLETION, 0x30012)
353 EVENT(PM_ST_MISS_L1, 0x300f0)
354 EVENT(PM_L2_NODE_PUMP, 0x36480)
355 EVENT(PM_INST_FROM_DL2L3_SHR, 0x34044)
356 EVENT(PM_MRK_STALL_CMPLU_CYC, 0x3003e)
357 EVENT(PM_VSU1_DENORM, 0x0a0ae)
358 EVENT(PM_MRK_DATA_FROM_L31_SHR_CYC, 0x20026)
359 EVENT(PM_NEST_PAIR0_ADD, 0x10881)
360 EVENT(PM_INST_FROM_L3MISS, 0x24048)
361 EVENT(PM_EE_OFF_EXT_INT, 0x02080)
362 EVENT(PM_INST_PTEG_FROM_DMEM, 0x2e052)
363 EVENT(PM_INST_FROM_DL2L3_MOD, 0x3404c)
364 EVENT(PM_PMC6_OVERFLOW, 0x30024)
365 EVENT(PM_VSU_2FLOP_DOUBLE, 0x0a88c)
366 EVENT(PM_TLB_MISS, 0x20066)
367 EVENT(PM_FXU_BUSY, 0x2000e)
368 EVENT(PM_L2_RCLD_DISP_FAIL_OTHER, 0x26280)
369 EVENT(PM_LSU_REJECT_LMQ_FULL, 0x0c8a4)
370 EVENT(PM_IC_RELOAD_SHR, 0x04096)
371 EVENT(PM_GRP_MRK, 0x10031)
372 EVENT(PM_MRK_ST_NEST, 0x20034)
373 EVENT(PM_VSU1_FSQRT_FDIV, 0x0a08a)
374 EVENT(PM_LSU0_FLUSH_LRQ, 0x0c0b8)
375 EVENT(PM_LARX_LSU0, 0x0c094)
376 EVENT(PM_IBUF_FULL_CYC, 0x04084)
377 EVENT(PM_MRK_DATA_FROM_DL2L3_SHR_CYC, 0x2002a)
378 EVENT(PM_LSU_DC_PREF_STREAM_ALLOC, 0x0d8a8)
379 EVENT(PM_GRP_MRK_CYC, 0x10030)
380 EVENT(PM_MRK_DATA_FROM_RL2L3_SHR_CYC, 0x20028)
381 EVENT(PM_L2_GLOB_GUESS_CORRECT, 0x16482)
382 EVENT(PM_LSU_REJECT_LHS, 0x0c8ac)
383 EVENT(PM_MRK_DATA_FROM_LMEM, 0x3d04a)
384 EVENT(PM_INST_PTEG_FROM_L3, 0x2e050)
385 EVENT(PM_FREQ_DOWN, 0x3000c)
386 EVENT(PM_PB_RETRY_NODE_PUMP, 0x30081)
387 EVENT(PM_INST_FROM_RL2L3_SHR, 0x1404c)
388 EVENT(PM_MRK_INST_ISSUED, 0x10032)
389 EVENT(PM_PTEG_FROM_L3MISS, 0x2c058)
390 EVENT(PM_RUN_PURR, 0x400f4)
391 EVENT(PM_MRK_GRP_IC_MISS, 0x40038)
392 EVENT(PM_MRK_DATA_FROM_L3, 0x1d048)
393 EVENT(PM_CMPLU_STALL_DCACHE_MISS, 0x20016)
394 EVENT(PM_PTEG_FROM_RL2L3_SHR, 0x2c054)
395 EVENT(PM_LSU_FLUSH_LRQ, 0x0c8b8)
396 EVENT(PM_MRK_DERAT_MISS_64K, 0x2d05c)
397 EVENT(PM_INST_PTEG_FROM_DL2L3_MOD, 0x4e054)
398 EVENT(PM_L2_ST_MISS, 0x26082)
399 EVENT(PM_MRK_PTEG_FROM_L21_SHR, 0x4d056)
400 EVENT(PM_LWSYNC, 0x0d094)
401 EVENT(PM_LSU0_DC_PREF_STREAM_CONFIRM_STRIDE, 0x0d0bc)
402 EVENT(PM_MRK_LSU_FLUSH_LRQ, 0x0d088)
403 EVENT(PM_INST_IMC_MATCH_CMPL, 0x100f0)
404 EVENT(PM_NEST_PAIR3_AND, 0x40883)
405 EVENT(PM_PB_RETRY_SYS_PUMP, 0x40081)
406 EVENT(PM_MRK_INST_FIN, 0x30030)
407 EVENT(PM_MRK_PTEG_FROM_DL2L3_SHR, 0x3d054)
408 EVENT(PM_INST_FROM_L31_MOD, 0x14044)
409 EVENT(PM_MRK_DTLB_MISS_64K, 0x3d05e)
410 EVENT(PM_LSU_FIN, 0x30066)
411 EVENT(PM_MRK_LSU_REJECT, 0x40064)
412 EVENT(PM_L2_CO_FAIL_BUSY, 0x16382)
413 EVENT(PM_MEM0_WQ_DISP, 0x40083)
414 EVENT(PM_DATA_FROM_L31_MOD, 0x1c044)
415 EVENT(PM_THERMAL_WARN, 0x10016)
416 EVENT(PM_VSU0_4FLOP, 0x0a09c)
417 EVENT(PM_BR_MPRED_CCACHE, 0x040a4)
418 EVENT(PM_CMPLU_STALL_IFU, 0x4004c)
419 EVENT(PM_L1_DEMAND_WRITE, 0x0408c)
420 EVENT(PM_FLUSH_BR_MPRED, 0x02084)
421 EVENT(PM_MRK_DTLB_MISS_16G, 0x1d05e)
422 EVENT(PM_MRK_PTEG_FROM_DMEM, 0x2d052)
423 EVENT(PM_L2_RCST_DISP, 0x36280)
424 EVENT(PM_CMPLU_STALL, 0x4000a)
425 EVENT(PM_LSU_PARTIAL_CDF, 0x0c0aa)
426 EVENT(PM_DISP_CLB_HELD_SB, 0x020a8)
427 EVENT(PM_VSU0_FMA_DOUBLE, 0x0a090)
428 EVENT(PM_FXU0_BUSY_FXU1_IDLE, 0x3000e)
429 EVENT(PM_IC_DEMAND_CYC, 0x10018)
430 EVENT(PM_MRK_DATA_FROM_L21_SHR, 0x3d04e)
431 EVENT(PM_MRK_LSU_FLUSH_UST, 0x0d086)
432 EVENT(PM_INST_PTEG_FROM_L3MISS, 0x2e058)
433 EVENT(PM_VSU_DENORM, 0x0a8ac)
434 EVENT(PM_MRK_LSU_PARTIAL_CDF, 0x0d080)
435 EVENT(PM_INST_FROM_L21_SHR, 0x3404e)
436 EVENT(PM_IC_PREF_WRITE, 0x0408e)
437 EVENT(PM_BR_PRED, 0x0409c)
438 EVENT(PM_INST_FROM_DMEM, 0x1404a)
439 EVENT(PM_IC_PREF_CANCEL_ALL, 0x04890)
440 EVENT(PM_LSU_DC_PREF_STREAM_CONFIRM, 0x0d8b4)
441 EVENT(PM_MRK_LSU_FLUSH_SRQ, 0x0d08a)
442 EVENT(PM_MRK_FIN_STALL_CYC, 0x1003c)
443 EVENT(PM_L2_RCST_DISP_FAIL_OTHER, 0x46280)
444 EVENT(PM_VSU1_DD_ISSUED, 0x0b098)
445 EVENT(PM_PTEG_FROM_L31_SHR, 0x2c056)
446 EVENT(PM_DATA_FROM_L21_SHR, 0x3c04e)
447 EVENT(PM_LSU0_NCLD, 0x0c08c)
448 EVENT(PM_VSU1_4FLOP, 0x0a09e)
449 EVENT(PM_VSU1_8FLOP, 0x0a0a2)
450 EVENT(PM_VSU_8FLOP, 0x0a8a0)
451 EVENT(PM_LSU_LMQ_SRQ_EMPTY_CYC, 0x2003e)
452 EVENT(PM_DTLB_MISS_64K, 0x3c05e)
453 EVENT(PM_THRD_CONC_RUN_INST, 0x300f4)
454 EVENT(PM_MRK_PTEG_FROM_L2, 0x1d050)
455 EVENT(PM_PB_SYS_PUMP, 0x20081)
456 EVENT(PM_VSU_FIN, 0x0a8bc)
457 EVENT(PM_MRK_DATA_FROM_L31_MOD, 0x1d044)
458 EVENT(PM_THRD_PRIO_0_1_CYC, 0x040b0)
459 EVENT(PM_DERAT_MISS_64K, 0x2c05c)
460 EVENT(PM_PMC2_REWIND, 0x30020)
461 EVENT(PM_INST_FROM_L2, 0x14040)
462 EVENT(PM_GRP_BR_MPRED_NONSPEC, 0x1000a)
463 EVENT(PM_INST_DISP, 0x200f2)
464 EVENT(PM_MEM0_RD_CANCEL_TOTAL, 0x30083)
465 EVENT(PM_LSU0_DC_PREF_STREAM_CONFIRM, 0x0d0b4)
466 EVENT(PM_L1_DCACHE_RELOAD_VALID, 0x300f6)
467 EVENT(PM_VSU_SCALAR_DOUBLE_ISSUED, 0x0b888)
468 EVENT(PM_L3_PREF_HIT, 0x3f080)
469 EVENT(PM_MRK_PTEG_FROM_L31_MOD, 0x1d054)
470 EVENT(PM_CMPLU_STALL_STORE, 0x2004a)
471 EVENT(PM_MRK_FXU_FIN, 0x20038)
472 EVENT(PM_PMC4_OVERFLOW, 0x10010)
473 EVENT(PM_MRK_PTEG_FROM_L3, 0x2d050)
474 EVENT(PM_LSU0_LMQ_LHR_MERGE, 0x0d098)
475 EVENT(PM_BTAC_HIT, 0x0508a)
476 EVENT(PM_L3_RD_BUSY, 0x4f082)
477 EVENT(PM_LSU0_L1_SW_PREF, 0x0c09c)
478 EVENT(PM_INST_FROM_L2MISS, 0x44048)
479 EVENT(PM_LSU0_DC_PREF_STREAM_ALLOC, 0x0d0a8)
480 EVENT(PM_L2_ST, 0x16082)
481 EVENT(PM_VSU0_DENORM, 0x0a0ac)
482 EVENT(PM_MRK_DATA_FROM_DL2L3_SHR, 0x3d044)
483 EVENT(PM_BR_PRED_CR_TA, 0x048aa)
484 EVENT(PM_VSU0_FCONV, 0x0a0b0)
485 EVENT(PM_MRK_LSU_FLUSH_ULD, 0x0d084)
486 EVENT(PM_BTAC_MISS, 0x05088)
487 EVENT(PM_MRK_LD_MISS_EXPOSED_CYC_COUNT, 0x1003f)
488 EVENT(PM_MRK_DATA_FROM_L2, 0x1d040)
489 EVENT(PM_LSU_DCACHE_RELOAD_VALID, 0x0d0a2)
490 EVENT(PM_VSU_FMA, 0x0a884)
491 EVENT(PM_LSU0_FLUSH_SRQ, 0x0c0bc)
492 EVENT(PM_LSU1_L1_PREF, 0x0d0ba)
493 EVENT(PM_IOPS_CMPL, 0x10014)
494 EVENT(PM_L2_SYS_PUMP, 0x36482)
495 EVENT(PM_L2_RCLD_BUSY_RC_FULL, 0x46282)
496 EVENT(PM_LSU_LMQ_S0_ALLOC, 0x0d0a1)
497 EVENT(PM_FLUSH_DISP_SYNC, 0x02088)
498 EVENT(PM_MRK_DATA_FROM_DL2L3_MOD_CYC, 0x4002a)
499 EVENT(PM_L2_IC_INV, 0x26180)
500 EVENT(PM_MRK_DATA_FROM_L21_MOD_CYC, 0x40024)
501 EVENT(PM_L3_PREF_LDST, 0x0d8ac)
502 EVENT(PM_LSU_SRQ_EMPTY_CYC, 0x40008)
503 EVENT(PM_LSU_LMQ_S0_VALID, 0x0d0a0)
504 EVENT(PM_FLUSH_PARTIAL, 0x02086)
505 EVENT(PM_VSU1_FMA_DOUBLE, 0x0a092)
506 EVENT(PM_1PLUS_PPC_DISP, 0x400f2)
507 EVENT(PM_DATA_FROM_L2MISS, 0x200fe)
508 EVENT(PM_SUSPENDED, 0x00000)
509 EVENT(PM_VSU0_FMA, 0x0a084)
510 EVENT(PM_CMPLU_STALL_SCALAR, 0x40012)
511 EVENT(PM_STCX_FAIL, 0x0c09a)
512 EVENT(PM_VSU0_FSQRT_FDIV_DOUBLE, 0x0a094)
513 EVENT(PM_DC_PREF_DST, 0x0d0b0)
514 EVENT(PM_VSU1_SCAL_SINGLE_ISSUED, 0x0b086)
515 EVENT(PM_L3_HIT, 0x1f080)
516 EVENT(PM_L2_GLOB_GUESS_WRONG, 0x26482)
517 EVENT(PM_MRK_DFU_FIN, 0x20032)
518 EVENT(PM_INST_FROM_L1, 0x04080)
519 EVENT(PM_BRU_FIN, 0x10068)
520 EVENT(PM_IC_DEMAND_REQ, 0x04088)
521 EVENT(PM_VSU1_FSQRT_FDIV_DOUBLE, 0x0a096)
522 EVENT(PM_VSU1_FMA, 0x0a086)
523 EVENT(PM_MRK_LD_MISS_L1, 0x20036)
524 EVENT(PM_VSU0_2FLOP_DOUBLE, 0x0a08c)
525 EVENT(PM_LSU_DC_PREF_STRIDED_STREAM_CONFIRM, 0x0d8bc)
526 EVENT(PM_INST_PTEG_FROM_L31_SHR, 0x2e056)
527 EVENT(PM_MRK_LSU_REJECT_ERAT_MISS, 0x30064)
528 EVENT(PM_MRK_DATA_FROM_L2MISS, 0x4d048)
529 EVENT(PM_DATA_FROM_RL2L3_SHR, 0x1c04c)
530 EVENT(PM_INST_FROM_PREF, 0x14046)
531 EVENT(PM_VSU1_SQ, 0x0b09e)
532 EVENT(PM_L2_LD_DISP, 0x36180)
533 EVENT(PM_L2_DISP_ALL, 0x46080)
534 EVENT(PM_THRD_GRP_CMPL_BOTH_CYC, 0x10012)
535 EVENT(PM_VSU_FSQRT_FDIV_DOUBLE, 0x0a894)
536 EVENT(PM_BR_MPRED, 0x400f6)
537 EVENT(PM_INST_PTEG_FROM_DL2L3_SHR, 0x3e054)
538 EVENT(PM_VSU_1FLOP, 0x0a880)
539 EVENT(PM_HV_CYC, 0x2000a)
540 EVENT(PM_MRK_LSU_FIN, 0x40032)
541 EVENT(PM_MRK_DATA_FROM_RL2L3_SHR, 0x1d04c)
542 EVENT(PM_DTLB_MISS_16M, 0x4c05e)
543 EVENT(PM_LSU1_LMQ_LHR_MERGE, 0x0d09a)
544 EVENT(PM_IFU_FIN, 0x40066)
545 EVENT(PM_1THRD_CON_RUN_INSTR, 0x30062)
546 EVENT(PM_CMPLU_STALL_COUNT, 0x4000B)
547 EVENT(PM_MEM0_PB_RD_CL, 0x30083)
548 EVENT(PM_THRD_1_RUN_CYC, 0x10060)
549 EVENT(PM_THRD_2_CONC_RUN_INSTR, 0x40062)
550 EVENT(PM_THRD_2_RUN_CYC, 0x20060)
551 EVENT(PM_THRD_3_CONC_RUN_INST, 0x10062)
552 EVENT(PM_THRD_3_RUN_CYC, 0x30060)
553 EVENT(PM_THRD_4_CONC_RUN_INST, 0x20062)
554 EVENT(PM_THRD_4_RUN_CYC, 0x40060)
Linux with added FPC-III support