treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / arch / riscv / include / uapi / asm / elf.h
blobd696d6610231dd6cacacdeba77e7c96b6184d993
1 /*
2 * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
3 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
4 * Copyright (C) 2012 Regents of the University of California
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #ifndef _UAPI_ASM_RISCV_ELF_H
13 #define _UAPI_ASM_RISCV_ELF_H
15 #include <asm/ptrace.h>
17 /* ELF register definitions */
18 typedef unsigned long elf_greg_t;
19 typedef struct user_regs_struct elf_gregset_t;
20 #define ELF_NGREG (sizeof(elf_gregset_t) / sizeof(elf_greg_t))
22 /* We don't support f without d, or q. */
23 typedef __u64 elf_fpreg_t;
24 typedef union __riscv_fp_state elf_fpregset_t;
25 #define ELF_NFPREG (sizeof(struct __riscv_d_ext_state) / sizeof(elf_fpreg_t))
27 #if __riscv_xlen == 64
28 #define ELF_RISCV_R_SYM(r_info) ELF64_R_SYM(r_info)
29 #define ELF_RISCV_R_TYPE(r_info) ELF64_R_TYPE(r_info)
30 #else
31 #define ELF_RISCV_R_SYM(r_info) ELF32_R_SYM(r_info)
32 #define ELF_RISCV_R_TYPE(r_info) ELF32_R_TYPE(r_info)
33 #endif
36 * RISC-V relocation types
39 /* Relocation types used by the dynamic linker */
40 #define R_RISCV_NONE 0
41 #define R_RISCV_32 1
42 #define R_RISCV_64 2
43 #define R_RISCV_RELATIVE 3
44 #define R_RISCV_COPY 4
45 #define R_RISCV_JUMP_SLOT 5
46 #define R_RISCV_TLS_DTPMOD32 6
47 #define R_RISCV_TLS_DTPMOD64 7
48 #define R_RISCV_TLS_DTPREL32 8
49 #define R_RISCV_TLS_DTPREL64 9
50 #define R_RISCV_TLS_TPREL32 10
51 #define R_RISCV_TLS_TPREL64 11
53 /* Relocation types not used by the dynamic linker */
54 #define R_RISCV_BRANCH 16
55 #define R_RISCV_JAL 17
56 #define R_RISCV_CALL 18
57 #define R_RISCV_CALL_PLT 19
58 #define R_RISCV_GOT_HI20 20
59 #define R_RISCV_TLS_GOT_HI20 21
60 #define R_RISCV_TLS_GD_HI20 22
61 #define R_RISCV_PCREL_HI20 23
62 #define R_RISCV_PCREL_LO12_I 24
63 #define R_RISCV_PCREL_LO12_S 25
64 #define R_RISCV_HI20 26
65 #define R_RISCV_LO12_I 27
66 #define R_RISCV_LO12_S 28
67 #define R_RISCV_TPREL_HI20 29
68 #define R_RISCV_TPREL_LO12_I 30
69 #define R_RISCV_TPREL_LO12_S 31
70 #define R_RISCV_TPREL_ADD 32
71 #define R_RISCV_ADD8 33
72 #define R_RISCV_ADD16 34
73 #define R_RISCV_ADD32 35
74 #define R_RISCV_ADD64 36
75 #define R_RISCV_SUB8 37
76 #define R_RISCV_SUB16 38
77 #define R_RISCV_SUB32 39
78 #define R_RISCV_SUB64 40
79 #define R_RISCV_GNU_VTINHERIT 41
80 #define R_RISCV_GNU_VTENTRY 42
81 #define R_RISCV_ALIGN 43
82 #define R_RISCV_RVC_BRANCH 44
83 #define R_RISCV_RVC_JUMP 45
84 #define R_RISCV_LUI 46
85 #define R_RISCV_GPREL_I 47
86 #define R_RISCV_GPREL_S 48
87 #define R_RISCV_TPREL_I 49
88 #define R_RISCV_TPREL_S 50
89 #define R_RISCV_RELAX 51
90 #define R_RISCV_SUB6 52
91 #define R_RISCV_SET6 53
92 #define R_RISCV_SET8 54
93 #define R_RISCV_SET16 55
94 #define R_RISCV_SET32 56
95 #define R_RISCV_32_PCREL 57
98 #endif /* _UAPI_ASM_RISCV_ELF_H */