arch/x86/include/asm/pgtable.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_X86_PGTABLE_H
   3 #define _ASM_X86_PGTABLE_H
   4
   5 #include <linux/mem_encrypt.h>
   6 #include <asm/page.h>
   7 #include <asm/pgtable_types.h>
   8
   9 /*
  10  * Macro to mark a page protection value as UC-
  11  */
  12 #define pgprot_noncached(prot)                                          \
  13         ((boot_cpu_data.x86 > 3)                                        \
  14          ? (__pgprot(pgprot_val(prot) |                                 \
  15                      cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS)))     \
  16          : (prot))
  17
  18 /*
  19  * Macros to add or remove encryption attribute
  20  */
  21 #define pgprot_encrypted(prot)  __pgprot(__sme_set(pgprot_val(prot)))
  22 #define pgprot_decrypted(prot)  __pgprot(__sme_clr(pgprot_val(prot)))
  23
  24 #ifndef __ASSEMBLY__
  25 #include <asm/x86_init.h>
  26 #include <asm/fpu/xstate.h>
  27 #include <asm/fpu/api.h>
  28
  29 extern pgd_t early_top_pgt[PTRS_PER_PGD];
  30 int __init __early_make_pgtable(unsigned long address, pmdval_t pmd);
  31
  32 void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm);
  33 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm,
  34                                    bool user);
  35 void ptdump_walk_pgd_level_checkwx(void);
  36 void ptdump_walk_user_pgd_level_checkwx(void);
  37
  38 #ifdef CONFIG_DEBUG_WX
  39 #define debug_checkwx()         ptdump_walk_pgd_level_checkwx()
  40 #define debug_checkwx_user()    ptdump_walk_user_pgd_level_checkwx()
  41 #else
  42 #define debug_checkwx()         do { } while (0)
  43 #define debug_checkwx_user()    do { } while (0)
  44 #endif
  45
  46 /*
  47  * ZERO_PAGE is a global shared page that is always zero: used
  48  * for zero-mapped memory areas etc..
  49  */
  50 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
  51         __visible;
  52 #define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page))
  53
  54 extern spinlock_t pgd_lock;
  55 extern struct list_head pgd_list;
  56
  57 extern struct mm_struct *pgd_page_get_mm(struct page *page);
  58
  59 extern pmdval_t early_pmd_flags;
  60
  61 #ifdef CONFIG_PARAVIRT_XXL
  62 #include <asm/paravirt.h>
  63 #else  /* !CONFIG_PARAVIRT_XXL */
  64 #define set_pte(ptep, pte)              native_set_pte(ptep, pte)
  65 #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
  66
  67 #define set_pte_atomic(ptep, pte)                                       \
  68         native_set_pte_atomic(ptep, pte)
  69
  70 #define set_pmd(pmdp, pmd)              native_set_pmd(pmdp, pmd)
  71
  72 #ifndef __PAGETABLE_P4D_FOLDED
  73 #define set_pgd(pgdp, pgd)              native_set_pgd(pgdp, pgd)
  74 #define pgd_clear(pgd)                  (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0)
  75 #endif
  76
  77 #ifndef set_p4d
  78 # define set_p4d(p4dp, p4d)             native_set_p4d(p4dp, p4d)
  79 #endif
  80
  81 #ifndef __PAGETABLE_PUD_FOLDED
  82 #define p4d_clear(p4d)                  native_p4d_clear(p4d)
  83 #endif
  84
  85 #ifndef set_pud
  86 # define set_pud(pudp, pud)             native_set_pud(pudp, pud)
  87 #endif
  88
  89 #ifndef __PAGETABLE_PUD_FOLDED
  90 #define pud_clear(pud)                  native_pud_clear(pud)
  91 #endif
  92
  93 #define pte_clear(mm, addr, ptep)       native_pte_clear(mm, addr, ptep)
  94 #define pmd_clear(pmd)                  native_pmd_clear(pmd)
  95
  96 #define pgd_val(x)      native_pgd_val(x)
  97 #define __pgd(x)        native_make_pgd(x)
  98
  99 #ifndef __PAGETABLE_P4D_FOLDED
 100 #define p4d_val(x)      native_p4d_val(x)
 101 #define __p4d(x)        native_make_p4d(x)
 102 #endif
 103
 104 #ifndef __PAGETABLE_PUD_FOLDED
 105 #define pud_val(x)      native_pud_val(x)
 106 #define __pud(x)        native_make_pud(x)
 107 #endif
 108
 109 #ifndef __PAGETABLE_PMD_FOLDED
 110 #define pmd_val(x)      native_pmd_val(x)
 111 #define __pmd(x)        native_make_pmd(x)
 112 #endif
 113
 114 #define pte_val(x)      native_pte_val(x)
 115 #define __pte(x)        native_make_pte(x)
 116
 117 #define arch_end_context_switch(prev)   do {} while(0)
 118 #endif  /* CONFIG_PARAVIRT_XXL */
 119
 120 /*
 121  * The following only work if pte_present() is true.
 122  * Undefined behaviour if not..
 123  */
 124 static inline int pte_dirty(pte_t pte)
 125 {
 126         return pte_flags(pte) & _PAGE_DIRTY;
 127 }
 128
 129
 130 static inline u32 read_pkru(void)
 131 {
 132         if (boot_cpu_has(X86_FEATURE_OSPKE))
 133                 return rdpkru();
 134         return 0;
 135 }
 136
 137 static inline void write_pkru(u32 pkru)
 138 {
 139         struct pkru_state *pk;
 140
 141         if (!boot_cpu_has(X86_FEATURE_OSPKE))
 142                 return;
 143
 144         pk = get_xsave_addr(&current->thread.fpu.state.xsave, XFEATURE_PKRU);
 145
 146         /*
 147          * The PKRU value in xstate needs to be in sync with the value that is
 148          * written to the CPU. The FPU restore on return to userland would
 149          * otherwise load the previous value again.
 150          */
 151         fpregs_lock();
 152         if (pk)
 153                 pk->pkru = pkru;
 154         __write_pkru(pkru);
 155         fpregs_unlock();
 156 }
 157
 158 static inline int pte_young(pte_t pte)
 159 {
 160         return pte_flags(pte) & _PAGE_ACCESSED;
 161 }
 162
 163 static inline int pmd_dirty(pmd_t pmd)
 164 {
 165         return pmd_flags(pmd) & _PAGE_DIRTY;
 166 }
 167
 168 static inline int pmd_young(pmd_t pmd)
 169 {
 170         return pmd_flags(pmd) & _PAGE_ACCESSED;
 171 }
 172
 173 static inline int pud_dirty(pud_t pud)
 174 {
 175         return pud_flags(pud) & _PAGE_DIRTY;
 176 }
 177
 178 static inline int pud_young(pud_t pud)
 179 {
 180         return pud_flags(pud) & _PAGE_ACCESSED;
 181 }
 182
 183 static inline int pte_write(pte_t pte)
 184 {
 185         return pte_flags(pte) & _PAGE_RW;
 186 }
 187
 188 static inline int pte_huge(pte_t pte)
 189 {
 190         return pte_flags(pte) & _PAGE_PSE;
 191 }
 192
 193 static inline int pte_global(pte_t pte)
 194 {
 195         return pte_flags(pte) & _PAGE_GLOBAL;
 196 }
 197
 198 static inline int pte_exec(pte_t pte)
 199 {
 200         return !(pte_flags(pte) & _PAGE_NX);
 201 }
 202
 203 static inline int pte_special(pte_t pte)
 204 {
 205         return pte_flags(pte) & _PAGE_SPECIAL;
 206 }
 207
 208 /* Entries that were set to PROT_NONE are inverted */
 209
 210 static inline u64 protnone_mask(u64 val);
 211
 212 static inline unsigned long pte_pfn(pte_t pte)
 213 {
 214         phys_addr_t pfn = pte_val(pte);
 215         pfn ^= protnone_mask(pfn);
 216         return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT;
 217 }
 218
 219 static inline unsigned long pmd_pfn(pmd_t pmd)
 220 {
 221         phys_addr_t pfn = pmd_val(pmd);
 222         pfn ^= protnone_mask(pfn);
 223         return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
 224 }
 225
 226 static inline unsigned long pud_pfn(pud_t pud)
 227 {
 228         phys_addr_t pfn = pud_val(pud);
 229         pfn ^= protnone_mask(pfn);
 230         return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
 231 }
 232
 233 static inline unsigned long p4d_pfn(p4d_t p4d)
 234 {
 235         return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
 236 }
 237
 238 static inline unsigned long pgd_pfn(pgd_t pgd)
 239 {
 240         return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
 241 }
 242
 243 #define p4d_leaf        p4d_large
 244 static inline int p4d_large(p4d_t p4d)
 245 {
 246         /* No 512 GiB pages yet */
 247         return 0;
 248 }
 249
 250 #define pte_page(pte)   pfn_to_page(pte_pfn(pte))
 251
 252 #define pmd_leaf        pmd_large
 253 static inline int pmd_large(pmd_t pte)
 254 {
 255         return pmd_flags(pte) & _PAGE_PSE;
 256 }
 257
 258 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 259 static inline int pmd_trans_huge(pmd_t pmd)
 260 {
 261         return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
 262 }
 263
 264 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
 265 static inline int pud_trans_huge(pud_t pud)
 266 {
 267         return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
 268 }
 269 #endif
 270
 271 #define has_transparent_hugepage has_transparent_hugepage
 272 static inline int has_transparent_hugepage(void)
 273 {
 274         return boot_cpu_has(X86_FEATURE_PSE);
 275 }
 276
 277 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
 278 static inline int pmd_devmap(pmd_t pmd)
 279 {
 280         return !!(pmd_val(pmd) & _PAGE_DEVMAP);
 281 }
 282
 283 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
 284 static inline int pud_devmap(pud_t pud)
 285 {
 286         return !!(pud_val(pud) & _PAGE_DEVMAP);
 287 }
 288 #else
 289 static inline int pud_devmap(pud_t pud)
 290 {
 291         return 0;
 292 }
 293 #endif
 294
 295 static inline int pgd_devmap(pgd_t pgd)
 296 {
 297         return 0;
 298 }
 299 #endif
 300 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 301
 302 static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
 303 {
 304         pteval_t v = native_pte_val(pte);
 305
 306         return native_make_pte(v | set);
 307 }
 308
 309 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
 310 {
 311         pteval_t v = native_pte_val(pte);
 312
 313         return native_make_pte(v & ~clear);
 314 }
 315
 316 static inline pte_t pte_mkclean(pte_t pte)
 317 {
 318         return pte_clear_flags(pte, _PAGE_DIRTY);
 319 }
 320
 321 static inline pte_t pte_mkold(pte_t pte)
 322 {
 323         return pte_clear_flags(pte, _PAGE_ACCESSED);
 324 }
 325
 326 static inline pte_t pte_wrprotect(pte_t pte)
 327 {
 328         return pte_clear_flags(pte, _PAGE_RW);
 329 }
 330
 331 static inline pte_t pte_mkexec(pte_t pte)
 332 {
 333         return pte_clear_flags(pte, _PAGE_NX);
 334 }
 335
 336 static inline pte_t pte_mkdirty(pte_t pte)
 337 {
 338         return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
 339 }
 340
 341 static inline pte_t pte_mkyoung(pte_t pte)
 342 {
 343         return pte_set_flags(pte, _PAGE_ACCESSED);
 344 }
 345
 346 static inline pte_t pte_mkwrite(pte_t pte)
 347 {
 348         return pte_set_flags(pte, _PAGE_RW);
 349 }
 350
 351 static inline pte_t pte_mkhuge(pte_t pte)
 352 {
 353         return pte_set_flags(pte, _PAGE_PSE);
 354 }
 355
 356 static inline pte_t pte_clrhuge(pte_t pte)
 357 {
 358         return pte_clear_flags(pte, _PAGE_PSE);
 359 }
 360
 361 static inline pte_t pte_mkglobal(pte_t pte)
 362 {
 363         return pte_set_flags(pte, _PAGE_GLOBAL);
 364 }
 365
 366 static inline pte_t pte_clrglobal(pte_t pte)
 367 {
 368         return pte_clear_flags(pte, _PAGE_GLOBAL);
 369 }
 370
 371 static inline pte_t pte_mkspecial(pte_t pte)
 372 {
 373         return pte_set_flags(pte, _PAGE_SPECIAL);
 374 }
 375
 376 static inline pte_t pte_mkdevmap(pte_t pte)
 377 {
 378         return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
 379 }
 380
 381 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
 382 {
 383         pmdval_t v = native_pmd_val(pmd);
 384
 385         return native_make_pmd(v | set);
 386 }
 387
 388 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
 389 {
 390         pmdval_t v = native_pmd_val(pmd);
 391
 392         return native_make_pmd(v & ~clear);
 393 }
 394
 395 static inline pmd_t pmd_mkold(pmd_t pmd)
 396 {
 397         return pmd_clear_flags(pmd, _PAGE_ACCESSED);
 398 }
 399
 400 static inline pmd_t pmd_mkclean(pmd_t pmd)
 401 {
 402         return pmd_clear_flags(pmd, _PAGE_DIRTY);
 403 }
 404
 405 static inline pmd_t pmd_wrprotect(pmd_t pmd)
 406 {
 407         return pmd_clear_flags(pmd, _PAGE_RW);
 408 }
 409
 410 static inline pmd_t pmd_mkdirty(pmd_t pmd)
 411 {
 412         return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
 413 }
 414
 415 static inline pmd_t pmd_mkdevmap(pmd_t pmd)
 416 {
 417         return pmd_set_flags(pmd, _PAGE_DEVMAP);
 418 }
 419
 420 static inline pmd_t pmd_mkhuge(pmd_t pmd)
 421 {
 422         return pmd_set_flags(pmd, _PAGE_PSE);
 423 }
 424
 425 static inline pmd_t pmd_mkyoung(pmd_t pmd)
 426 {
 427         return pmd_set_flags(pmd, _PAGE_ACCESSED);
 428 }
 429
 430 static inline pmd_t pmd_mkwrite(pmd_t pmd)
 431 {
 432         return pmd_set_flags(pmd, _PAGE_RW);
 433 }
 434
 435 static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
 436 {
 437         pudval_t v = native_pud_val(pud);
 438
 439         return native_make_pud(v | set);
 440 }
 441
 442 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
 443 {
 444         pudval_t v = native_pud_val(pud);
 445
 446         return native_make_pud(v & ~clear);
 447 }
 448
 449 static inline pud_t pud_mkold(pud_t pud)
 450 {
 451         return pud_clear_flags(pud, _PAGE_ACCESSED);
 452 }
 453
 454 static inline pud_t pud_mkclean(pud_t pud)
 455 {
 456         return pud_clear_flags(pud, _PAGE_DIRTY);
 457 }
 458
 459 static inline pud_t pud_wrprotect(pud_t pud)
 460 {
 461         return pud_clear_flags(pud, _PAGE_RW);
 462 }
 463
 464 static inline pud_t pud_mkdirty(pud_t pud)
 465 {
 466         return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
 467 }
 468
 469 static inline pud_t pud_mkdevmap(pud_t pud)
 470 {
 471         return pud_set_flags(pud, _PAGE_DEVMAP);
 472 }
 473
 474 static inline pud_t pud_mkhuge(pud_t pud)
 475 {
 476         return pud_set_flags(pud, _PAGE_PSE);
 477 }
 478
 479 static inline pud_t pud_mkyoung(pud_t pud)
 480 {
 481         return pud_set_flags(pud, _PAGE_ACCESSED);
 482 }
 483
 484 static inline pud_t pud_mkwrite(pud_t pud)
 485 {
 486         return pud_set_flags(pud, _PAGE_RW);
 487 }
 488
 489 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
 490 static inline int pte_soft_dirty(pte_t pte)
 491 {
 492         return pte_flags(pte) & _PAGE_SOFT_DIRTY;
 493 }
 494
 495 static inline int pmd_soft_dirty(pmd_t pmd)
 496 {
 497         return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
 498 }
 499
 500 static inline int pud_soft_dirty(pud_t pud)
 501 {
 502         return pud_flags(pud) & _PAGE_SOFT_DIRTY;
 503 }
 504
 505 static inline pte_t pte_mksoft_dirty(pte_t pte)
 506 {
 507         return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
 508 }
 509
 510 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
 511 {
 512         return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
 513 }
 514
 515 static inline pud_t pud_mksoft_dirty(pud_t pud)
 516 {
 517         return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
 518 }
 519
 520 static inline pte_t pte_clear_soft_dirty(pte_t pte)
 521 {
 522         return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
 523 }
 524
 525 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
 526 {
 527         return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
 528 }
 529
 530 static inline pud_t pud_clear_soft_dirty(pud_t pud)
 531 {
 532         return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
 533 }
 534
 535 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
 536
 537 /*
 538  * Mask out unsupported bits in a present pgprot.  Non-present pgprots
 539  * can use those bits for other purposes, so leave them be.
 540  */
 541 static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
 542 {
 543         pgprotval_t protval = pgprot_val(pgprot);
 544
 545         if (protval & _PAGE_PRESENT)
 546                 protval &= __supported_pte_mask;
 547
 548         return protval;
 549 }
 550
 551 static inline pgprotval_t check_pgprot(pgprot_t pgprot)
 552 {
 553         pgprotval_t massaged_val = massage_pgprot(pgprot);
 554
 555         /* mmdebug.h can not be included here because of dependencies */
 556 #ifdef CONFIG_DEBUG_VM
 557         WARN_ONCE(pgprot_val(pgprot) != massaged_val,
 558                   "attempted to set unsupported pgprot: %016llx "
 559                   "bits: %016llx supported: %016llx\n",
 560                   (u64)pgprot_val(pgprot),
 561                   (u64)pgprot_val(pgprot) ^ massaged_val,
 562                   (u64)__supported_pte_mask);
 563 #endif
 564
 565         return massaged_val;
 566 }
 567
 568 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
 569 {
 570         phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
 571         pfn ^= protnone_mask(pgprot_val(pgprot));
 572         pfn &= PTE_PFN_MASK;
 573         return __pte(pfn | check_pgprot(pgprot));
 574 }
 575
 576 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
 577 {
 578         phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
 579         pfn ^= protnone_mask(pgprot_val(pgprot));
 580         pfn &= PHYSICAL_PMD_PAGE_MASK;
 581         return __pmd(pfn | check_pgprot(pgprot));
 582 }
 583
 584 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
 585 {
 586         phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
 587         pfn ^= protnone_mask(pgprot_val(pgprot));
 588         pfn &= PHYSICAL_PUD_PAGE_MASK;
 589         return __pud(pfn | check_pgprot(pgprot));
 590 }
 591
 592 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
 593 {
 594         return pfn_pmd(pmd_pfn(pmd),
 595                       __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
 596 }
 597
 598 static inline pud_t pud_mknotpresent(pud_t pud)
 599 {
 600         return pfn_pud(pud_pfn(pud),
 601               __pgprot(pud_flags(pud) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
 602 }
 603
 604 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
 605
 606 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 607 {
 608         pteval_t val = pte_val(pte), oldval = val;
 609
 610         /*
 611          * Chop off the NX bit (if present), and add the NX portion of
 612          * the newprot (if present):
 613          */
 614         val &= _PAGE_CHG_MASK;
 615         val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK;
 616         val = flip_protnone_guard(oldval, val, PTE_PFN_MASK);
 617         return __pte(val);
 618 }
 619
 620 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
 621 {
 622         pmdval_t val = pmd_val(pmd), oldval = val;
 623
 624         val &= _HPAGE_CHG_MASK;
 625         val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK;
 626         val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK);
 627         return __pmd(val);
 628 }
 629
 630 /* mprotect needs to preserve PAT bits when updating vm_page_prot */
 631 #define pgprot_modify pgprot_modify
 632 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
 633 {
 634         pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
 635         pgprotval_t addbits = pgprot_val(newprot);
 636         return __pgprot(preservebits | addbits);
 637 }
 638
 639 #define pte_pgprot(x) __pgprot(pte_flags(x))
 640 #define pmd_pgprot(x) __pgprot(pmd_flags(x))
 641 #define pud_pgprot(x) __pgprot(pud_flags(x))
 642 #define p4d_pgprot(x) __pgprot(p4d_flags(x))
 643
 644 #define canon_pgprot(p) __pgprot(massage_pgprot(p))
 645
 646 static inline pgprot_t arch_filter_pgprot(pgprot_t prot)
 647 {
 648         return canon_pgprot(prot);
 649 }
 650
 651 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
 652                                          enum page_cache_mode pcm,
 653                                          enum page_cache_mode new_pcm)
 654 {
 655         /*
 656          * PAT type is always WB for untracked ranges, so no need to check.
 657          */
 658         if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
 659                 return 1;
 660
 661         /*
 662          * Certain new memtypes are not allowed with certain
 663          * requested memtype:
 664          * - request is uncached, return cannot be write-back
 665          * - request is write-combine, return cannot be write-back
 666          * - request is write-through, return cannot be write-back
 667          * - request is write-through, return cannot be write-combine
 668          */
 669         if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
 670              new_pcm == _PAGE_CACHE_MODE_WB) ||
 671             (pcm == _PAGE_CACHE_MODE_WC &&
 672              new_pcm == _PAGE_CACHE_MODE_WB) ||
 673             (pcm == _PAGE_CACHE_MODE_WT &&
 674              new_pcm == _PAGE_CACHE_MODE_WB) ||
 675             (pcm == _PAGE_CACHE_MODE_WT &&
 676              new_pcm == _PAGE_CACHE_MODE_WC)) {
 677                 return 0;
 678         }
 679
 680         return 1;
 681 }
 682
 683 pmd_t *populate_extra_pmd(unsigned long vaddr);
 684 pte_t *populate_extra_pte(unsigned long vaddr);
 685
 686 #ifdef CONFIG_PAGE_TABLE_ISOLATION
 687 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd);
 688
 689 /*
 690  * Take a PGD location (pgdp) and a pgd value that needs to be set there.
 691  * Populates the user and returns the resulting PGD that must be set in
 692  * the kernel copy of the page tables.
 693  */
 694 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
 695 {
 696         if (!static_cpu_has(X86_FEATURE_PTI))
 697                 return pgd;
 698         return __pti_set_user_pgtbl(pgdp, pgd);
 699 }
 700 #else   /* CONFIG_PAGE_TABLE_ISOLATION */
 701 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
 702 {
 703         return pgd;
 704 }
 705 #endif  /* CONFIG_PAGE_TABLE_ISOLATION */
 706
 707 #endif  /* __ASSEMBLY__ */
 708
 709
 710 #ifdef CONFIG_X86_32
 711 # include <asm/pgtable_32.h>
 712 #else
 713 # include <asm/pgtable_64.h>
 714 #endif
 715
 716 #ifndef __ASSEMBLY__
 717 #include <linux/mm_types.h>
 718 #include <linux/mmdebug.h>
 719 #include <linux/log2.h>
 720 #include <asm/fixmap.h>
 721
 722 static inline int pte_none(pte_t pte)
 723 {
 724         return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
 725 }
 726
 727 #define __HAVE_ARCH_PTE_SAME
 728 static inline int pte_same(pte_t a, pte_t b)
 729 {
 730         return a.pte == b.pte;
 731 }
 732
 733 static inline int pte_present(pte_t a)
 734 {
 735         return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
 736 }
 737
 738 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
 739 static inline int pte_devmap(pte_t a)
 740 {
 741         return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
 742 }
 743 #endif
 744
 745 #define pte_accessible pte_accessible
 746 static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
 747 {
 748         if (pte_flags(a) & _PAGE_PRESENT)
 749                 return true;
 750
 751         if ((pte_flags(a) & _PAGE_PROTNONE) &&
 752                         mm_tlb_flush_pending(mm))
 753                 return true;
 754
 755         return false;
 756 }
 757
 758 static inline int pmd_present(pmd_t pmd)
 759 {
 760         /*
 761          * Checking for _PAGE_PSE is needed too because
 762          * split_huge_page will temporarily clear the present bit (but
 763          * the _PAGE_PSE flag will remain set at all times while the
 764          * _PAGE_PRESENT bit is clear).
 765          */
 766         return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
 767 }
 768
 769 #ifdef CONFIG_NUMA_BALANCING
 770 /*
 771  * These work without NUMA balancing but the kernel does not care. See the
 772  * comment in include/asm-generic/pgtable.h
 773  */
 774 static inline int pte_protnone(pte_t pte)
 775 {
 776         return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
 777                 == _PAGE_PROTNONE;
 778 }
 779
 780 static inline int pmd_protnone(pmd_t pmd)
 781 {
 782         return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
 783                 == _PAGE_PROTNONE;
 784 }
 785 #endif /* CONFIG_NUMA_BALANCING */
 786
 787 static inline int pmd_none(pmd_t pmd)
 788 {
 789         /* Only check low word on 32-bit platforms, since it might be
 790            out of sync with upper half. */
 791         unsigned long val = native_pmd_val(pmd);
 792         return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
 793 }
 794
 795 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
 796 {
 797         return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
 798 }
 799
 800 /*
 801  * Currently stuck as a macro due to indirect forward reference to
 802  * linux/mmzone.h's __section_mem_map_addr() definition:
 803  */
 804 #define pmd_page(pmd)   pfn_to_page(pmd_pfn(pmd))
 805
 806 /*
 807  * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
 808  *
 809  * this macro returns the index of the entry in the pmd page which would
 810  * control the given virtual address
 811  */
 812 static inline unsigned long pmd_index(unsigned long address)
 813 {
 814         return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
 815 }
 816
 817 /*
 818  * Conversion functions: convert a page and protection to a page entry,
 819  * and a page entry and page directory to the page they refer to.
 820  *
 821  * (Currently stuck as a macro because of indirect forward reference
 822  * to linux/mm.h:page_to_nid())
 823  */
 824 #define mk_pte(page, pgprot)   pfn_pte(page_to_pfn(page), (pgprot))
 825
 826 /*
 827  * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
 828  *
 829  * this function returns the index of the entry in the pte page which would
 830  * control the given virtual address
 831  */
 832 static inline unsigned long pte_index(unsigned long address)
 833 {
 834         return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 835 }
 836
 837 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
 838 {
 839         return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
 840 }
 841
 842 static inline int pmd_bad(pmd_t pmd)
 843 {
 844         return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
 845 }
 846
 847 static inline unsigned long pages_to_mb(unsigned long npg)
 848 {
 849         return npg >> (20 - PAGE_SHIFT);
 850 }
 851
 852 #if CONFIG_PGTABLE_LEVELS > 2
 853 static inline int pud_none(pud_t pud)
 854 {
 855         return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
 856 }
 857
 858 static inline int pud_present(pud_t pud)
 859 {
 860         return pud_flags(pud) & _PAGE_PRESENT;
 861 }
 862
 863 static inline unsigned long pud_page_vaddr(pud_t pud)
 864 {
 865         return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
 866 }
 867
 868 /*
 869  * Currently stuck as a macro due to indirect forward reference to
 870  * linux/mmzone.h's __section_mem_map_addr() definition:
 871  */
 872 #define pud_page(pud)   pfn_to_page(pud_pfn(pud))
 873
 874 /* Find an entry in the second-level page table.. */
 875 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
 876 {
 877         return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
 878 }
 879
 880 #define pud_leaf        pud_large
 881 static inline int pud_large(pud_t pud)
 882 {
 883         return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
 884                 (_PAGE_PSE | _PAGE_PRESENT);
 885 }
 886
 887 static inline int pud_bad(pud_t pud)
 888 {
 889         return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
 890 }
 891 #else
 892 #define pud_leaf        pud_large
 893 static inline int pud_large(pud_t pud)
 894 {
 895         return 0;
 896 }
 897 #endif  /* CONFIG_PGTABLE_LEVELS > 2 */
 898
 899 static inline unsigned long pud_index(unsigned long address)
 900 {
 901         return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
 902 }
 903
 904 #if CONFIG_PGTABLE_LEVELS > 3
 905 static inline int p4d_none(p4d_t p4d)
 906 {
 907         return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
 908 }
 909
 910 static inline int p4d_present(p4d_t p4d)
 911 {
 912         return p4d_flags(p4d) & _PAGE_PRESENT;
 913 }
 914
 915 static inline unsigned long p4d_page_vaddr(p4d_t p4d)
 916 {
 917         return (unsigned long)__va(p4d_val(p4d) & p4d_pfn_mask(p4d));
 918 }
 919
 920 /*
 921  * Currently stuck as a macro due to indirect forward reference to
 922  * linux/mmzone.h's __section_mem_map_addr() definition:
 923  */
 924 #define p4d_page(p4d)   pfn_to_page(p4d_pfn(p4d))
 925
 926 /* Find an entry in the third-level page table.. */
 927 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
 928 {
 929         return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address);
 930 }
 931
 932 static inline int p4d_bad(p4d_t p4d)
 933 {
 934         unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER;
 935
 936         if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
 937                 ignore_flags |= _PAGE_NX;
 938
 939         return (p4d_flags(p4d) & ~ignore_flags) != 0;
 940 }
 941 #endif  /* CONFIG_PGTABLE_LEVELS > 3 */
 942
 943 static inline unsigned long p4d_index(unsigned long address)
 944 {
 945         return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
 946 }
 947
 948 #if CONFIG_PGTABLE_LEVELS > 4
 949 static inline int pgd_present(pgd_t pgd)
 950 {
 951         if (!pgtable_l5_enabled())
 952                 return 1;
 953         return pgd_flags(pgd) & _PAGE_PRESENT;
 954 }
 955
 956 static inline unsigned long pgd_page_vaddr(pgd_t pgd)
 957 {
 958         return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
 959 }
 960
 961 /*
 962  * Currently stuck as a macro due to indirect forward reference to
 963  * linux/mmzone.h's __section_mem_map_addr() definition:
 964  */
 965 #define pgd_page(pgd)   pfn_to_page(pgd_pfn(pgd))
 966
 967 /* to find an entry in a page-table-directory. */
 968 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
 969 {
 970         if (!pgtable_l5_enabled())
 971                 return (p4d_t *)pgd;
 972         return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address);
 973 }
 974
 975 static inline int pgd_bad(pgd_t pgd)
 976 {
 977         unsigned long ignore_flags = _PAGE_USER;
 978
 979         if (!pgtable_l5_enabled())
 980                 return 0;
 981
 982         if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
 983                 ignore_flags |= _PAGE_NX;
 984
 985         return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE;
 986 }
 987
 988 static inline int pgd_none(pgd_t pgd)
 989 {
 990         if (!pgtable_l5_enabled())
 991                 return 0;
 992         /*
 993          * There is no need to do a workaround for the KNL stray
 994          * A/D bit erratum here.  PGDs only point to page tables
 995          * except on 32-bit non-PAE which is not supported on
 996          * KNL.
 997          */
 998         return !native_pgd_val(pgd);
 999 }
1000 #endif  /* CONFIG_PGTABLE_LEVELS > 4 */
1001
1002 #endif  /* __ASSEMBLY__ */
1003
1004 /*
1005  * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
1006  *
1007  * this macro returns the index of the entry in the pgd page which would
1008  * control the given virtual address
1009  */
1010 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
1011
1012 /*
1013  * pgd_offset() returns a (pgd_t *)
1014  * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
1015  */
1016 #define pgd_offset_pgd(pgd, address) (pgd + pgd_index((address)))
1017 /*
1018  * a shortcut to get a pgd_t in a given mm
1019  */
1020 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
1021 /*
1022  * a shortcut which implies the use of the kernel's pgd, instead
1023  * of a process's
1024  */
1025 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
1026
1027
1028 #define KERNEL_PGD_BOUNDARY     pgd_index(PAGE_OFFSET)
1029 #define KERNEL_PGD_PTRS         (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
1030
1031 #ifndef __ASSEMBLY__
1032
1033 extern int direct_gbpages;
1034 void init_mem_mapping(void);
1035 void early_alloc_pgt_buf(void);
1036 extern void memblock_find_dma_reserve(void);
1037
1038 #ifdef CONFIG_X86_64
1039 /* Realmode trampoline initialization. */
1040 extern pgd_t trampoline_pgd_entry;
1041 static inline void __meminit init_trampoline_default(void)
1042 {
1043         /* Default trampoline pgd value */
1044         trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)];
1045 }
1046
1047 void __init poking_init(void);
1048
1049 # ifdef CONFIG_RANDOMIZE_MEMORY
1050 void __meminit init_trampoline(void);
1051 # else
1052 #  define init_trampoline init_trampoline_default
1053 # endif
1054 #else
1055 static inline void init_trampoline(void) { }
1056 #endif
1057
1058 /* local pte updates need not use xchg for locking */
1059 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
1060 {
1061         pte_t res = *ptep;
1062
1063         /* Pure native function needs no input for mm, addr */
1064         native_pte_clear(NULL, 0, ptep);
1065         return res;
1066 }
1067
1068 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
1069 {
1070         pmd_t res = *pmdp;
1071
1072         native_pmd_clear(pmdp);
1073         return res;
1074 }
1075
1076 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
1077 {
1078         pud_t res = *pudp;
1079
1080         native_pud_clear(pudp);
1081         return res;
1082 }
1083
1084 static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
1085                                      pte_t *ptep , pte_t pte)
1086 {
1087         native_set_pte(ptep, pte);
1088 }
1089
1090 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1091                               pmd_t *pmdp, pmd_t pmd)
1092 {
1093         set_pmd(pmdp, pmd);
1094 }
1095
1096 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
1097                               pud_t *pudp, pud_t pud)
1098 {
1099         native_set_pud(pudp, pud);
1100 }
1101
1102 /*
1103  * We only update the dirty/accessed state if we set
1104  * the dirty bit by hand in the kernel, since the hardware
1105  * will do the accessed bit for us, and we don't want to
1106  * race with other CPU's that might be updating the dirty
1107  * bit at the same time.
1108  */
1109 struct vm_area_struct;
1110
1111 #define  __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1112 extern int ptep_set_access_flags(struct vm_area_struct *vma,
1113                                  unsigned long address, pte_t *ptep,
1114                                  pte_t entry, int dirty);
1115
1116 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1117 extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
1118                                      unsigned long addr, pte_t *ptep);
1119
1120 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1121 extern int ptep_clear_flush_young(struct vm_area_struct *vma,
1122                                   unsigned long address, pte_t *ptep);
1123
1124 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1125 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
1126                                        pte_t *ptep)
1127 {
1128         pte_t pte = native_ptep_get_and_clear(ptep);
1129         return pte;
1130 }
1131
1132 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1133 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1134                                             unsigned long addr, pte_t *ptep,
1135                                             int full)
1136 {
1137         pte_t pte;
1138         if (full) {
1139                 /*
1140                  * Full address destruction in progress; paravirt does not
1141                  * care about updates and native needs no locking
1142                  */
1143                 pte = native_local_ptep_get_and_clear(ptep);
1144         } else {
1145                 pte = ptep_get_and_clear(mm, addr, ptep);
1146         }
1147         return pte;
1148 }
1149
1150 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1151 static inline void ptep_set_wrprotect(struct mm_struct *mm,
1152                                       unsigned long addr, pte_t *ptep)
1153 {
1154         clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
1155 }
1156
1157 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
1158
1159 #define mk_pmd(page, pgprot)   pfn_pmd(page_to_pfn(page), (pgprot))
1160
1161 #define  __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1162 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1163                                  unsigned long address, pmd_t *pmdp,
1164                                  pmd_t entry, int dirty);
1165 extern int pudp_set_access_flags(struct vm_area_struct *vma,
1166                                  unsigned long address, pud_t *pudp,
1167                                  pud_t entry, int dirty);
1168
1169 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1170 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1171                                      unsigned long addr, pmd_t *pmdp);
1172 extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
1173                                      unsigned long addr, pud_t *pudp);
1174
1175 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1176 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1177                                   unsigned long address, pmd_t *pmdp);
1178
1179
1180 #define pmd_write pmd_write
1181 static inline int pmd_write(pmd_t pmd)
1182 {
1183         return pmd_flags(pmd) & _PAGE_RW;
1184 }
1185
1186 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1187 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
1188                                        pmd_t *pmdp)
1189 {
1190         return native_pmdp_get_and_clear(pmdp);
1191 }
1192
1193 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1194 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1195                                         unsigned long addr, pud_t *pudp)
1196 {
1197         return native_pudp_get_and_clear(pudp);
1198 }
1199
1200 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1201 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1202                                       unsigned long addr, pmd_t *pmdp)
1203 {
1204         clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
1205 }
1206
1207 #define pud_write pud_write
1208 static inline int pud_write(pud_t pud)
1209 {
1210         return pud_flags(pud) & _PAGE_RW;
1211 }
1212
1213 #ifndef pmdp_establish
1214 #define pmdp_establish pmdp_establish
1215 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
1216                 unsigned long address, pmd_t *pmdp, pmd_t pmd)
1217 {
1218         if (IS_ENABLED(CONFIG_SMP)) {
1219                 return xchg(pmdp, pmd);
1220         } else {
1221                 pmd_t old = *pmdp;
1222                 WRITE_ONCE(*pmdp, pmd);
1223                 return old;
1224         }
1225 }
1226 #endif
1227 /*
1228  * Page table pages are page-aligned.  The lower half of the top
1229  * level is used for userspace and the top half for the kernel.
1230  *
1231  * Returns true for parts of the PGD that map userspace and
1232  * false for the parts that map the kernel.
1233  */
1234 static inline bool pgdp_maps_userspace(void *__ptr)
1235 {
1236         unsigned long ptr = (unsigned long)__ptr;
1237
1238         return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START);
1239 }
1240
1241 #define pgd_leaf        pgd_large
1242 static inline int pgd_large(pgd_t pgd) { return 0; }
1243
1244 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1245 /*
1246  * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages
1247  * (8k-aligned and 8k in size).  The kernel one is at the beginning 4k and
1248  * the user one is in the last 4k.  To switch between them, you
1249  * just need to flip the 12th bit in their addresses.
1250  */
1251 #define PTI_PGTABLE_SWITCH_BIT  PAGE_SHIFT
1252
1253 /*
1254  * This generates better code than the inline assembly in
1255  * __set_bit().
1256  */
1257 static inline void *ptr_set_bit(void *ptr, int bit)
1258 {
1259         unsigned long __ptr = (unsigned long)ptr;
1260
1261         __ptr |= BIT(bit);
1262         return (void *)__ptr;
1263 }
1264 static inline void *ptr_clear_bit(void *ptr, int bit)
1265 {
1266         unsigned long __ptr = (unsigned long)ptr;
1267
1268         __ptr &= ~BIT(bit);
1269         return (void *)__ptr;
1270 }
1271
1272 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp)
1273 {
1274         return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
1275 }
1276
1277 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp)
1278 {
1279         return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
1280 }
1281
1282 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp)
1283 {
1284         return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
1285 }
1286
1287 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp)
1288 {
1289         return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
1290 }
1291 #endif /* CONFIG_PAGE_TABLE_ISOLATION */
1292
1293 /*
1294  * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1295  *
1296  *  dst - pointer to pgd range anwhere on a pgd page
1297  *  src - ""
1298  *  count - the number of pgds to copy.
1299  *
1300  * dst and src can be on the same page, but the range must not overlap,
1301  * and must not cross a page boundary.
1302  */
1303 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1304 {
1305         memcpy(dst, src, count * sizeof(pgd_t));
1306 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1307         if (!static_cpu_has(X86_FEATURE_PTI))
1308                 return;
1309         /* Clone the user space pgd as well */
1310         memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src),
1311                count * sizeof(pgd_t));
1312 #endif
1313 }
1314
1315 #define PTE_SHIFT ilog2(PTRS_PER_PTE)
1316 static inline int page_level_shift(enum pg_level level)
1317 {
1318         return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1319 }
1320 static inline unsigned long page_level_size(enum pg_level level)
1321 {
1322         return 1UL << page_level_shift(level);
1323 }
1324 static inline unsigned long page_level_mask(enum pg_level level)
1325 {
1326         return ~(page_level_size(level) - 1);
1327 }
1328
1329 /*
1330  * The x86 doesn't have any external MMU info: the kernel page
1331  * tables contain all the necessary information.
1332  */
1333 static inline void update_mmu_cache(struct vm_area_struct *vma,
1334                 unsigned long addr, pte_t *ptep)
1335 {
1336 }
1337 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1338                 unsigned long addr, pmd_t *pmd)
1339 {
1340 }
1341 static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1342                 unsigned long addr, pud_t *pud)
1343 {
1344 }
1345
1346 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1347 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1348 {
1349         return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1350 }
1351
1352 static inline int pte_swp_soft_dirty(pte_t pte)
1353 {
1354         return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1355 }
1356
1357 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1358 {
1359         return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1360 }
1361
1362 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
1363 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1364 {
1365         return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1366 }
1367
1368 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1369 {
1370         return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY;
1371 }
1372
1373 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1374 {
1375         return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1376 }
1377 #endif
1378 #endif
1379
1380 #define PKRU_AD_BIT 0x1
1381 #define PKRU_WD_BIT 0x2
1382 #define PKRU_BITS_PER_PKEY 2
1383
1384 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1385 extern u32 init_pkru_value;
1386 #else
1387 #define init_pkru_value 0
1388 #endif
1389
1390 static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
1391 {
1392         int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
1393         return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
1394 }
1395
1396 static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
1397 {
1398         int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
1399         /*
1400          * Access-disable disables writes too so we need to check
1401          * both bits here.
1402          */
1403         return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
1404 }
1405
1406 static inline u16 pte_flags_pkey(unsigned long pte_flags)
1407 {
1408 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1409         /* ifdef to avoid doing 59-bit shift on 32-bit values */
1410         return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1411 #else
1412         return 0;
1413 #endif
1414 }
1415
1416 static inline bool __pkru_allows_pkey(u16 pkey, bool write)
1417 {
1418         u32 pkru = read_pkru();
1419
1420         if (!__pkru_allows_read(pkru, pkey))
1421                 return false;
1422         if (write && !__pkru_allows_write(pkru, pkey))
1423                 return false;
1424
1425         return true;
1426 }
1427
1428 /*
1429  * 'pteval' can come from a PTE, PMD or PUD.  We only check
1430  * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
1431  * same value on all 3 types.
1432  */
1433 static inline bool __pte_access_permitted(unsigned long pteval, bool write)
1434 {
1435         unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER;
1436
1437         if (write)
1438                 need_pte_bits |= _PAGE_RW;
1439
1440         if ((pteval & need_pte_bits) != need_pte_bits)
1441                 return 0;
1442
1443         return __pkru_allows_pkey(pte_flags_pkey(pteval), write);
1444 }
1445
1446 #define pte_access_permitted pte_access_permitted
1447 static inline bool pte_access_permitted(pte_t pte, bool write)
1448 {
1449         return __pte_access_permitted(pte_val(pte), write);
1450 }
1451
1452 #define pmd_access_permitted pmd_access_permitted
1453 static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1454 {
1455         return __pte_access_permitted(pmd_val(pmd), write);
1456 }
1457
1458 #define pud_access_permitted pud_access_permitted
1459 static inline bool pud_access_permitted(pud_t pud, bool write)
1460 {
1461         return __pte_access_permitted(pud_val(pud), write);
1462 }
1463
1464 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1
1465 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot);
1466
1467 static inline bool arch_has_pfn_modify_check(void)
1468 {
1469         return boot_cpu_has_bug(X86_BUG_L1TF);
1470 }
1471
1472 #define arch_faults_on_old_pte arch_faults_on_old_pte
1473 static inline bool arch_faults_on_old_pte(void)
1474 {
1475         return false;
1476 }
1477
1478 #include <asm-generic/pgtable.h>
1479 #endif  /* __ASSEMBLY__ */
1480
1481 #endif /* _ASM_X86_PGTABLE_H */