1 // SPDX-License-Identifier: GPL-2.0-only
3 * core routines for the asynchronous memory transfer/transform api
5 * Copyright © 2006, Intel Corporation.
7 * Dan Williams <dan.j.williams@intel.com>
9 * with architecture considerations by:
10 * Neil Brown <neilb@suse.de>
11 * Jeff Garzik <jeff@garzik.org>
13 #include <linux/rculist.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/async_tx.h>
18 #ifdef CONFIG_DMA_ENGINE
19 static int __init
async_tx_init(void)
21 async_dmaengine_get();
23 printk(KERN_INFO
"async_tx: api initialized (async)\n");
28 static void __exit
async_tx_exit(void)
30 async_dmaengine_put();
33 module_init(async_tx_init
);
34 module_exit(async_tx_exit
);
37 * __async_tx_find_channel - find a channel to carry out the operation or let
38 * the transaction execute synchronously
39 * @submit: transaction dependency and submission modifiers
40 * @tx_type: transaction type
43 __async_tx_find_channel(struct async_submit_ctl
*submit
,
44 enum dma_transaction_type tx_type
)
46 struct dma_async_tx_descriptor
*depend_tx
= submit
->depend_tx
;
48 /* see if we can keep the chain on one channel */
50 dma_has_cap(tx_type
, depend_tx
->chan
->device
->cap_mask
))
51 return depend_tx
->chan
;
52 return async_dma_find_channel(tx_type
);
54 EXPORT_SYMBOL_GPL(__async_tx_find_channel
);
59 * async_tx_channel_switch - queue an interrupt descriptor with a dependency
61 * @depend_tx: the operation that must finish before the new operation runs
62 * @tx: the new operation
65 async_tx_channel_switch(struct dma_async_tx_descriptor
*depend_tx
,
66 struct dma_async_tx_descriptor
*tx
)
68 struct dma_chan
*chan
= depend_tx
->chan
;
69 struct dma_device
*device
= chan
->device
;
70 struct dma_async_tx_descriptor
*intr_tx
= (void *) ~0;
72 /* first check to see if we can still append to depend_tx */
74 if (txd_parent(depend_tx
) && depend_tx
->chan
== tx
->chan
) {
75 txd_chain(depend_tx
, tx
);
78 txd_unlock(depend_tx
);
80 /* attached dependency, flush the parent channel */
82 device
->device_issue_pending(chan
);
86 /* see if we can schedule an interrupt
87 * otherwise poll for completion
89 if (dma_has_cap(DMA_INTERRUPT
, device
->cap_mask
))
90 intr_tx
= device
->device_prep_dma_interrupt(chan
, 0);
95 intr_tx
->callback
= NULL
;
96 intr_tx
->callback_param
= NULL
;
97 /* safe to chain outside the lock since we know we are
100 txd_chain(intr_tx
, tx
);
102 /* check if we need to append */
104 if (txd_parent(depend_tx
)) {
105 txd_chain(depend_tx
, intr_tx
);
106 async_tx_ack(intr_tx
);
109 txd_unlock(depend_tx
);
112 txd_clear_parent(intr_tx
);
113 intr_tx
->tx_submit(intr_tx
);
114 async_tx_ack(intr_tx
);
116 device
->device_issue_pending(chan
);
118 if (dma_wait_for_async_tx(depend_tx
) != DMA_COMPLETE
)
119 panic("%s: DMA error waiting for depend_tx\n",
127 * submit_disposition - flags for routing an incoming operation
128 * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
129 * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
130 * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
132 * while holding depend_tx->lock we must avoid submitting new operations
133 * to prevent a circular locking dependency with drivers that already
134 * hold a channel lock when calling async_tx_run_dependencies.
136 enum submit_disposition
{
138 ASYNC_TX_CHANNEL_SWITCH
,
139 ASYNC_TX_DIRECT_SUBMIT
,
143 async_tx_submit(struct dma_chan
*chan
, struct dma_async_tx_descriptor
*tx
,
144 struct async_submit_ctl
*submit
)
146 struct dma_async_tx_descriptor
*depend_tx
= submit
->depend_tx
;
148 tx
->callback
= submit
->cb_fn
;
149 tx
->callback_param
= submit
->cb_param
;
152 enum submit_disposition s
;
154 /* sanity check the dependency chain:
155 * 1/ if ack is already set then we cannot be sure
156 * we are referring to the correct operation
157 * 2/ dependencies are 1:1 i.e. two transactions can
158 * not depend on the same parent
160 BUG_ON(async_tx_test_ack(depend_tx
) || txd_next(depend_tx
) ||
163 /* the lock prevents async_tx_run_dependencies from missing
164 * the setting of ->next when ->parent != NULL
167 if (txd_parent(depend_tx
)) {
168 /* we have a parent so we can not submit directly
169 * if we are staying on the same channel: append
170 * else: channel switch
172 if (depend_tx
->chan
== chan
) {
173 txd_chain(depend_tx
, tx
);
174 s
= ASYNC_TX_SUBMITTED
;
176 s
= ASYNC_TX_CHANNEL_SWITCH
;
178 /* we do not have a parent so we may be able to submit
179 * directly if we are staying on the same channel
181 if (depend_tx
->chan
== chan
)
182 s
= ASYNC_TX_DIRECT_SUBMIT
;
184 s
= ASYNC_TX_CHANNEL_SWITCH
;
186 txd_unlock(depend_tx
);
189 case ASYNC_TX_SUBMITTED
:
191 case ASYNC_TX_CHANNEL_SWITCH
:
192 async_tx_channel_switch(depend_tx
, tx
);
194 case ASYNC_TX_DIRECT_SUBMIT
:
195 txd_clear_parent(tx
);
200 txd_clear_parent(tx
);
204 if (submit
->flags
& ASYNC_TX_ACK
)
208 async_tx_ack(depend_tx
);
210 EXPORT_SYMBOL_GPL(async_tx_submit
);
213 * async_trigger_callback - schedules the callback function to be run
214 * @submit: submission and completion parameters
216 * honored flags: ASYNC_TX_ACK
218 * The callback is run after any dependent operations have completed.
220 struct dma_async_tx_descriptor
*
221 async_trigger_callback(struct async_submit_ctl
*submit
)
223 struct dma_chan
*chan
;
224 struct dma_device
*device
;
225 struct dma_async_tx_descriptor
*tx
;
226 struct dma_async_tx_descriptor
*depend_tx
= submit
->depend_tx
;
229 chan
= depend_tx
->chan
;
230 device
= chan
->device
;
232 /* see if we can schedule an interrupt
233 * otherwise poll for completion
235 if (device
&& !dma_has_cap(DMA_INTERRUPT
, device
->cap_mask
))
238 tx
= device
? device
->device_prep_dma_interrupt(chan
, 0) : NULL
;
243 pr_debug("%s: (async)\n", __func__
);
245 async_tx_submit(chan
, tx
, submit
);
247 pr_debug("%s: (sync)\n", __func__
);
249 /* wait for any prerequisite operations */
250 async_tx_quiesce(&submit
->depend_tx
);
252 async_tx_sync_epilog(submit
);
257 EXPORT_SYMBOL_GPL(async_trigger_callback
);
260 * async_tx_quiesce - ensure tx is complete and freeable upon return
261 * @tx - transaction to quiesce
263 void async_tx_quiesce(struct dma_async_tx_descriptor
**tx
)
266 /* if ack is already set then we cannot be sure
267 * we are referring to the correct operation
269 BUG_ON(async_tx_test_ack(*tx
));
270 if (dma_wait_for_async_tx(*tx
) != DMA_COMPLETE
)
271 panic("%s: DMA error waiting for transaction\n",
277 EXPORT_SYMBOL_GPL(async_tx_quiesce
);
279 MODULE_AUTHOR("Intel Corporation");
280 MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
281 MODULE_LICENSE("GPL");