drivers/acpi/pmic/intel_pmic_chtcrc.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Intel Cherry Trail Crystal Cove PMIC operation region driver
   4  *
   5  * Copyright (C) 2019 Hans de Goede <hdegoede@redhat.com>
   6  */
   7
   8 #include <linux/acpi.h>
   9 #include <linux/init.h>
  10 #include <linux/mfd/intel_soc_pmic.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/regmap.h>
  13 #include "intel_pmic.h"
  14
  15 /*
  16  * We have no docs for the CHT Crystal Cove PMIC. The Asus Zenfone-2 kernel
  17  * code has 2 Crystal Cove regulator drivers, one calls the PMIC a "Crystal
  18  * Cove Plus" PMIC and talks about Cherry Trail, so presuambly that one
  19  * could be used to get register info for the regulators if we need to
  20  * implement regulator support in the future.
  21  *
  22  * For now the sole purpose of this driver is to make
  23  * intel_soc_pmic_exec_mipi_pmic_seq_element work on devices with a
  24  * CHT Crystal Cove PMIC.
  25  */
  26 static struct intel_pmic_opregion_data intel_chtcrc_pmic_opregion_data = {
  27         .pmic_i2c_address = 0x6e,
  28 };
  29
  30 static int intel_chtcrc_pmic_opregion_probe(struct platform_device *pdev)
  31 {
  32         struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
  33         return intel_pmic_install_opregion_handler(&pdev->dev,
  34                         ACPI_HANDLE(pdev->dev.parent), pmic->regmap,
  35                         &intel_chtcrc_pmic_opregion_data);
  36 }
  37
  38 static struct platform_driver intel_chtcrc_pmic_opregion_driver = {
  39         .probe = intel_chtcrc_pmic_opregion_probe,
  40         .driver = {
  41                 .name = "cht_crystal_cove_pmic",
  42         },
  43 };
  44 builtin_platform_driver(intel_chtcrc_pmic_opregion_driver);