1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Mediatek Hardware Random Number Generator
5 * Copyright (C) 2017 Sean Wang <sean.wang@mediatek.com>
7 #define MTK_RNG_DEV KBUILD_MODNAME
10 #include <linux/delay.h>
11 #include <linux/err.h>
12 #include <linux/hw_random.h>
14 #include <linux/iopoll.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/pm_runtime.h>
21 /* Runtime PM autosuspend timeout: */
22 #define RNG_AUTOSUSPEND_TIMEOUT 100
25 #define TIMEOUT_POLL 20
29 #define RNG_READY BIT(31)
33 #define to_mtk_rng(p) container_of(p, struct mtk_rng, rng)
41 static int mtk_rng_init(struct hwrng
*rng
)
43 struct mtk_rng
*priv
= to_mtk_rng(rng
);
47 err
= clk_prepare_enable(priv
->clk
);
51 val
= readl(priv
->base
+ RNG_CTRL
);
53 writel(val
, priv
->base
+ RNG_CTRL
);
58 static void mtk_rng_cleanup(struct hwrng
*rng
)
60 struct mtk_rng
*priv
= to_mtk_rng(rng
);
63 val
= readl(priv
->base
+ RNG_CTRL
);
65 writel(val
, priv
->base
+ RNG_CTRL
);
67 clk_disable_unprepare(priv
->clk
);
70 static bool mtk_rng_wait_ready(struct hwrng
*rng
, bool wait
)
72 struct mtk_rng
*priv
= to_mtk_rng(rng
);
75 ready
= readl(priv
->base
+ RNG_CTRL
) & RNG_READY
;
77 readl_poll_timeout_atomic(priv
->base
+ RNG_CTRL
, ready
,
78 ready
& RNG_READY
, USEC_POLL
,
83 static int mtk_rng_read(struct hwrng
*rng
, void *buf
, size_t max
, bool wait
)
85 struct mtk_rng
*priv
= to_mtk_rng(rng
);
88 pm_runtime_get_sync((struct device
*)priv
->rng
.priv
);
90 while (max
>= sizeof(u32
)) {
91 if (!mtk_rng_wait_ready(rng
, wait
))
94 *(u32
*)buf
= readl(priv
->base
+ RNG_DATA
);
95 retval
+= sizeof(u32
);
100 pm_runtime_mark_last_busy((struct device
*)priv
->rng
.priv
);
101 pm_runtime_put_sync_autosuspend((struct device
*)priv
->rng
.priv
);
103 return retval
|| !wait
? retval
: -EIO
;
106 static int mtk_rng_probe(struct platform_device
*pdev
)
109 struct mtk_rng
*priv
;
111 priv
= devm_kzalloc(&pdev
->dev
, sizeof(*priv
), GFP_KERNEL
);
115 priv
->rng
.name
= pdev
->name
;
117 priv
->rng
.init
= mtk_rng_init
;
118 priv
->rng
.cleanup
= mtk_rng_cleanup
;
120 priv
->rng
.read
= mtk_rng_read
;
121 priv
->rng
.priv
= (unsigned long)&pdev
->dev
;
122 priv
->rng
.quality
= 900;
124 priv
->clk
= devm_clk_get(&pdev
->dev
, "rng");
125 if (IS_ERR(priv
->clk
)) {
126 ret
= PTR_ERR(priv
->clk
);
127 dev_err(&pdev
->dev
, "no clock for device: %d\n", ret
);
131 priv
->base
= devm_platform_ioremap_resource(pdev
, 0);
132 if (IS_ERR(priv
->base
))
133 return PTR_ERR(priv
->base
);
135 ret
= devm_hwrng_register(&pdev
->dev
, &priv
->rng
);
137 dev_err(&pdev
->dev
, "failed to register rng device: %d\n",
142 dev_set_drvdata(&pdev
->dev
, priv
);
143 pm_runtime_set_autosuspend_delay(&pdev
->dev
, RNG_AUTOSUSPEND_TIMEOUT
);
144 pm_runtime_use_autosuspend(&pdev
->dev
);
145 pm_runtime_enable(&pdev
->dev
);
147 dev_info(&pdev
->dev
, "registered RNG driver\n");
153 static int mtk_rng_runtime_suspend(struct device
*dev
)
155 struct mtk_rng
*priv
= dev_get_drvdata(dev
);
157 mtk_rng_cleanup(&priv
->rng
);
162 static int mtk_rng_runtime_resume(struct device
*dev
)
164 struct mtk_rng
*priv
= dev_get_drvdata(dev
);
166 return mtk_rng_init(&priv
->rng
);
169 static UNIVERSAL_DEV_PM_OPS(mtk_rng_pm_ops
, mtk_rng_runtime_suspend
,
170 mtk_rng_runtime_resume
, NULL
);
171 #define MTK_RNG_PM_OPS (&mtk_rng_pm_ops)
172 #else /* CONFIG_PM */
173 #define MTK_RNG_PM_OPS NULL
174 #endif /* CONFIG_PM */
176 static const struct of_device_id mtk_rng_match
[] = {
177 { .compatible
= "mediatek,mt7623-rng" },
180 MODULE_DEVICE_TABLE(of
, mtk_rng_match
);
182 static struct platform_driver mtk_rng_driver
= {
183 .probe
= mtk_rng_probe
,
186 .pm
= MTK_RNG_PM_OPS
,
187 .of_match_table
= mtk_rng_match
,
191 module_platform_driver(mtk_rng_driver
);
193 MODULE_DESCRIPTION("Mediatek Random Number Generator Driver");
194 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
195 MODULE_LICENSE("GPL");