drivers/crypto/qat/qat_common/adf_accel_devices.h

   1 /*
   2   This file is provided under a dual BSD/GPLv2 license.  When using or
   3   redistributing this file, you may do so under either license.
   4
   5   GPL LICENSE SUMMARY
   6   Copyright(c) 2014 Intel Corporation.
   7   This program is free software; you can redistribute it and/or modify
   8   it under the terms of version 2 of the GNU General Public License as
   9   published by the Free Software Foundation.
  10
  11   This program is distributed in the hope that it will be useful, but
  12   WITHOUT ANY WARRANTY; without even the implied warranty of
  13   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14   General Public License for more details.
  15
  16   Contact Information:
  17   qat-linux@intel.com
  18
  19   BSD LICENSE
  20   Copyright(c) 2014 Intel Corporation.
  21   Redistribution and use in source and binary forms, with or without
  22   modification, are permitted provided that the following conditions
  23   are met:
  24
  25     * Redistributions of source code must retain the above copyright
  26       notice, this list of conditions and the following disclaimer.
  27     * Redistributions in binary form must reproduce the above copyright
  28       notice, this list of conditions and the following disclaimer in
  29       the documentation and/or other materials provided with the
  30       distribution.
  31     * Neither the name of Intel Corporation nor the names of its
  32       contributors may be used to endorse or promote products derived
  33       from this software without specific prior written permission.
  34
  35   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  36   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  37   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  38   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  39   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  40   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  41   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  42   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  43   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  44   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  45   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  46 */
  47 #ifndef ADF_ACCEL_DEVICES_H_
  48 #define ADF_ACCEL_DEVICES_H_
  49 #include <linux/interrupt.h>
  50 #include <linux/module.h>
  51 #include <linux/list.h>
  52 #include <linux/io.h>
  53 #include <linux/ratelimit.h>
  54 #include "adf_cfg_common.h"
  55
  56 #define ADF_DH895XCC_DEVICE_NAME "dh895xcc"
  57 #define ADF_DH895XCCVF_DEVICE_NAME "dh895xccvf"
  58 #define ADF_C62X_DEVICE_NAME "c6xx"
  59 #define ADF_C62XVF_DEVICE_NAME "c6xxvf"
  60 #define ADF_C3XXX_DEVICE_NAME "c3xxx"
  61 #define ADF_C3XXXVF_DEVICE_NAME "c3xxxvf"
  62 #define ADF_DH895XCC_PCI_DEVICE_ID 0x435
  63 #define ADF_DH895XCCIOV_PCI_DEVICE_ID 0x443
  64 #define ADF_C62X_PCI_DEVICE_ID 0x37c8
  65 #define ADF_C62XIOV_PCI_DEVICE_ID 0x37c9
  66 #define ADF_C3XXX_PCI_DEVICE_ID 0x19e2
  67 #define ADF_C3XXXIOV_PCI_DEVICE_ID 0x19e3
  68 #define ADF_ERRSOU3 (0x3A000 + 0x0C)
  69 #define ADF_ERRSOU5 (0x3A000 + 0xD8)
  70 #define ADF_DEVICE_FUSECTL_OFFSET 0x40
  71 #define ADF_DEVICE_LEGFUSE_OFFSET 0x4C
  72 #define ADF_DEVICE_FUSECTL_MASK 0x80000000
  73 #define ADF_PCI_MAX_BARS 3
  74 #define ADF_DEVICE_NAME_LENGTH 32
  75 #define ADF_ETR_MAX_RINGS_PER_BANK 16
  76 #define ADF_MAX_MSIX_VECTOR_NAME 16
  77 #define ADF_DEVICE_NAME_PREFIX "qat_"
  78
  79 enum adf_accel_capabilities {
  80         ADF_ACCEL_CAPABILITIES_NULL = 0,
  81         ADF_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC = 1,
  82         ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC = 2,
  83         ADF_ACCEL_CAPABILITIES_CIPHER = 4,
  84         ADF_ACCEL_CAPABILITIES_AUTHENTICATION = 8,
  85         ADF_ACCEL_CAPABILITIES_COMPRESSION = 32,
  86         ADF_ACCEL_CAPABILITIES_LZS_COMPRESSION = 64,
  87         ADF_ACCEL_CAPABILITIES_RANDOM_NUMBER = 128
  88 };
  89
  90 struct adf_bar {
  91         resource_size_t base_addr;
  92         void __iomem *virt_addr;
  93         resource_size_t size;
  94 } __packed;
  95
  96 struct adf_accel_msix {
  97         struct msix_entry *entries;
  98         char **names;
  99         u32 num_entries;
 100 } __packed;
 101
 102 struct adf_accel_pci {
 103         struct pci_dev *pci_dev;
 104         struct adf_accel_msix msix_entries;
 105         struct adf_bar pci_bars[ADF_PCI_MAX_BARS];
 106         uint8_t revid;
 107         uint8_t sku;
 108 } __packed;
 109
 110 enum dev_state {
 111         DEV_DOWN = 0,
 112         DEV_UP
 113 };
 114
 115 enum dev_sku_info {
 116         DEV_SKU_1 = 0,
 117         DEV_SKU_2,
 118         DEV_SKU_3,
 119         DEV_SKU_4,
 120         DEV_SKU_VF,
 121         DEV_SKU_UNKNOWN,
 122 };
 123
 124 static inline const char *get_sku_info(enum dev_sku_info info)
 125 {
 126         switch (info) {
 127         case DEV_SKU_1:
 128                 return "SKU1";
 129         case DEV_SKU_2:
 130                 return "SKU2";
 131         case DEV_SKU_3:
 132                 return "SKU3";
 133         case DEV_SKU_4:
 134                 return "SKU4";
 135         case DEV_SKU_VF:
 136                 return "SKUVF";
 137         case DEV_SKU_UNKNOWN:
 138         default:
 139                 break;
 140         }
 141         return "Unknown SKU";
 142 }
 143
 144 struct adf_hw_device_class {
 145         const char *name;
 146         const enum adf_device_type type;
 147         uint32_t instances;
 148 } __packed;
 149
 150 struct adf_cfg_device_data;
 151 struct adf_accel_dev;
 152 struct adf_etr_data;
 153 struct adf_etr_ring_data;
 154
 155 struct adf_hw_device_data {
 156         struct adf_hw_device_class *dev_class;
 157         uint32_t (*get_accel_mask)(uint32_t fuse);
 158         uint32_t (*get_ae_mask)(uint32_t fuse);
 159         uint32_t (*get_sram_bar_id)(struct adf_hw_device_data *self);
 160         uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self);
 161         uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self);
 162         uint32_t (*get_num_aes)(struct adf_hw_device_data *self);
 163         uint32_t (*get_num_accels)(struct adf_hw_device_data *self);
 164         uint32_t (*get_pf2vf_offset)(uint32_t i);
 165         uint32_t (*get_vintmsk_offset)(uint32_t i);
 166         enum dev_sku_info (*get_sku)(struct adf_hw_device_data *self);
 167         int (*alloc_irq)(struct adf_accel_dev *accel_dev);
 168         void (*free_irq)(struct adf_accel_dev *accel_dev);
 169         void (*enable_error_correction)(struct adf_accel_dev *accel_dev);
 170         int (*init_admin_comms)(struct adf_accel_dev *accel_dev);
 171         void (*exit_admin_comms)(struct adf_accel_dev *accel_dev);
 172         int (*send_admin_init)(struct adf_accel_dev *accel_dev);
 173         int (*init_arb)(struct adf_accel_dev *accel_dev);
 174         void (*exit_arb)(struct adf_accel_dev *accel_dev);
 175         void (*get_arb_mapping)(struct adf_accel_dev *accel_dev,
 176                                 const uint32_t **cfg);
 177         void (*disable_iov)(struct adf_accel_dev *accel_dev);
 178         void (*enable_ints)(struct adf_accel_dev *accel_dev);
 179         int (*enable_vf2pf_comms)(struct adf_accel_dev *accel_dev);
 180         void (*reset_device)(struct adf_accel_dev *accel_dev);
 181         const char *fw_name;
 182         const char *fw_mmp_name;
 183         uint32_t fuses;
 184         uint32_t accel_capabilities_mask;
 185         uint32_t instance_id;
 186         uint16_t accel_mask;
 187         uint16_t ae_mask;
 188         uint16_t tx_rings_mask;
 189         uint8_t tx_rx_gap;
 190         uint8_t num_banks;
 191         uint8_t num_accel;
 192         uint8_t num_logical_accel;
 193         uint8_t num_engines;
 194         uint8_t min_iov_compat_ver;
 195 } __packed;
 196
 197 /* CSR write macro */
 198 #define ADF_CSR_WR(csr_base, csr_offset, val) \
 199         __raw_writel(val, csr_base + csr_offset)
 200
 201 /* CSR read macro */
 202 #define ADF_CSR_RD(csr_base, csr_offset) __raw_readl(csr_base + csr_offset)
 203
 204 #define GET_DEV(accel_dev) ((accel_dev)->accel_pci_dev.pci_dev->dev)
 205 #define GET_BARS(accel_dev) ((accel_dev)->accel_pci_dev.pci_bars)
 206 #define GET_HW_DATA(accel_dev) (accel_dev->hw_device)
 207 #define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)
 208 #define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines)
 209 #define accel_to_pci_dev(accel_ptr) accel_ptr->accel_pci_dev.pci_dev
 210
 211 struct adf_admin_comms;
 212 struct icp_qat_fw_loader_handle;
 213 struct adf_fw_loader_data {
 214         struct icp_qat_fw_loader_handle *fw_loader;
 215         const struct firmware *uof_fw;
 216         const struct firmware *mmp_fw;
 217 };
 218
 219 struct adf_accel_vf_info {
 220         struct adf_accel_dev *accel_dev;
 221         struct tasklet_struct vf2pf_bh_tasklet;
 222         struct mutex pf2vf_lock; /* protect CSR access for PF2VF messages */
 223         struct ratelimit_state vf2pf_ratelimit;
 224         u32 vf_nr;
 225         bool init;
 226 };
 227
 228 struct adf_accel_dev {
 229         struct adf_etr_data *transport;
 230         struct adf_hw_device_data *hw_device;
 231         struct adf_cfg_device_data *cfg;
 232         struct adf_fw_loader_data *fw_loader;
 233         struct adf_admin_comms *admin;
 234         struct list_head crypto_list;
 235         unsigned long status;
 236         atomic_t ref_count;
 237         struct dentry *debugfs_dir;
 238         struct list_head list;
 239         struct module *owner;
 240         struct adf_accel_pci accel_pci_dev;
 241         union {
 242                 struct {
 243                         /* vf_info is non-zero when SR-IOV is init'ed */
 244                         struct adf_accel_vf_info *vf_info;
 245                 } pf;
 246                 struct {
 247                         char *irq_name;
 248                         struct tasklet_struct pf2vf_bh_tasklet;
 249                         struct mutex vf2pf_lock; /* protect CSR access */
 250                         struct completion iov_msg_completion;
 251                         uint8_t compatible;
 252                         uint8_t pf_version;
 253                 } vf;
 254         };
 255         bool is_vf;
 256         u32 accel_id;
 257 } __packed;
 258 #endif