drivers/crypto/rockchip/rk3288_crypto.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __RK3288_CRYPTO_H__
   3 #define __RK3288_CRYPTO_H__
   4
   5 #include <crypto/aes.h>
   6 #include <crypto/internal/des.h>
   7 #include <crypto/algapi.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/delay.h>
  10 #include <crypto/internal/hash.h>
  11 #include <crypto/internal/skcipher.h>
  12
  13 #include <crypto/md5.h>
  14 #include <crypto/sha.h>
  15
  16 #define _SBF(v, f)                      ((v) << (f))
  17
  18 /* Crypto control registers*/
  19 #define RK_CRYPTO_INTSTS                0x0000
  20 #define RK_CRYPTO_PKA_DONE_INT          BIT(5)
  21 #define RK_CRYPTO_HASH_DONE_INT         BIT(4)
  22 #define RK_CRYPTO_HRDMA_ERR_INT         BIT(3)
  23 #define RK_CRYPTO_HRDMA_DONE_INT        BIT(2)
  24 #define RK_CRYPTO_BCDMA_ERR_INT         BIT(1)
  25 #define RK_CRYPTO_BCDMA_DONE_INT        BIT(0)
  26
  27 #define RK_CRYPTO_INTENA                0x0004
  28 #define RK_CRYPTO_PKA_DONE_ENA          BIT(5)
  29 #define RK_CRYPTO_HASH_DONE_ENA         BIT(4)
  30 #define RK_CRYPTO_HRDMA_ERR_ENA         BIT(3)
  31 #define RK_CRYPTO_HRDMA_DONE_ENA        BIT(2)
  32 #define RK_CRYPTO_BCDMA_ERR_ENA         BIT(1)
  33 #define RK_CRYPTO_BCDMA_DONE_ENA        BIT(0)
  34
  35 #define RK_CRYPTO_CTRL                  0x0008
  36 #define RK_CRYPTO_WRITE_MASK            _SBF(0xFFFF, 16)
  37 #define RK_CRYPTO_TRNG_FLUSH            BIT(9)
  38 #define RK_CRYPTO_TRNG_START            BIT(8)
  39 #define RK_CRYPTO_PKA_FLUSH             BIT(7)
  40 #define RK_CRYPTO_HASH_FLUSH            BIT(6)
  41 #define RK_CRYPTO_BLOCK_FLUSH           BIT(5)
  42 #define RK_CRYPTO_PKA_START             BIT(4)
  43 #define RK_CRYPTO_HASH_START            BIT(3)
  44 #define RK_CRYPTO_BLOCK_START           BIT(2)
  45 #define RK_CRYPTO_TDES_START            BIT(1)
  46 #define RK_CRYPTO_AES_START             BIT(0)
  47
  48 #define RK_CRYPTO_CONF                  0x000c
  49 /* HASH Receive DMA Address Mode:   fix | increment */
  50 #define RK_CRYPTO_HR_ADDR_MODE          BIT(8)
  51 /* Block Transmit DMA Address Mode: fix | increment */
  52 #define RK_CRYPTO_BT_ADDR_MODE          BIT(7)
  53 /* Block Receive DMA Address Mode:  fix | increment */
  54 #define RK_CRYPTO_BR_ADDR_MODE          BIT(6)
  55 #define RK_CRYPTO_BYTESWAP_HRFIFO       BIT(5)
  56 #define RK_CRYPTO_BYTESWAP_BTFIFO       BIT(4)
  57 #define RK_CRYPTO_BYTESWAP_BRFIFO       BIT(3)
  58 /* AES = 0 OR DES = 1 */
  59 #define RK_CRYPTO_DESSEL                                BIT(2)
  60 #define RK_CYYPTO_HASHINSEL_INDEPENDENT_SOURCE          _SBF(0x00, 0)
  61 #define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_INPUT          _SBF(0x01, 0)
  62 #define RK_CYYPTO_HASHINSEL_BLOCK_CIPHER_OUTPUT         _SBF(0x02, 0)
  63
  64 /* Block Receiving DMA Start Address Register */
  65 #define RK_CRYPTO_BRDMAS                0x0010
  66 /* Block Transmitting DMA Start Address Register */
  67 #define RK_CRYPTO_BTDMAS                0x0014
  68 /* Block Receiving DMA Length Register */
  69 #define RK_CRYPTO_BRDMAL                0x0018
  70 /* Hash Receiving DMA Start Address Register */
  71 #define RK_CRYPTO_HRDMAS                0x001c
  72 /* Hash Receiving DMA Length Register */
  73 #define RK_CRYPTO_HRDMAL                0x0020
  74
  75 /* AES registers */
  76 #define RK_CRYPTO_AES_CTRL                        0x0080
  77 #define RK_CRYPTO_AES_BYTESWAP_CNT      BIT(11)
  78 #define RK_CRYPTO_AES_BYTESWAP_KEY      BIT(10)
  79 #define RK_CRYPTO_AES_BYTESWAP_IV       BIT(9)
  80 #define RK_CRYPTO_AES_BYTESWAP_DO       BIT(8)
  81 #define RK_CRYPTO_AES_BYTESWAP_DI       BIT(7)
  82 #define RK_CRYPTO_AES_KEY_CHANGE        BIT(6)
  83 #define RK_CRYPTO_AES_ECB_MODE          _SBF(0x00, 4)
  84 #define RK_CRYPTO_AES_CBC_MODE          _SBF(0x01, 4)
  85 #define RK_CRYPTO_AES_CTR_MODE          _SBF(0x02, 4)
  86 #define RK_CRYPTO_AES_128BIT_key        _SBF(0x00, 2)
  87 #define RK_CRYPTO_AES_192BIT_key        _SBF(0x01, 2)
  88 #define RK_CRYPTO_AES_256BIT_key        _SBF(0x02, 2)
  89 /* Slave = 0 / fifo = 1 */
  90 #define RK_CRYPTO_AES_FIFO_MODE         BIT(1)
  91 /* Encryption = 0 , Decryption = 1 */
  92 #define RK_CRYPTO_AES_DEC               BIT(0)
  93
  94 #define RK_CRYPTO_AES_STS               0x0084
  95 #define RK_CRYPTO_AES_DONE              BIT(0)
  96
  97 /* AES Input Data 0-3 Register */
  98 #define RK_CRYPTO_AES_DIN_0             0x0088
  99 #define RK_CRYPTO_AES_DIN_1             0x008c
 100 #define RK_CRYPTO_AES_DIN_2             0x0090
 101 #define RK_CRYPTO_AES_DIN_3             0x0094
 102
 103 /* AES output Data 0-3 Register */
 104 #define RK_CRYPTO_AES_DOUT_0            0x0098
 105 #define RK_CRYPTO_AES_DOUT_1            0x009c
 106 #define RK_CRYPTO_AES_DOUT_2            0x00a0
 107 #define RK_CRYPTO_AES_DOUT_3            0x00a4
 108
 109 /* AES IV Data 0-3 Register */
 110 #define RK_CRYPTO_AES_IV_0              0x00a8
 111 #define RK_CRYPTO_AES_IV_1              0x00ac
 112 #define RK_CRYPTO_AES_IV_2              0x00b0
 113 #define RK_CRYPTO_AES_IV_3              0x00b4
 114
 115 /* AES Key Data 0-3 Register */
 116 #define RK_CRYPTO_AES_KEY_0             0x00b8
 117 #define RK_CRYPTO_AES_KEY_1             0x00bc
 118 #define RK_CRYPTO_AES_KEY_2             0x00c0
 119 #define RK_CRYPTO_AES_KEY_3             0x00c4
 120 #define RK_CRYPTO_AES_KEY_4             0x00c8
 121 #define RK_CRYPTO_AES_KEY_5             0x00cc
 122 #define RK_CRYPTO_AES_KEY_6             0x00d0
 123 #define RK_CRYPTO_AES_KEY_7             0x00d4
 124
 125 /* des/tdes */
 126 #define RK_CRYPTO_TDES_CTRL             0x0100
 127 #define RK_CRYPTO_TDES_BYTESWAP_KEY     BIT(8)
 128 #define RK_CRYPTO_TDES_BYTESWAP_IV      BIT(7)
 129 #define RK_CRYPTO_TDES_BYTESWAP_DO      BIT(6)
 130 #define RK_CRYPTO_TDES_BYTESWAP_DI      BIT(5)
 131 /* 0: ECB, 1: CBC */
 132 #define RK_CRYPTO_TDES_CHAINMODE_CBC    BIT(4)
 133 /* TDES Key Mode, 0 : EDE, 1 : EEE */
 134 #define RK_CRYPTO_TDES_EEE              BIT(3)
 135 /* 0: DES, 1:TDES */
 136 #define RK_CRYPTO_TDES_SELECT           BIT(2)
 137 /* 0: Slave, 1:Fifo */
 138 #define RK_CRYPTO_TDES_FIFO_MODE        BIT(1)
 139 /* Encryption = 0 , Decryption = 1 */
 140 #define RK_CRYPTO_TDES_DEC              BIT(0)
 141
 142 #define RK_CRYPTO_TDES_STS              0x0104
 143 #define RK_CRYPTO_TDES_DONE             BIT(0)
 144
 145 #define RK_CRYPTO_TDES_DIN_0            0x0108
 146 #define RK_CRYPTO_TDES_DIN_1            0x010c
 147 #define RK_CRYPTO_TDES_DOUT_0           0x0110
 148 #define RK_CRYPTO_TDES_DOUT_1           0x0114
 149 #define RK_CRYPTO_TDES_IV_0             0x0118
 150 #define RK_CRYPTO_TDES_IV_1             0x011c
 151 #define RK_CRYPTO_TDES_KEY1_0           0x0120
 152 #define RK_CRYPTO_TDES_KEY1_1           0x0124
 153 #define RK_CRYPTO_TDES_KEY2_0           0x0128
 154 #define RK_CRYPTO_TDES_KEY2_1           0x012c
 155 #define RK_CRYPTO_TDES_KEY3_0           0x0130
 156 #define RK_CRYPTO_TDES_KEY3_1           0x0134
 157
 158 /* HASH */
 159 #define RK_CRYPTO_HASH_CTRL             0x0180
 160 #define RK_CRYPTO_HASH_SWAP_DO          BIT(3)
 161 #define RK_CRYPTO_HASH_SWAP_DI          BIT(2)
 162 #define RK_CRYPTO_HASH_SHA1             _SBF(0x00, 0)
 163 #define RK_CRYPTO_HASH_MD5              _SBF(0x01, 0)
 164 #define RK_CRYPTO_HASH_SHA256           _SBF(0x02, 0)
 165 #define RK_CRYPTO_HASH_PRNG             _SBF(0x03, 0)
 166
 167 #define RK_CRYPTO_HASH_STS              0x0184
 168 #define RK_CRYPTO_HASH_DONE             BIT(0)
 169
 170 #define RK_CRYPTO_HASH_MSG_LEN          0x0188
 171 #define RK_CRYPTO_HASH_DOUT_0           0x018c
 172 #define RK_CRYPTO_HASH_DOUT_1           0x0190
 173 #define RK_CRYPTO_HASH_DOUT_2           0x0194
 174 #define RK_CRYPTO_HASH_DOUT_3           0x0198
 175 #define RK_CRYPTO_HASH_DOUT_4           0x019c
 176 #define RK_CRYPTO_HASH_DOUT_5           0x01a0
 177 #define RK_CRYPTO_HASH_DOUT_6           0x01a4
 178 #define RK_CRYPTO_HASH_DOUT_7           0x01a8
 179
 180 #define CRYPTO_READ(dev, offset)                  \
 181                 readl_relaxed(((dev)->reg + (offset)))
 182 #define CRYPTO_WRITE(dev, offset, val)    \
 183                 writel_relaxed((val), ((dev)->reg + (offset)))
 184
 185 struct rk_crypto_info {
 186         struct device                   *dev;
 187         struct clk                      *aclk;
 188         struct clk                      *hclk;
 189         struct clk                      *sclk;
 190         struct clk                      *dmaclk;
 191         struct reset_control            *rst;
 192         void __iomem                    *reg;
 193         int                             irq;
 194         struct crypto_queue             queue;
 195         struct tasklet_struct           queue_task;
 196         struct tasklet_struct           done_task;
 197         struct crypto_async_request     *async_req;
 198         int                             err;
 199         /* device lock */
 200         spinlock_t                      lock;
 201
 202         /* the public variable */
 203         struct scatterlist              *sg_src;
 204         struct scatterlist              *sg_dst;
 205         struct scatterlist              sg_tmp;
 206         struct scatterlist              *first;
 207         unsigned int                    left_bytes;
 208         void                            *addr_vir;
 209         int                             aligned;
 210         int                             align_size;
 211         size_t                          src_nents;
 212         size_t                          dst_nents;
 213         unsigned int                    total;
 214         unsigned int                    count;
 215         dma_addr_t                      addr_in;
 216         dma_addr_t                      addr_out;
 217         bool                            busy;
 218         int (*start)(struct rk_crypto_info *dev);
 219         int (*update)(struct rk_crypto_info *dev);
 220         void (*complete)(struct crypto_async_request *base, int err);
 221         int (*enable_clk)(struct rk_crypto_info *dev);
 222         void (*disable_clk)(struct rk_crypto_info *dev);
 223         int (*load_data)(struct rk_crypto_info *dev,
 224                          struct scatterlist *sg_src,
 225                          struct scatterlist *sg_dst);
 226         void (*unload_data)(struct rk_crypto_info *dev);
 227         int (*enqueue)(struct rk_crypto_info *dev,
 228                        struct crypto_async_request *async_req);
 229 };
 230
 231 /* the private variable of hash */
 232 struct rk_ahash_ctx {
 233         struct rk_crypto_info           *dev;
 234         /* for fallback */
 235         struct crypto_ahash             *fallback_tfm;
 236 };
 237
 238 /* the privete variable of hash for fallback */
 239 struct rk_ahash_rctx {
 240         struct ahash_request            fallback_req;
 241         u32                             mode;
 242 };
 243
 244 /* the private variable of cipher */
 245 struct rk_cipher_ctx {
 246         struct rk_crypto_info           *dev;
 247         unsigned int                    keylen;
 248         u32                             mode;
 249         u8                              iv[AES_BLOCK_SIZE];
 250 };
 251
 252 enum alg_type {
 253         ALG_TYPE_HASH,
 254         ALG_TYPE_CIPHER,
 255 };
 256
 257 struct rk_crypto_tmp {
 258         struct rk_crypto_info           *dev;
 259         union {
 260                 struct skcipher_alg     skcipher;
 261                 struct ahash_alg        hash;
 262         } alg;
 263         enum alg_type                   type;
 264 };
 265
 266 extern struct rk_crypto_tmp rk_ecb_aes_alg;
 267 extern struct rk_crypto_tmp rk_cbc_aes_alg;
 268 extern struct rk_crypto_tmp rk_ecb_des_alg;
 269 extern struct rk_crypto_tmp rk_cbc_des_alg;
 270 extern struct rk_crypto_tmp rk_ecb_des3_ede_alg;
 271 extern struct rk_crypto_tmp rk_cbc_des3_ede_alg;
 272
 273 extern struct rk_crypto_tmp rk_ahash_sha1;
 274 extern struct rk_crypto_tmp rk_ahash_sha256;
 275 extern struct rk_crypto_tmp rk_ahash_md5;
 276
 277 #endif