drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c

   1 /*
   2  * Copyright 2017 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include "display_mode_lib.h"
  27 #include "dc_features.h"
  28 #include "dcn20/display_mode_vba_20.h"
  29 #include "dcn20/display_rq_dlg_calc_20.h"
  30 #include "dcn20/display_mode_vba_20v2.h"
  31 #include "dcn20/display_rq_dlg_calc_20v2.h"
  32 #include "dcn21/display_mode_vba_21.h"
  33 #include "dcn21/display_rq_dlg_calc_21.h"
  34
  35 const struct dml_funcs dml20_funcs = {
  36         .validate = dml20_ModeSupportAndSystemConfigurationFull,
  37         .recalculate = dml20_recalculate,
  38         .rq_dlg_get_dlg_reg = dml20_rq_dlg_get_dlg_reg,
  39         .rq_dlg_get_rq_reg = dml20_rq_dlg_get_rq_reg
  40 };
  41
  42 const struct dml_funcs dml20v2_funcs = {
  43         .validate = dml20v2_ModeSupportAndSystemConfigurationFull,
  44         .recalculate = dml20v2_recalculate,
  45         .rq_dlg_get_dlg_reg = dml20v2_rq_dlg_get_dlg_reg,
  46         .rq_dlg_get_rq_reg = dml20v2_rq_dlg_get_rq_reg
  47 };
  48
  49 const struct dml_funcs dml21_funcs = {
  50         .validate = dml21_ModeSupportAndSystemConfigurationFull,
  51         .recalculate = dml21_recalculate,
  52         .rq_dlg_get_dlg_reg = dml21_rq_dlg_get_dlg_reg,
  53         .rq_dlg_get_rq_reg = dml21_rq_dlg_get_rq_reg
  54 };
  55
  56 void dml_init_instance(struct display_mode_lib *lib,
  57                 const struct _vcs_dpi_soc_bounding_box_st *soc_bb,
  58                 const struct _vcs_dpi_ip_params_st *ip_params,
  59                 enum dml_project project)
  60 {
  61         lib->soc = *soc_bb;
  62         lib->ip = *ip_params;
  63         lib->project = project;
  64         switch (project) {
  65         case DML_PROJECT_NAVI10:
  66                 lib->funcs = dml20_funcs;
  67                 break;
  68         case DML_PROJECT_NAVI10v2:
  69                 lib->funcs = dml20v2_funcs;
  70                 break;
  71         case DML_PROJECT_DCN21:
  72                 lib->funcs = dml21_funcs;
  73                 break;
  74
  75         default:
  76                 break;
  77         }
  78 }
  79
  80 const char *dml_get_status_message(enum dm_validation_status status)
  81 {
  82         switch (status) {
  83         case DML_VALIDATION_OK:                   return "Validation OK";
  84         case DML_FAIL_SCALE_RATIO_TAP:            return "Scale ratio/tap";
  85         case DML_FAIL_SOURCE_PIXEL_FORMAT:        return "Source pixel format";
  86         case DML_FAIL_VIEWPORT_SIZE:              return "Viewport size";
  87         case DML_FAIL_TOTAL_V_ACTIVE_BW:          return "Total vertical active bandwidth";
  88         case DML_FAIL_DIO_SUPPORT:                return "DIO support";
  89         case DML_FAIL_NOT_ENOUGH_DSC:             return "Not enough DSC Units";
  90         case DML_FAIL_DSC_CLK_REQUIRED:           return "DSC clock required";
  91         case DML_FAIL_URGENT_LATENCY:             return "Urgent latency";
  92         case DML_FAIL_REORDERING_BUFFER:          return "Re-ordering buffer";
  93         case DML_FAIL_DISPCLK_DPPCLK:             return "Dispclk and Dppclk";
  94         case DML_FAIL_TOTAL_AVAILABLE_PIPES:      return "Total available pipes";
  95         case DML_FAIL_NUM_OTG:                    return "Number of OTG";
  96         case DML_FAIL_WRITEBACK_MODE:             return "Writeback mode";
  97         case DML_FAIL_WRITEBACK_LATENCY:          return "Writeback latency";
  98         case DML_FAIL_WRITEBACK_SCALE_RATIO_TAP:  return "Writeback scale ratio/tap";
  99         case DML_FAIL_CURSOR_SUPPORT:             return "Cursor support";
 100         case DML_FAIL_PITCH_SUPPORT:              return "Pitch support";
 101         case DML_FAIL_PTE_BUFFER_SIZE:            return "PTE buffer size";
 102         case DML_FAIL_DSC_INPUT_BPC:              return "DSC input bpc";
 103         case DML_FAIL_PREFETCH_SUPPORT:           return "Prefetch support";
 104         case DML_FAIL_V_RATIO_PREFETCH:           return "Vertical ratio prefetch";
 105         default:                                  return "Unknown Status";
 106         }
 107 }