drivers/gpu/drm/amd/include/soc15_ih_clientid.h

   1 /*
   2  * Copyright 2018 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #ifndef __SOC15_IH_CLIENTID_H__
  25 #define __SOC15_IH_CLIENTID_H__
  26
  27  /*
  28   * vega10+ IH clients
  29  */
  30 enum soc15_ih_clientid {
  31         SOC15_IH_CLIENTID_IH            = 0x00,
  32         SOC15_IH_CLIENTID_ACP           = 0x01,
  33         SOC15_IH_CLIENTID_ATHUB         = 0x02,
  34         SOC15_IH_CLIENTID_BIF           = 0x03,
  35         SOC15_IH_CLIENTID_DCE           = 0x04,
  36         SOC15_IH_CLIENTID_ISP           = 0x05,
  37         SOC15_IH_CLIENTID_PCIE0         = 0x06,
  38         SOC15_IH_CLIENTID_RLC           = 0x07,
  39         SOC15_IH_CLIENTID_SDMA0         = 0x08,
  40         SOC15_IH_CLIENTID_SDMA1         = 0x09,
  41         SOC15_IH_CLIENTID_SE0SH         = 0x0a,
  42         SOC15_IH_CLIENTID_SE1SH         = 0x0b,
  43         SOC15_IH_CLIENTID_SE2SH         = 0x0c,
  44         SOC15_IH_CLIENTID_SE3SH         = 0x0d,
  45         SOC15_IH_CLIENTID_UVD1          = 0x0e,
  46         SOC15_IH_CLIENTID_THM           = 0x0f,
  47         SOC15_IH_CLIENTID_UVD           = 0x10,
  48         SOC15_IH_CLIENTID_VCE0          = 0x11,
  49         SOC15_IH_CLIENTID_VMC           = 0x12,
  50         SOC15_IH_CLIENTID_XDMA          = 0x13,
  51         SOC15_IH_CLIENTID_GRBM_CP       = 0x14,
  52         SOC15_IH_CLIENTID_ATS           = 0x15,
  53         SOC15_IH_CLIENTID_ROM_SMUIO     = 0x16,
  54         SOC15_IH_CLIENTID_DF            = 0x17,
  55         SOC15_IH_CLIENTID_VCE1          = 0x18,
  56         SOC15_IH_CLIENTID_PWR           = 0x19,
  57         SOC15_IH_CLIENTID_UTCL2         = 0x1b,
  58         SOC15_IH_CLIENTID_EA            = 0x1c,
  59         SOC15_IH_CLIENTID_UTCL2LOG      = 0x1d,
  60         SOC15_IH_CLIENTID_MP0           = 0x1e,
  61         SOC15_IH_CLIENTID_MP1           = 0x1f,
  62
  63         SOC15_IH_CLIENTID_MAX,
  64
  65         SOC15_IH_CLIENTID_VCN           = SOC15_IH_CLIENTID_UVD,
  66         SOC15_IH_CLIENTID_VCN1          = SOC15_IH_CLIENTID_UVD1,
  67         SOC15_IH_CLIENTID_SDMA2         = SOC15_IH_CLIENTID_ACP,
  68         SOC15_IH_CLIENTID_SDMA3         = SOC15_IH_CLIENTID_DCE,
  69         SOC15_IH_CLIENTID_SDMA4         = SOC15_IH_CLIENTID_ISP,
  70         SOC15_IH_CLIENTID_SDMA5         = SOC15_IH_CLIENTID_VCE0,
  71         SOC15_IH_CLIENTID_SDMA6         = SOC15_IH_CLIENTID_XDMA,
  72         SOC15_IH_CLIENTID_SDMA7         = SOC15_IH_CLIENTID_VCE1,
  73         SOC15_IH_CLIENTID_VMC1          = SOC15_IH_CLIENTID_PCIE0,
  74 };
  75
  76 #endif
  77
  78