1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Hisilicon Hibmc SoC drm driver
4 * Based on the bochs drm driver.
6 * Copyright (c) 2016 Huawei Limited.
9 * Rongrong Zou <zourongrong@huawei.com>
10 * Rongrong Zou <zourongrong@gmail.com>
11 * Jianhua Li <lijianhua@huawei.com>
14 #include <linux/console.h>
15 #include <linux/module.h>
16 #include <linux/pci.h>
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_drv.h>
20 #include <drm/drm_fb_helper.h>
21 #include <drm/drm_gem_vram_helper.h>
22 #include <drm/drm_irq.h>
23 #include <drm/drm_print.h>
24 #include <drm/drm_probe_helper.h>
25 #include <drm/drm_vblank.h>
27 #include "hibmc_drm_drv.h"
28 #include "hibmc_drm_regs.h"
30 DEFINE_DRM_GEM_FOPS(hibmc_fops
);
32 static irqreturn_t
hibmc_drm_interrupt(int irq
, void *arg
)
34 struct drm_device
*dev
= (struct drm_device
*)arg
;
35 struct hibmc_drm_private
*priv
=
36 (struct hibmc_drm_private
*)dev
->dev_private
;
39 status
= readl(priv
->mmio
+ HIBMC_RAW_INTERRUPT
);
41 if (status
& HIBMC_RAW_INTERRUPT_VBLANK(1)) {
42 writel(HIBMC_RAW_INTERRUPT_VBLANK(1),
43 priv
->mmio
+ HIBMC_RAW_INTERRUPT
);
44 drm_handle_vblank(dev
, 0);
50 static struct drm_driver hibmc_driver
= {
51 .driver_features
= DRIVER_GEM
| DRIVER_MODESET
| DRIVER_ATOMIC
,
55 .desc
= "hibmc drm driver",
58 .debugfs_init
= drm_vram_mm_debugfs_init
,
59 .dumb_create
= hibmc_dumb_create
,
60 .dumb_map_offset
= drm_gem_vram_driver_dumb_mmap_offset
,
61 .gem_prime_mmap
= drm_gem_prime_mmap
,
62 .irq_handler
= hibmc_drm_interrupt
,
65 static int __maybe_unused
hibmc_pm_suspend(struct device
*dev
)
67 struct drm_device
*drm_dev
= dev_get_drvdata(dev
);
69 return drm_mode_config_helper_suspend(drm_dev
);
72 static int __maybe_unused
hibmc_pm_resume(struct device
*dev
)
74 struct drm_device
*drm_dev
= dev_get_drvdata(dev
);
76 return drm_mode_config_helper_resume(drm_dev
);
79 static const struct dev_pm_ops hibmc_pm_ops
= {
80 SET_SYSTEM_SLEEP_PM_OPS(hibmc_pm_suspend
,
84 static int hibmc_kms_init(struct hibmc_drm_private
*priv
)
88 drm_mode_config_init(priv
->dev
);
89 priv
->mode_config_initialized
= true;
91 priv
->dev
->mode_config
.min_width
= 0;
92 priv
->dev
->mode_config
.min_height
= 0;
93 priv
->dev
->mode_config
.max_width
= 1920;
94 priv
->dev
->mode_config
.max_height
= 1440;
96 priv
->dev
->mode_config
.fb_base
= priv
->fb_base
;
97 priv
->dev
->mode_config
.preferred_depth
= 24;
98 priv
->dev
->mode_config
.prefer_shadow
= 0;
100 priv
->dev
->mode_config
.funcs
= (void *)&hibmc_mode_funcs
;
102 ret
= hibmc_de_init(priv
);
104 DRM_ERROR("failed to init de: %d\n", ret
);
108 ret
= hibmc_vdac_init(priv
);
110 DRM_ERROR("failed to init vdac: %d\n", ret
);
117 static void hibmc_kms_fini(struct hibmc_drm_private
*priv
)
119 if (priv
->mode_config_initialized
) {
120 drm_mode_config_cleanup(priv
->dev
);
121 priv
->mode_config_initialized
= false;
126 * It can operate in one of three modes: 0, 1 or Sleep.
128 void hibmc_set_power_mode(struct hibmc_drm_private
*priv
,
129 unsigned int power_mode
)
131 unsigned int control_value
= 0;
132 void __iomem
*mmio
= priv
->mmio
;
133 unsigned int input
= 1;
135 if (power_mode
> HIBMC_PW_MODE_CTL_MODE_SLEEP
)
138 if (power_mode
== HIBMC_PW_MODE_CTL_MODE_SLEEP
)
141 control_value
= readl(mmio
+ HIBMC_POWER_MODE_CTRL
);
142 control_value
&= ~(HIBMC_PW_MODE_CTL_MODE_MASK
|
143 HIBMC_PW_MODE_CTL_OSC_INPUT_MASK
);
144 control_value
|= HIBMC_FIELD(HIBMC_PW_MODE_CTL_MODE
, power_mode
);
145 control_value
|= HIBMC_FIELD(HIBMC_PW_MODE_CTL_OSC_INPUT
, input
);
146 writel(control_value
, mmio
+ HIBMC_POWER_MODE_CTRL
);
149 void hibmc_set_current_gate(struct hibmc_drm_private
*priv
, unsigned int gate
)
151 unsigned int gate_reg
;
153 void __iomem
*mmio
= priv
->mmio
;
155 /* Get current power mode. */
156 mode
= (readl(mmio
+ HIBMC_POWER_MODE_CTRL
) &
157 HIBMC_PW_MODE_CTL_MODE_MASK
) >> HIBMC_PW_MODE_CTL_MODE_SHIFT
;
160 case HIBMC_PW_MODE_CTL_MODE_MODE0
:
161 gate_reg
= HIBMC_MODE0_GATE
;
164 case HIBMC_PW_MODE_CTL_MODE_MODE1
:
165 gate_reg
= HIBMC_MODE1_GATE
;
169 gate_reg
= HIBMC_MODE0_GATE
;
172 writel(gate
, mmio
+ gate_reg
);
175 static void hibmc_hw_config(struct hibmc_drm_private
*priv
)
179 /* On hardware reset, power mode 0 is default. */
180 hibmc_set_power_mode(priv
, HIBMC_PW_MODE_CTL_MODE_MODE0
);
182 /* Enable display power gate & LOCALMEM power gate*/
183 reg
= readl(priv
->mmio
+ HIBMC_CURRENT_GATE
);
184 reg
&= ~HIBMC_CURR_GATE_DISPLAY_MASK
;
185 reg
&= ~HIBMC_CURR_GATE_LOCALMEM_MASK
;
186 reg
|= HIBMC_CURR_GATE_DISPLAY(1);
187 reg
|= HIBMC_CURR_GATE_LOCALMEM(1);
189 hibmc_set_current_gate(priv
, reg
);
192 * Reset the memory controller. If the memory controller
193 * is not reset in chip,the system might hang when sw accesses
194 * the memory.The memory should be resetted after
195 * changing the MXCLK.
197 reg
= readl(priv
->mmio
+ HIBMC_MISC_CTRL
);
198 reg
&= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK
;
199 reg
|= HIBMC_MSCCTL_LOCALMEM_RESET(0);
200 writel(reg
, priv
->mmio
+ HIBMC_MISC_CTRL
);
202 reg
&= ~HIBMC_MSCCTL_LOCALMEM_RESET_MASK
;
203 reg
|= HIBMC_MSCCTL_LOCALMEM_RESET(1);
205 writel(reg
, priv
->mmio
+ HIBMC_MISC_CTRL
);
208 static int hibmc_hw_map(struct hibmc_drm_private
*priv
)
210 struct drm_device
*dev
= priv
->dev
;
211 struct pci_dev
*pdev
= dev
->pdev
;
212 resource_size_t addr
, size
, ioaddr
, iosize
;
214 ioaddr
= pci_resource_start(pdev
, 1);
215 iosize
= pci_resource_len(pdev
, 1);
216 priv
->mmio
= devm_ioremap(dev
->dev
, ioaddr
, iosize
);
218 DRM_ERROR("Cannot map mmio region\n");
222 addr
= pci_resource_start(pdev
, 0);
223 size
= pci_resource_len(pdev
, 0);
224 priv
->fb_map
= devm_ioremap(dev
->dev
, addr
, size
);
226 DRM_ERROR("Cannot map framebuffer\n");
229 priv
->fb_base
= addr
;
230 priv
->fb_size
= size
;
235 static int hibmc_hw_init(struct hibmc_drm_private
*priv
)
239 ret
= hibmc_hw_map(priv
);
243 hibmc_hw_config(priv
);
248 static int hibmc_unload(struct drm_device
*dev
)
250 struct hibmc_drm_private
*priv
= dev
->dev_private
;
252 drm_atomic_helper_shutdown(dev
);
254 if (dev
->irq_enabled
)
255 drm_irq_uninstall(dev
);
256 if (priv
->msi_enabled
)
257 pci_disable_msi(dev
->pdev
);
259 hibmc_kms_fini(priv
);
261 dev
->dev_private
= NULL
;
265 static int hibmc_load(struct drm_device
*dev
)
267 struct hibmc_drm_private
*priv
;
270 priv
= devm_kzalloc(dev
->dev
, sizeof(*priv
), GFP_KERNEL
);
272 DRM_ERROR("no memory to allocate for hibmc_drm_private\n");
275 dev
->dev_private
= priv
;
278 ret
= hibmc_hw_init(priv
);
282 ret
= hibmc_mm_init(priv
);
286 ret
= hibmc_kms_init(priv
);
290 ret
= drm_vblank_init(dev
, dev
->mode_config
.num_crtc
);
292 DRM_ERROR("failed to initialize vblank: %d\n", ret
);
296 priv
->msi_enabled
= 0;
297 ret
= pci_enable_msi(dev
->pdev
);
299 DRM_WARN("enabling MSI failed: %d\n", ret
);
301 priv
->msi_enabled
= 1;
302 ret
= drm_irq_install(dev
, dev
->pdev
->irq
);
304 DRM_WARN("install irq failed: %d\n", ret
);
307 /* reset all the states of crtc/plane/encoder/connector */
308 drm_mode_config_reset(dev
);
310 ret
= drm_fbdev_generic_setup(dev
, 16);
312 DRM_ERROR("failed to initialize fbdev: %d\n", ret
);
320 DRM_ERROR("failed to initialize drm driver: %d\n", ret
);
324 static int hibmc_pci_probe(struct pci_dev
*pdev
,
325 const struct pci_device_id
*ent
)
327 struct drm_device
*dev
;
330 dev
= drm_dev_alloc(&hibmc_driver
, &pdev
->dev
);
332 DRM_ERROR("failed to allocate drm_device\n");
337 pci_set_drvdata(pdev
, dev
);
339 ret
= pci_enable_device(pdev
);
341 DRM_ERROR("failed to enable pci device: %d\n", ret
);
345 ret
= hibmc_load(dev
);
347 DRM_ERROR("failed to load hibmc: %d\n", ret
);
351 ret
= drm_dev_register(dev
, 0);
353 DRM_ERROR("failed to register drv for userspace access: %d\n",
362 pci_disable_device(pdev
);
369 static void hibmc_pci_remove(struct pci_dev
*pdev
)
371 struct drm_device
*dev
= pci_get_drvdata(pdev
);
373 drm_dev_unregister(dev
);
378 static struct pci_device_id hibmc_pci_table
[] = {
379 { PCI_VDEVICE(HUAWEI
, 0x1711) },
383 static struct pci_driver hibmc_pci_driver
= {
385 .id_table
= hibmc_pci_table
,
386 .probe
= hibmc_pci_probe
,
387 .remove
= hibmc_pci_remove
,
388 .driver
.pm
= &hibmc_pm_ops
,
391 module_pci_driver(hibmc_pci_driver
);
393 MODULE_DEVICE_TABLE(pci
, hibmc_pci_table
);
394 MODULE_AUTHOR("RongrongZou <zourongrong@huawei.com>");
395 MODULE_DESCRIPTION("DRM Driver for Hisilicon Hibmc");
396 MODULE_LICENSE("GPL v2");