drivers/gpu/drm/i915/gt/selftest_llc.c

   1 /*
   2  * SPDX-License-Identifier: MIT
   3  *
   4  * Copyright © 2019 Intel Corporation
   5  */
   6
   7 #include "intel_pm.h" /* intel_gpu_freq() */
   8 #include "selftest_llc.h"
   9 #include "intel_rps.h"
  10
  11 static int gen6_verify_ring_freq(struct intel_llc *llc)
  12 {
  13         struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
  14         struct ia_constants consts;
  15         intel_wakeref_t wakeref;
  16         unsigned int gpu_freq;
  17         int err = 0;
  18
  19         wakeref = intel_runtime_pm_get(llc_to_gt(llc)->uncore->rpm);
  20
  21         if (!get_ia_constants(llc, &consts)) {
  22                 err = -ENODEV;
  23                 goto out_rpm;
  24         }
  25
  26         for (gpu_freq = consts.min_gpu_freq;
  27              gpu_freq <= consts.max_gpu_freq;
  28              gpu_freq++) {
  29                 struct intel_rps *rps = &llc_to_gt(llc)->rps;
  30
  31                 unsigned int ia_freq, ring_freq, found;
  32                 u32 val;
  33
  34                 calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq);
  35
  36                 val = gpu_freq;
  37                 if (sandybridge_pcode_read(i915,
  38                                            GEN6_PCODE_READ_MIN_FREQ_TABLE,
  39                                            &val, NULL)) {
  40                         pr_err("Failed to read freq table[%d], range [%d, %d]\n",
  41                                gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq);
  42                         err = -ENXIO;
  43                         break;
  44                 }
  45
  46                 found = (val >> 0) & 0xff;
  47                 if (found != ia_freq) {
  48                         pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n",
  49                                gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
  50                                intel_gpu_freq(rps, gpu_freq * (INTEL_GEN(i915) >= 9 ? GEN9_FREQ_SCALER : 1)),
  51                                found, ia_freq);
  52                         err = -EINVAL;
  53                         break;
  54                 }
  55
  56                 found = (val >> 8) & 0xff;
  57                 if (found != ring_freq) {
  58                         pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n",
  59                                gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
  60                                intel_gpu_freq(rps, gpu_freq * (INTEL_GEN(i915) >= 9 ? GEN9_FREQ_SCALER : 1)),
  61                                found, ring_freq);
  62                         err = -EINVAL;
  63                         break;
  64                 }
  65         }
  66
  67 out_rpm:
  68         intel_runtime_pm_put(llc_to_gt(llc)->uncore->rpm, wakeref);
  69         return err;
  70 }
  71
  72 int st_llc_verify(struct intel_llc *llc)
  73 {
  74         int err = 0;
  75
  76         if (HAS_LLC(llc_to_gt(llc)->i915))
  77                 err = gen6_verify_ring_freq(llc);
  78
  79         return err;
  80 }