drivers/gpu/drm/i915/gvt/firmware.c

   1 /*
   2  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Zhi Wang <zhi.a.wang@intel.com>
  25  *
  26  * Contributors:
  27  *    Changbin Du <changbin.du@intel.com>
  28  *
  29  */
  30
  31 #include <linux/firmware.h>
  32 #include <linux/crc32.h>
  33
  34 #include "i915_drv.h"
  35 #include "gvt.h"
  36 #include "i915_pvinfo.h"
  37
  38 #define FIRMWARE_VERSION (0x0)
  39
  40 struct gvt_firmware_header {
  41         u64 magic;
  42         u32 crc32;              /* protect the data after this field */
  43         u32 version;
  44         u64 cfg_space_size;
  45         u64 cfg_space_offset;   /* offset in the file */
  46         u64 mmio_size;
  47         u64 mmio_offset;        /* offset in the file */
  48         unsigned char data[1];
  49 };
  50
  51 #define dev_to_drm_minor(d) dev_get_drvdata((d))
  52
  53 static ssize_t
  54 gvt_firmware_read(struct file *filp, struct kobject *kobj,
  55              struct bin_attribute *attr, char *buf,
  56              loff_t offset, size_t count)
  57 {
  58         memcpy(buf, attr->private + offset, count);
  59         return count;
  60 }
  61
  62 static struct bin_attribute firmware_attr = {
  63         .attr = {.name = "gvt_firmware", .mode = (S_IRUSR)},
  64         .read = gvt_firmware_read,
  65         .write = NULL,
  66         .mmap = NULL,
  67 };
  68
  69 static int mmio_snapshot_handler(struct intel_gvt *gvt, u32 offset, void *data)
  70 {
  71         struct drm_i915_private *i915 = gvt->dev_priv;
  72
  73         *(u32 *)(data + offset) = intel_uncore_read_notrace(&i915->uncore,
  74                                                             _MMIO(offset));
  75         return 0;
  76 }
  77
  78 static int expose_firmware_sysfs(struct intel_gvt *gvt)
  79 {
  80         struct intel_gvt_device_info *info = &gvt->device_info;
  81         struct pci_dev *pdev = gvt->dev_priv->drm.pdev;
  82         struct gvt_firmware_header *h;
  83         void *firmware;
  84         void *p;
  85         unsigned long size, crc32_start;
  86         int i, ret;
  87
  88         size = sizeof(*h) + info->mmio_size + info->cfg_space_size;
  89         firmware = vzalloc(size);
  90         if (!firmware)
  91                 return -ENOMEM;
  92
  93         h = firmware;
  94
  95         h->magic = VGT_MAGIC;
  96         h->version = FIRMWARE_VERSION;
  97         h->cfg_space_size = info->cfg_space_size;
  98         h->cfg_space_offset = offsetof(struct gvt_firmware_header, data);
  99         h->mmio_size = info->mmio_size;
 100         h->mmio_offset = h->cfg_space_offset + h->cfg_space_size;
 101
 102         p = firmware + h->cfg_space_offset;
 103
 104         for (i = 0; i < h->cfg_space_size; i += 4)
 105                 pci_read_config_dword(pdev, i, p + i);
 106
 107         memcpy(gvt->firmware.cfg_space, p, info->cfg_space_size);
 108
 109         p = firmware + h->mmio_offset;
 110
 111         /* Take a snapshot of hw mmio registers. */
 112         intel_gvt_for_each_tracked_mmio(gvt, mmio_snapshot_handler, p);
 113
 114         memcpy(gvt->firmware.mmio, p, info->mmio_size);
 115
 116         crc32_start = offsetof(struct gvt_firmware_header, crc32) + 4;
 117         h->crc32 = crc32_le(0, firmware + crc32_start, size - crc32_start);
 118
 119         firmware_attr.size = size;
 120         firmware_attr.private = firmware;
 121
 122         ret = device_create_bin_file(&pdev->dev, &firmware_attr);
 123         if (ret) {
 124                 vfree(firmware);
 125                 return ret;
 126         }
 127         return 0;
 128 }
 129
 130 static void clean_firmware_sysfs(struct intel_gvt *gvt)
 131 {
 132         struct pci_dev *pdev = gvt->dev_priv->drm.pdev;
 133
 134         device_remove_bin_file(&pdev->dev, &firmware_attr);
 135         vfree(firmware_attr.private);
 136 }
 137
 138 /**
 139  * intel_gvt_free_firmware - free GVT firmware
 140  * @gvt: intel gvt device
 141  *
 142  */
 143 void intel_gvt_free_firmware(struct intel_gvt *gvt)
 144 {
 145         if (!gvt->firmware.firmware_loaded)
 146                 clean_firmware_sysfs(gvt);
 147
 148         kfree(gvt->firmware.cfg_space);
 149         kfree(gvt->firmware.mmio);
 150 }
 151
 152 static int verify_firmware(struct intel_gvt *gvt,
 153                            const struct firmware *fw)
 154 {
 155         struct intel_gvt_device_info *info = &gvt->device_info;
 156         struct drm_i915_private *dev_priv = gvt->dev_priv;
 157         struct pci_dev *pdev = dev_priv->drm.pdev;
 158         struct gvt_firmware_header *h;
 159         unsigned long id, crc32_start;
 160         const void *mem;
 161         const char *item;
 162         u64 file, request;
 163
 164         h = (struct gvt_firmware_header *)fw->data;
 165
 166         crc32_start = offsetofend(struct gvt_firmware_header, crc32);
 167         mem = fw->data + crc32_start;
 168
 169 #define VERIFY(s, a, b) do { \
 170         item = (s); file = (u64)(a); request = (u64)(b); \
 171         if ((a) != (b)) \
 172                 goto invalid_firmware; \
 173 } while (0)
 174
 175         VERIFY("magic number", h->magic, VGT_MAGIC);
 176         VERIFY("version", h->version, FIRMWARE_VERSION);
 177         VERIFY("crc32", h->crc32, crc32_le(0, mem, fw->size - crc32_start));
 178         VERIFY("cfg space size", h->cfg_space_size, info->cfg_space_size);
 179         VERIFY("mmio size", h->mmio_size, info->mmio_size);
 180
 181         mem = (fw->data + h->cfg_space_offset);
 182
 183         id = *(u16 *)(mem + PCI_VENDOR_ID);
 184         VERIFY("vender id", id, pdev->vendor);
 185
 186         id = *(u16 *)(mem + PCI_DEVICE_ID);
 187         VERIFY("device id", id, pdev->device);
 188
 189         id = *(u8 *)(mem + PCI_REVISION_ID);
 190         VERIFY("revision id", id, pdev->revision);
 191
 192 #undef VERIFY
 193         return 0;
 194
 195 invalid_firmware:
 196         gvt_dbg_core("Invalid firmware: %s [file] 0x%llx [request] 0x%llx\n",
 197                      item, file, request);
 198         return -EINVAL;
 199 }
 200
 201 #define GVT_FIRMWARE_PATH "i915/gvt"
 202
 203 /**
 204  * intel_gvt_load_firmware - load GVT firmware
 205  * @gvt: intel gvt device
 206  *
 207  */
 208 int intel_gvt_load_firmware(struct intel_gvt *gvt)
 209 {
 210         struct intel_gvt_device_info *info = &gvt->device_info;
 211         struct drm_i915_private *dev_priv = gvt->dev_priv;
 212         struct pci_dev *pdev = dev_priv->drm.pdev;
 213         struct intel_gvt_firmware *firmware = &gvt->firmware;
 214         struct gvt_firmware_header *h;
 215         const struct firmware *fw;
 216         char *path;
 217         void *mem;
 218         int ret;
 219
 220         path = kmalloc(PATH_MAX, GFP_KERNEL);
 221         if (!path)
 222                 return -ENOMEM;
 223
 224         mem = kmalloc(info->cfg_space_size, GFP_KERNEL);
 225         if (!mem) {
 226                 kfree(path);
 227                 return -ENOMEM;
 228         }
 229
 230         firmware->cfg_space = mem;
 231
 232         mem = kmalloc(info->mmio_size, GFP_KERNEL);
 233         if (!mem) {
 234                 kfree(path);
 235                 kfree(firmware->cfg_space);
 236                 return -ENOMEM;
 237         }
 238
 239         firmware->mmio = mem;
 240
 241         sprintf(path, "%s/vid_0x%04x_did_0x%04x_rid_0x%02x.golden_hw_state",
 242                  GVT_FIRMWARE_PATH, pdev->vendor, pdev->device,
 243                  pdev->revision);
 244
 245         gvt_dbg_core("request hw state firmware %s...\n", path);
 246
 247         ret = request_firmware(&fw, path, &dev_priv->drm.pdev->dev);
 248         kfree(path);
 249
 250         if (ret)
 251                 goto expose_firmware;
 252
 253         gvt_dbg_core("success.\n");
 254
 255         ret = verify_firmware(gvt, fw);
 256         if (ret)
 257                 goto out_free_fw;
 258
 259         gvt_dbg_core("verified.\n");
 260
 261         h = (struct gvt_firmware_header *)fw->data;
 262
 263         memcpy(firmware->cfg_space, fw->data + h->cfg_space_offset,
 264                h->cfg_space_size);
 265         memcpy(firmware->mmio, fw->data + h->mmio_offset,
 266                h->mmio_size);
 267
 268         release_firmware(fw);
 269         firmware->firmware_loaded = true;
 270         return 0;
 271
 272 out_free_fw:
 273         release_firmware(fw);
 274 expose_firmware:
 275         expose_firmware_sysfs(gvt);
 276         return 0;
 277 }