drivers/gpu/drm/i915/i915_pmu.h

   1 /*
   2  * SPDX-License-Identifier: MIT
   3  *
   4  * Copyright © 2017-2018 Intel Corporation
   5  */
   6
   7 #ifndef __I915_PMU_H__
   8 #define __I915_PMU_H__
   9
  10 #include <linux/hrtimer.h>
  11 #include <linux/perf_event.h>
  12 #include <linux/spinlock_types.h>
  13 #include <drm/i915_drm.h>
  14
  15 struct drm_i915_private;
  16
  17 enum {
  18         __I915_SAMPLE_FREQ_ACT = 0,
  19         __I915_SAMPLE_FREQ_REQ,
  20         __I915_SAMPLE_RC6,
  21         __I915_SAMPLE_RC6_LAST_REPORTED,
  22         __I915_NUM_PMU_SAMPLERS
  23 };
  24
  25 /**
  26  * How many different events we track in the global PMU mask.
  27  *
  28  * It is also used to know to needed number of event reference counters.
  29  */
  30 #define I915_PMU_MASK_BITS \
  31         ((1 << I915_PMU_SAMPLE_BITS) + \
  32          (I915_PMU_LAST + 1 - __I915_PMU_OTHER(0)))
  33
  34 #define I915_ENGINE_SAMPLE_COUNT (I915_SAMPLE_SEMA + 1)
  35
  36 struct i915_pmu_sample {
  37         u64 cur;
  38 };
  39
  40 struct i915_pmu {
  41         /**
  42          * @node: List node for CPU hotplug handling.
  43          */
  44         struct hlist_node node;
  45         /**
  46          * @base: PMU base.
  47          */
  48         struct pmu base;
  49         /**
  50          * @name: Name as registered with perf core.
  51          */
  52         const char *name;
  53         /**
  54          * @lock: Lock protecting enable mask and ref count handling.
  55          */
  56         spinlock_t lock;
  57         /**
  58          * @timer: Timer for internal i915 PMU sampling.
  59          */
  60         struct hrtimer timer;
  61         /**
  62          * @enable: Bitmask of all currently enabled events.
  63          *
  64          * Bits are derived from uAPI event numbers in a way that low 16 bits
  65          * correspond to engine event _sample_ _type_ (I915_SAMPLE_QUEUED is
  66          * bit 0), and higher bits correspond to other events (for instance
  67          * I915_PMU_ACTUAL_FREQUENCY is bit 16 etc).
  68          *
  69          * In other words, low 16 bits are not per engine but per engine
  70          * sampler type, while the upper bits are directly mapped to other
  71          * event types.
  72          */
  73         u64 enable;
  74
  75         /**
  76          * @timer_last:
  77          *
  78          * Timestmap of the previous timer invocation.
  79          */
  80         ktime_t timer_last;
  81
  82         /**
  83          * @enable_count: Reference counts for the enabled events.
  84          *
  85          * Array indices are mapped in the same way as bits in the @enable field
  86          * and they are used to control sampling on/off when multiple clients
  87          * are using the PMU API.
  88          */
  89         unsigned int enable_count[I915_PMU_MASK_BITS];
  90         /**
  91          * @timer_enabled: Should the internal sampling timer be running.
  92          */
  93         bool timer_enabled;
  94         /**
  95          * @sample: Current and previous (raw) counters for sampling events.
  96          *
  97          * These counters are updated from the i915 PMU sampling timer.
  98          *
  99          * Only global counters are held here, while the per-engine ones are in
 100          * struct intel_engine_cs.
 101          */
 102         struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
 103         /**
 104          * @sleep_last: Last time GT parked for RC6 estimation.
 105          */
 106         ktime_t sleep_last;
 107         /**
 108          * @i915_attr: Memory block holding device attributes.
 109          */
 110         void *i915_attr;
 111         /**
 112          * @pmu_attr: Memory block holding device attributes.
 113          */
 114         void *pmu_attr;
 115 };
 116
 117 #ifdef CONFIG_PERF_EVENTS
 118 void i915_pmu_register(struct drm_i915_private *i915);
 119 void i915_pmu_unregister(struct drm_i915_private *i915);
 120 void i915_pmu_gt_parked(struct drm_i915_private *i915);
 121 void i915_pmu_gt_unparked(struct drm_i915_private *i915);
 122 #else
 123 static inline void i915_pmu_register(struct drm_i915_private *i915) {}
 124 static inline void i915_pmu_unregister(struct drm_i915_private *i915) {}
 125 static inline void i915_pmu_gt_parked(struct drm_i915_private *i915) {}
 126 static inline void i915_pmu_gt_unparked(struct drm_i915_private *i915) {}
 127 #endif
 128
 129 #endif