treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / gpu / drm / i915 / i915_sysfs.c
blob0cef3130db053e58ef0587e3d460903bd8d70839
1 /*
2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
28 #include <linux/device.h>
29 #include <linux/module.h>
30 #include <linux/stat.h>
31 #include <linux/sysfs.h>
33 #include "gt/intel_rc6.h"
34 #include "gt/intel_rps.h"
36 #include "i915_drv.h"
37 #include "i915_sysfs.h"
38 #include "intel_pm.h"
39 #include "intel_sideband.h"
41 static inline struct drm_i915_private *kdev_minor_to_i915(struct device *kdev)
43 struct drm_minor *minor = dev_get_drvdata(kdev);
44 return to_i915(minor->dev);
47 #ifdef CONFIG_PM
48 static u32 calc_residency(struct drm_i915_private *dev_priv,
49 i915_reg_t reg)
51 intel_wakeref_t wakeref;
52 u64 res = 0;
54 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref)
55 res = intel_rc6_residency_us(&dev_priv->gt.rc6, reg);
57 return DIV_ROUND_CLOSEST_ULL(res, 1000);
60 static ssize_t
61 show_rc6_mask(struct device *kdev, struct device_attribute *attr, char *buf)
63 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
64 unsigned int mask;
66 mask = 0;
67 if (HAS_RC6(dev_priv))
68 mask |= BIT(0);
69 if (HAS_RC6p(dev_priv))
70 mask |= BIT(1);
71 if (HAS_RC6pp(dev_priv))
72 mask |= BIT(2);
74 return snprintf(buf, PAGE_SIZE, "%x\n", mask);
77 static ssize_t
78 show_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
80 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
81 u32 rc6_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6);
82 return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
85 static ssize_t
86 show_rc6p_ms(struct device *kdev, struct device_attribute *attr, char *buf)
88 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
89 u32 rc6p_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6p);
90 return snprintf(buf, PAGE_SIZE, "%u\n", rc6p_residency);
93 static ssize_t
94 show_rc6pp_ms(struct device *kdev, struct device_attribute *attr, char *buf)
96 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
97 u32 rc6pp_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6pp);
98 return snprintf(buf, PAGE_SIZE, "%u\n", rc6pp_residency);
101 static ssize_t
102 show_media_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
104 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
105 u32 rc6_residency = calc_residency(dev_priv, VLV_GT_MEDIA_RC6);
106 return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
109 static DEVICE_ATTR(rc6_enable, S_IRUGO, show_rc6_mask, NULL);
110 static DEVICE_ATTR(rc6_residency_ms, S_IRUGO, show_rc6_ms, NULL);
111 static DEVICE_ATTR(rc6p_residency_ms, S_IRUGO, show_rc6p_ms, NULL);
112 static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO, show_rc6pp_ms, NULL);
113 static DEVICE_ATTR(media_rc6_residency_ms, S_IRUGO, show_media_rc6_ms, NULL);
115 static struct attribute *rc6_attrs[] = {
116 &dev_attr_rc6_enable.attr,
117 &dev_attr_rc6_residency_ms.attr,
118 NULL
121 static const struct attribute_group rc6_attr_group = {
122 .name = power_group_name,
123 .attrs = rc6_attrs
126 static struct attribute *rc6p_attrs[] = {
127 &dev_attr_rc6p_residency_ms.attr,
128 &dev_attr_rc6pp_residency_ms.attr,
129 NULL
132 static const struct attribute_group rc6p_attr_group = {
133 .name = power_group_name,
134 .attrs = rc6p_attrs
137 static struct attribute *media_rc6_attrs[] = {
138 &dev_attr_media_rc6_residency_ms.attr,
139 NULL
142 static const struct attribute_group media_rc6_attr_group = {
143 .name = power_group_name,
144 .attrs = media_rc6_attrs
146 #endif
148 static int l3_access_valid(struct drm_i915_private *i915, loff_t offset)
150 if (!HAS_L3_DPF(i915))
151 return -EPERM;
153 if (!IS_ALIGNED(offset, sizeof(u32)))
154 return -EINVAL;
156 if (offset >= GEN7_L3LOG_SIZE)
157 return -ENXIO;
159 return 0;
162 static ssize_t
163 i915_l3_read(struct file *filp, struct kobject *kobj,
164 struct bin_attribute *attr, char *buf,
165 loff_t offset, size_t count)
167 struct device *kdev = kobj_to_dev(kobj);
168 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
169 int slice = (int)(uintptr_t)attr->private;
170 int ret;
172 ret = l3_access_valid(i915, offset);
173 if (ret)
174 return ret;
176 count = round_down(count, sizeof(u32));
177 count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count);
178 memset(buf, 0, count);
180 spin_lock(&i915->gem.contexts.lock);
181 if (i915->l3_parity.remap_info[slice])
182 memcpy(buf,
183 i915->l3_parity.remap_info[slice] + offset / sizeof(u32),
184 count);
185 spin_unlock(&i915->gem.contexts.lock);
187 return count;
190 static ssize_t
191 i915_l3_write(struct file *filp, struct kobject *kobj,
192 struct bin_attribute *attr, char *buf,
193 loff_t offset, size_t count)
195 struct device *kdev = kobj_to_dev(kobj);
196 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
197 int slice = (int)(uintptr_t)attr->private;
198 u32 *remap_info, *freeme = NULL;
199 struct i915_gem_context *ctx;
200 int ret;
202 ret = l3_access_valid(i915, offset);
203 if (ret)
204 return ret;
206 if (count < sizeof(u32))
207 return -EINVAL;
209 remap_info = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL);
210 if (!remap_info)
211 return -ENOMEM;
213 spin_lock(&i915->gem.contexts.lock);
215 if (i915->l3_parity.remap_info[slice]) {
216 freeme = remap_info;
217 remap_info = i915->l3_parity.remap_info[slice];
218 } else {
219 i915->l3_parity.remap_info[slice] = remap_info;
222 count = round_down(count, sizeof(u32));
223 memcpy(remap_info + offset / sizeof(u32), buf, count);
225 /* NB: We defer the remapping until we switch to the context */
226 list_for_each_entry(ctx, &i915->gem.contexts.list, link)
227 ctx->remap_slice |= BIT(slice);
229 spin_unlock(&i915->gem.contexts.lock);
230 kfree(freeme);
233 * TODO: Ideally we really want a GPU reset here to make sure errors
234 * aren't propagated. Since I cannot find a stable way to reset the GPU
235 * at this point it is left as a TODO.
238 return count;
241 static const struct bin_attribute dpf_attrs = {
242 .attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)},
243 .size = GEN7_L3LOG_SIZE,
244 .read = i915_l3_read,
245 .write = i915_l3_write,
246 .mmap = NULL,
247 .private = (void *)0
250 static const struct bin_attribute dpf_attrs_1 = {
251 .attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)},
252 .size = GEN7_L3LOG_SIZE,
253 .read = i915_l3_read,
254 .write = i915_l3_write,
255 .mmap = NULL,
256 .private = (void *)1
259 static ssize_t gt_act_freq_mhz_show(struct device *kdev,
260 struct device_attribute *attr, char *buf)
262 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
263 struct intel_rps *rps = &i915->gt.rps;
265 return snprintf(buf, PAGE_SIZE, "%d\n",
266 intel_rps_read_actual_frequency(rps));
269 static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
270 struct device_attribute *attr, char *buf)
272 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
273 struct intel_rps *rps = &i915->gt.rps;
275 return snprintf(buf, PAGE_SIZE, "%d\n",
276 intel_gpu_freq(rps, rps->cur_freq));
279 static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
281 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
282 struct intel_rps *rps = &i915->gt.rps;
284 return snprintf(buf, PAGE_SIZE, "%d\n",
285 intel_gpu_freq(rps, rps->boost_freq));
288 static ssize_t gt_boost_freq_mhz_store(struct device *kdev,
289 struct device_attribute *attr,
290 const char *buf, size_t count)
292 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
293 struct intel_rps *rps = &dev_priv->gt.rps;
294 bool boost = false;
295 ssize_t ret;
296 u32 val;
298 ret = kstrtou32(buf, 0, &val);
299 if (ret)
300 return ret;
302 /* Validate against (static) hardware limits */
303 val = intel_freq_opcode(rps, val);
304 if (val < rps->min_freq || val > rps->max_freq)
305 return -EINVAL;
307 mutex_lock(&rps->lock);
308 if (val != rps->boost_freq) {
309 rps->boost_freq = val;
310 boost = atomic_read(&rps->num_waiters);
312 mutex_unlock(&rps->lock);
313 if (boost)
314 schedule_work(&rps->work);
316 return count;
319 static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
320 struct device_attribute *attr, char *buf)
322 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
323 struct intel_rps *rps = &dev_priv->gt.rps;
325 return snprintf(buf, PAGE_SIZE, "%d\n",
326 intel_gpu_freq(rps, rps->efficient_freq));
329 static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
331 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
332 struct intel_rps *rps = &dev_priv->gt.rps;
334 return snprintf(buf, PAGE_SIZE, "%d\n",
335 intel_gpu_freq(rps, rps->max_freq_softlimit));
338 static ssize_t gt_max_freq_mhz_store(struct device *kdev,
339 struct device_attribute *attr,
340 const char *buf, size_t count)
342 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
343 struct intel_rps *rps = &dev_priv->gt.rps;
344 ssize_t ret;
345 u32 val;
347 ret = kstrtou32(buf, 0, &val);
348 if (ret)
349 return ret;
351 mutex_lock(&rps->lock);
353 val = intel_freq_opcode(rps, val);
354 if (val < rps->min_freq ||
355 val > rps->max_freq ||
356 val < rps->min_freq_softlimit) {
357 ret = -EINVAL;
358 goto unlock;
361 if (val > rps->rp0_freq)
362 DRM_DEBUG("User requested overclocking to %d\n",
363 intel_gpu_freq(rps, val));
365 rps->max_freq_softlimit = val;
367 val = clamp_t(int, rps->cur_freq,
368 rps->min_freq_softlimit,
369 rps->max_freq_softlimit);
372 * We still need *_set_rps to process the new max_delay and
373 * update the interrupt limits and PMINTRMSK even though
374 * frequency request may be unchanged.
376 intel_rps_set(rps, val);
378 unlock:
379 mutex_unlock(&rps->lock);
381 return ret ?: count;
384 static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
386 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
387 struct intel_rps *rps = &dev_priv->gt.rps;
389 return snprintf(buf, PAGE_SIZE, "%d\n",
390 intel_gpu_freq(rps, rps->min_freq_softlimit));
393 static ssize_t gt_min_freq_mhz_store(struct device *kdev,
394 struct device_attribute *attr,
395 const char *buf, size_t count)
397 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
398 struct intel_rps *rps = &dev_priv->gt.rps;
399 ssize_t ret;
400 u32 val;
402 ret = kstrtou32(buf, 0, &val);
403 if (ret)
404 return ret;
406 mutex_lock(&rps->lock);
408 val = intel_freq_opcode(rps, val);
409 if (val < rps->min_freq ||
410 val > rps->max_freq ||
411 val > rps->max_freq_softlimit) {
412 ret = -EINVAL;
413 goto unlock;
416 rps->min_freq_softlimit = val;
418 val = clamp_t(int, rps->cur_freq,
419 rps->min_freq_softlimit,
420 rps->max_freq_softlimit);
423 * We still need *_set_rps to process the new min_delay and
424 * update the interrupt limits and PMINTRMSK even though
425 * frequency request may be unchanged.
427 intel_rps_set(rps, val);
429 unlock:
430 mutex_unlock(&rps->lock);
432 return ret ?: count;
435 static DEVICE_ATTR_RO(gt_act_freq_mhz);
436 static DEVICE_ATTR_RO(gt_cur_freq_mhz);
437 static DEVICE_ATTR_RW(gt_boost_freq_mhz);
438 static DEVICE_ATTR_RW(gt_max_freq_mhz);
439 static DEVICE_ATTR_RW(gt_min_freq_mhz);
441 static DEVICE_ATTR_RO(vlv_rpe_freq_mhz);
443 static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf);
444 static DEVICE_ATTR(gt_RP0_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
445 static DEVICE_ATTR(gt_RP1_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
446 static DEVICE_ATTR(gt_RPn_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
448 /* For now we have a static number of RP states */
449 static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
451 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
452 struct intel_rps *rps = &dev_priv->gt.rps;
453 u32 val;
455 if (attr == &dev_attr_gt_RP0_freq_mhz)
456 val = intel_gpu_freq(rps, rps->rp0_freq);
457 else if (attr == &dev_attr_gt_RP1_freq_mhz)
458 val = intel_gpu_freq(rps, rps->rp1_freq);
459 else if (attr == &dev_attr_gt_RPn_freq_mhz)
460 val = intel_gpu_freq(rps, rps->min_freq);
461 else
462 BUG();
464 return snprintf(buf, PAGE_SIZE, "%d\n", val);
467 static const struct attribute * const gen6_attrs[] = {
468 &dev_attr_gt_act_freq_mhz.attr,
469 &dev_attr_gt_cur_freq_mhz.attr,
470 &dev_attr_gt_boost_freq_mhz.attr,
471 &dev_attr_gt_max_freq_mhz.attr,
472 &dev_attr_gt_min_freq_mhz.attr,
473 &dev_attr_gt_RP0_freq_mhz.attr,
474 &dev_attr_gt_RP1_freq_mhz.attr,
475 &dev_attr_gt_RPn_freq_mhz.attr,
476 NULL,
479 static const struct attribute * const vlv_attrs[] = {
480 &dev_attr_gt_act_freq_mhz.attr,
481 &dev_attr_gt_cur_freq_mhz.attr,
482 &dev_attr_gt_boost_freq_mhz.attr,
483 &dev_attr_gt_max_freq_mhz.attr,
484 &dev_attr_gt_min_freq_mhz.attr,
485 &dev_attr_gt_RP0_freq_mhz.attr,
486 &dev_attr_gt_RP1_freq_mhz.attr,
487 &dev_attr_gt_RPn_freq_mhz.attr,
488 &dev_attr_vlv_rpe_freq_mhz.attr,
489 NULL,
492 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
494 static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
495 struct bin_attribute *attr, char *buf,
496 loff_t off, size_t count)
499 struct device *kdev = kobj_to_dev(kobj);
500 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
501 struct i915_gpu_coredump *gpu;
502 ssize_t ret;
504 gpu = i915_first_error_state(i915);
505 if (IS_ERR(gpu)) {
506 ret = PTR_ERR(gpu);
507 } else if (gpu) {
508 ret = i915_gpu_coredump_copy_to_buffer(gpu, buf, off, count);
509 i915_gpu_coredump_put(gpu);
510 } else {
511 const char *str = "No error state collected\n";
512 size_t len = strlen(str);
514 ret = min_t(size_t, count, len - off);
515 memcpy(buf, str + off, ret);
518 return ret;
521 static ssize_t error_state_write(struct file *file, struct kobject *kobj,
522 struct bin_attribute *attr, char *buf,
523 loff_t off, size_t count)
525 struct device *kdev = kobj_to_dev(kobj);
526 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
528 DRM_DEBUG_DRIVER("Resetting error state\n");
529 i915_reset_error_state(dev_priv);
531 return count;
534 static const struct bin_attribute error_state_attr = {
535 .attr.name = "error",
536 .attr.mode = S_IRUSR | S_IWUSR,
537 .size = 0,
538 .read = error_state_read,
539 .write = error_state_write,
542 static void i915_setup_error_capture(struct device *kdev)
544 if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
545 DRM_ERROR("error_state sysfs setup failed\n");
548 static void i915_teardown_error_capture(struct device *kdev)
550 sysfs_remove_bin_file(&kdev->kobj, &error_state_attr);
552 #else
553 static void i915_setup_error_capture(struct device *kdev) {}
554 static void i915_teardown_error_capture(struct device *kdev) {}
555 #endif
557 void i915_setup_sysfs(struct drm_i915_private *dev_priv)
559 struct device *kdev = dev_priv->drm.primary->kdev;
560 int ret;
562 #ifdef CONFIG_PM
563 if (HAS_RC6(dev_priv)) {
564 ret = sysfs_merge_group(&kdev->kobj,
565 &rc6_attr_group);
566 if (ret)
567 DRM_ERROR("RC6 residency sysfs setup failed\n");
569 if (HAS_RC6p(dev_priv)) {
570 ret = sysfs_merge_group(&kdev->kobj,
571 &rc6p_attr_group);
572 if (ret)
573 DRM_ERROR("RC6p residency sysfs setup failed\n");
575 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
576 ret = sysfs_merge_group(&kdev->kobj,
577 &media_rc6_attr_group);
578 if (ret)
579 DRM_ERROR("Media RC6 residency sysfs setup failed\n");
581 #endif
582 if (HAS_L3_DPF(dev_priv)) {
583 ret = device_create_bin_file(kdev, &dpf_attrs);
584 if (ret)
585 DRM_ERROR("l3 parity sysfs setup failed\n");
587 if (NUM_L3_SLICES(dev_priv) > 1) {
588 ret = device_create_bin_file(kdev,
589 &dpf_attrs_1);
590 if (ret)
591 DRM_ERROR("l3 parity slice 1 setup failed\n");
595 ret = 0;
596 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
597 ret = sysfs_create_files(&kdev->kobj, vlv_attrs);
598 else if (INTEL_GEN(dev_priv) >= 6)
599 ret = sysfs_create_files(&kdev->kobj, gen6_attrs);
600 if (ret)
601 DRM_ERROR("RPS sysfs setup failed\n");
603 i915_setup_error_capture(kdev);
606 void i915_teardown_sysfs(struct drm_i915_private *dev_priv)
608 struct device *kdev = dev_priv->drm.primary->kdev;
610 i915_teardown_error_capture(kdev);
612 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
613 sysfs_remove_files(&kdev->kobj, vlv_attrs);
614 else
615 sysfs_remove_files(&kdev->kobj, gen6_attrs);
616 device_remove_bin_file(kdev, &dpf_attrs_1);
617 device_remove_bin_file(kdev, &dpf_attrs);
618 #ifdef CONFIG_PM
619 sysfs_unmerge_group(&kdev->kobj, &rc6_attr_group);
620 sysfs_unmerge_group(&kdev->kobj, &rc6p_attr_group);
621 #endif