1 // SPDX-License-Identifier: MIT
3 * Copyright © 2018 Intel Corporation
5 * Autogenerated file by GPU Top : https://github.com/rib/gputop
6 * DO NOT EDIT manually!
9 #include <linux/sysfs.h>
12 #include "i915_oa_tgl.h"
14 static const struct i915_oa_reg b_counter_config_test_oa
[] = {
15 { _MMIO(0xD920), 0x00000000 },
16 { _MMIO(0xD900), 0x00000000 },
17 { _MMIO(0xD904), 0xF0800000 },
18 { _MMIO(0xD910), 0x00000000 },
19 { _MMIO(0xD914), 0xF0800000 },
20 { _MMIO(0xDC40), 0x00FF0000 },
21 { _MMIO(0xD940), 0x00000004 },
22 { _MMIO(0xD944), 0x0000FFFF },
23 { _MMIO(0xDC00), 0x00000004 },
24 { _MMIO(0xDC04), 0x0000FFFF },
25 { _MMIO(0xD948), 0x00000003 },
26 { _MMIO(0xD94C), 0x0000FFFF },
27 { _MMIO(0xDC08), 0x00000003 },
28 { _MMIO(0xDC0C), 0x0000FFFF },
29 { _MMIO(0xD950), 0x00000007 },
30 { _MMIO(0xD954), 0x0000FFFF },
31 { _MMIO(0xDC10), 0x00000007 },
32 { _MMIO(0xDC14), 0x0000FFFF },
33 { _MMIO(0xD958), 0x00100002 },
34 { _MMIO(0xD95C), 0x0000FFF7 },
35 { _MMIO(0xDC18), 0x00100002 },
36 { _MMIO(0xDC1C), 0x0000FFF7 },
37 { _MMIO(0xD960), 0x00100002 },
38 { _MMIO(0xD964), 0x0000FFCF },
39 { _MMIO(0xDC20), 0x00100002 },
40 { _MMIO(0xDC24), 0x0000FFCF },
41 { _MMIO(0xD968), 0x00100082 },
42 { _MMIO(0xD96C), 0x0000FFEF },
43 { _MMIO(0xDC28), 0x00100082 },
44 { _MMIO(0xDC2C), 0x0000FFEF },
45 { _MMIO(0xD970), 0x001000C2 },
46 { _MMIO(0xD974), 0x0000FFE7 },
47 { _MMIO(0xDC30), 0x001000C2 },
48 { _MMIO(0xDC34), 0x0000FFE7 },
49 { _MMIO(0xD978), 0x00100001 },
50 { _MMIO(0xD97C), 0x0000FFE7 },
51 { _MMIO(0xDC38), 0x00100001 },
52 { _MMIO(0xDC3C), 0x0000FFE7 },
55 static const struct i915_oa_reg flex_eu_config_test_oa
[] = {
58 static const struct i915_oa_reg mux_config_test_oa
[] = {
59 { _MMIO(0x0D04), 0x00000200 },
60 { _MMIO(0x9840), 0x00000000 },
61 { _MMIO(0x9884), 0x00000000 },
62 { _MMIO(0x9888), 0x280E0000 },
63 { _MMIO(0x9888), 0x1E0E0147 },
64 { _MMIO(0x9888), 0x180E0000 },
65 { _MMIO(0x9888), 0x160E0000 },
66 { _MMIO(0x9888), 0x1E0F1000 },
67 { _MMIO(0x9888), 0x1E104000 },
68 { _MMIO(0x9888), 0x2E020100 },
69 { _MMIO(0x9888), 0x2C030004 },
70 { _MMIO(0x9888), 0x38003000 },
71 { _MMIO(0x9888), 0x1E0A8000 },
72 { _MMIO(0x9884), 0x00000003 },
73 { _MMIO(0x9888), 0x49110000 },
74 { _MMIO(0x9888), 0x5D101400 },
75 { _MMIO(0x9888), 0x1D140020 },
76 { _MMIO(0x9888), 0x1D1103A3 },
77 { _MMIO(0x9888), 0x01110000 },
78 { _MMIO(0x9888), 0x61111000 },
79 { _MMIO(0x9888), 0x1F128000 },
80 { _MMIO(0x9888), 0x17100000 },
81 { _MMIO(0x9888), 0x55100630 },
82 { _MMIO(0x9888), 0x57100000 },
83 { _MMIO(0x9888), 0x31100000 },
84 { _MMIO(0x9884), 0x00000003 },
85 { _MMIO(0x9888), 0x65100002 },
86 { _MMIO(0x9884), 0x00000000 },
87 { _MMIO(0x9888), 0x42000001 },
91 show_test_oa_id(struct device
*kdev
, struct device_attribute
*attr
, char *buf
)
93 return sprintf(buf
, "1\n");
97 i915_perf_load_test_config_tgl(struct drm_i915_private
*dev_priv
)
99 strlcpy(dev_priv
->perf
.test_config
.uuid
,
100 "80a833f0-2504-4321-8894-e9277844ce7b",
101 sizeof(dev_priv
->perf
.test_config
.uuid
));
102 dev_priv
->perf
.test_config
.id
= 1;
104 dev_priv
->perf
.test_config
.mux_regs
= mux_config_test_oa
;
105 dev_priv
->perf
.test_config
.mux_regs_len
= ARRAY_SIZE(mux_config_test_oa
);
107 dev_priv
->perf
.test_config
.b_counter_regs
= b_counter_config_test_oa
;
108 dev_priv
->perf
.test_config
.b_counter_regs_len
= ARRAY_SIZE(b_counter_config_test_oa
);
110 dev_priv
->perf
.test_config
.flex_regs
= flex_eu_config_test_oa
;
111 dev_priv
->perf
.test_config
.flex_regs_len
= ARRAY_SIZE(flex_eu_config_test_oa
);
113 dev_priv
->perf
.test_config
.sysfs_metric
.name
= "80a833f0-2504-4321-8894-e9277844ce7b";
114 dev_priv
->perf
.test_config
.sysfs_metric
.attrs
= dev_priv
->perf
.test_config
.attrs
;
116 dev_priv
->perf
.test_config
.attrs
[0] = &dev_priv
->perf
.test_config
.sysfs_metric_id
.attr
;
118 dev_priv
->perf
.test_config
.sysfs_metric_id
.attr
.name
= "id";
119 dev_priv
->perf
.test_config
.sysfs_metric_id
.attr
.mode
= 0444;
120 dev_priv
->perf
.test_config
.sysfs_metric_id
.show
= show_test_oa_id
;