1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
4 #include <linux/regulator/consumer.h>
5 #include <linux/reset.h>
7 #include <linux/dma-mapping.h>
8 #include <linux/platform_device.h>
10 #include "lima_device.h"
15 #include "lima_l2_cache.h"
16 #include "lima_dlbu.h"
17 #include "lima_bcast.h"
23 bool must_have
[lima_gpu_num
];
24 int offset
[lima_gpu_num
];
26 int (*init
)(struct lima_ip
*ip
);
27 void (*fini
)(struct lima_ip
*ip
);
30 #define LIMA_IP_DESC(ipname, mst0, mst1, off0, off1, func, irq) \
31 [lima_ip_##ipname] = { \
35 [lima_gpu_mali400] = mst0, \
36 [lima_gpu_mali450] = mst1, \
39 [lima_gpu_mali400] = off0, \
40 [lima_gpu_mali450] = off1, \
42 .init = lima_##func##_init, \
43 .fini = lima_##func##_fini, \
46 static struct lima_ip_desc lima_ip_desc
[lima_ip_num
] = {
47 LIMA_IP_DESC(pmu
, false, false, 0x02000, 0x02000, pmu
, "pmu"),
48 LIMA_IP_DESC(l2_cache0
, true, true, 0x01000, 0x10000, l2_cache
, NULL
),
49 LIMA_IP_DESC(l2_cache1
, false, true, -1, 0x01000, l2_cache
, NULL
),
50 LIMA_IP_DESC(l2_cache2
, false, false, -1, 0x11000, l2_cache
, NULL
),
51 LIMA_IP_DESC(gp
, true, true, 0x00000, 0x00000, gp
, "gp"),
52 LIMA_IP_DESC(pp0
, true, true, 0x08000, 0x08000, pp
, "pp0"),
53 LIMA_IP_DESC(pp1
, false, false, 0x0A000, 0x0A000, pp
, "pp1"),
54 LIMA_IP_DESC(pp2
, false, false, 0x0C000, 0x0C000, pp
, "pp2"),
55 LIMA_IP_DESC(pp3
, false, false, 0x0E000, 0x0E000, pp
, "pp3"),
56 LIMA_IP_DESC(pp4
, false, false, -1, 0x28000, pp
, "pp4"),
57 LIMA_IP_DESC(pp5
, false, false, -1, 0x2A000, pp
, "pp5"),
58 LIMA_IP_DESC(pp6
, false, false, -1, 0x2C000, pp
, "pp6"),
59 LIMA_IP_DESC(pp7
, false, false, -1, 0x2E000, pp
, "pp7"),
60 LIMA_IP_DESC(gpmmu
, true, true, 0x03000, 0x03000, mmu
, "gpmmu"),
61 LIMA_IP_DESC(ppmmu0
, true, true, 0x04000, 0x04000, mmu
, "ppmmu0"),
62 LIMA_IP_DESC(ppmmu1
, false, false, 0x05000, 0x05000, mmu
, "ppmmu1"),
63 LIMA_IP_DESC(ppmmu2
, false, false, 0x06000, 0x06000, mmu
, "ppmmu2"),
64 LIMA_IP_DESC(ppmmu3
, false, false, 0x07000, 0x07000, mmu
, "ppmmu3"),
65 LIMA_IP_DESC(ppmmu4
, false, false, -1, 0x1C000, mmu
, "ppmmu4"),
66 LIMA_IP_DESC(ppmmu5
, false, false, -1, 0x1D000, mmu
, "ppmmu5"),
67 LIMA_IP_DESC(ppmmu6
, false, false, -1, 0x1E000, mmu
, "ppmmu6"),
68 LIMA_IP_DESC(ppmmu7
, false, false, -1, 0x1F000, mmu
, "ppmmu7"),
69 LIMA_IP_DESC(dlbu
, false, true, -1, 0x14000, dlbu
, NULL
),
70 LIMA_IP_DESC(bcast
, false, true, -1, 0x13000, bcast
, NULL
),
71 LIMA_IP_DESC(pp_bcast
, false, true, -1, 0x16000, pp_bcast
, "pp"),
72 LIMA_IP_DESC(ppmmu_bcast
, false, true, -1, 0x15000, mmu
, NULL
),
75 const char *lima_ip_name(struct lima_ip
*ip
)
77 return lima_ip_desc
[ip
->id
].name
;
80 static int lima_clk_init(struct lima_device
*dev
)
84 dev
->clk_bus
= devm_clk_get(dev
->dev
, "bus");
85 if (IS_ERR(dev
->clk_bus
)) {
86 err
= PTR_ERR(dev
->clk_bus
);
87 if (err
!= -EPROBE_DEFER
)
88 dev_err(dev
->dev
, "get bus clk failed %d\n", err
);
92 dev
->clk_gpu
= devm_clk_get(dev
->dev
, "core");
93 if (IS_ERR(dev
->clk_gpu
)) {
94 err
= PTR_ERR(dev
->clk_gpu
);
95 if (err
!= -EPROBE_DEFER
)
96 dev_err(dev
->dev
, "get core clk failed %d\n", err
);
100 err
= clk_prepare_enable(dev
->clk_bus
);
104 err
= clk_prepare_enable(dev
->clk_gpu
);
108 dev
->reset
= devm_reset_control_array_get_optional_shared(dev
->dev
);
110 if (IS_ERR(dev
->reset
)) {
111 err
= PTR_ERR(dev
->reset
);
112 if (err
!= -EPROBE_DEFER
)
113 dev_err(dev
->dev
, "get reset controller failed %d\n",
116 } else if (dev
->reset
!= NULL
) {
117 err
= reset_control_deassert(dev
->reset
);
120 "reset controller deassert failed %d\n", err
);
128 clk_disable_unprepare(dev
->clk_gpu
);
130 clk_disable_unprepare(dev
->clk_bus
);
134 static void lima_clk_fini(struct lima_device
*dev
)
136 if (dev
->reset
!= NULL
)
137 reset_control_assert(dev
->reset
);
138 clk_disable_unprepare(dev
->clk_gpu
);
139 clk_disable_unprepare(dev
->clk_bus
);
142 static int lima_regulator_init(struct lima_device
*dev
)
146 dev
->regulator
= devm_regulator_get_optional(dev
->dev
, "mali");
147 if (IS_ERR(dev
->regulator
)) {
148 ret
= PTR_ERR(dev
->regulator
);
149 dev
->regulator
= NULL
;
152 if (ret
!= -EPROBE_DEFER
)
153 dev_err(dev
->dev
, "failed to get regulator: %d\n", ret
);
157 ret
= regulator_enable(dev
->regulator
);
159 dev_err(dev
->dev
, "failed to enable regulator: %d\n", ret
);
166 static void lima_regulator_fini(struct lima_device
*dev
)
169 regulator_disable(dev
->regulator
);
172 static int lima_init_ip(struct lima_device
*dev
, int index
)
174 struct lima_ip_desc
*desc
= lima_ip_desc
+ index
;
175 struct lima_ip
*ip
= dev
->ip
+ index
;
176 int offset
= desc
->offset
[dev
->id
];
177 bool must
= desc
->must_have
[dev
->id
];
185 ip
->iomem
= dev
->iomem
+ offset
;
186 if (desc
->irq_name
) {
187 err
= platform_get_irq_byname(dev
->pdev
, desc
->irq_name
);
193 err
= desc
->init(ip
);
200 return must
? err
: 0;
203 static void lima_fini_ip(struct lima_device
*ldev
, int index
)
205 struct lima_ip_desc
*desc
= lima_ip_desc
+ index
;
206 struct lima_ip
*ip
= ldev
->ip
+ index
;
212 static int lima_init_gp_pipe(struct lima_device
*dev
)
214 struct lima_sched_pipe
*pipe
= dev
->pipe
+ lima_pipe_gp
;
217 err
= lima_sched_pipe_init(pipe
, "gp");
221 pipe
->l2_cache
[pipe
->num_l2_cache
++] = dev
->ip
+ lima_ip_l2_cache0
;
222 pipe
->mmu
[pipe
->num_mmu
++] = dev
->ip
+ lima_ip_gpmmu
;
223 pipe
->processor
[pipe
->num_processor
++] = dev
->ip
+ lima_ip_gp
;
225 err
= lima_gp_pipe_init(dev
);
227 lima_sched_pipe_fini(pipe
);
234 static void lima_fini_gp_pipe(struct lima_device
*dev
)
236 struct lima_sched_pipe
*pipe
= dev
->pipe
+ lima_pipe_gp
;
238 lima_gp_pipe_fini(dev
);
239 lima_sched_pipe_fini(pipe
);
242 static int lima_init_pp_pipe(struct lima_device
*dev
)
244 struct lima_sched_pipe
*pipe
= dev
->pipe
+ lima_pipe_pp
;
247 err
= lima_sched_pipe_init(pipe
, "pp");
251 for (i
= 0; i
< LIMA_SCHED_PIPE_MAX_PROCESSOR
; i
++) {
252 struct lima_ip
*pp
= dev
->ip
+ lima_ip_pp0
+ i
;
253 struct lima_ip
*ppmmu
= dev
->ip
+ lima_ip_ppmmu0
+ i
;
254 struct lima_ip
*l2_cache
;
256 if (dev
->id
== lima_gpu_mali400
)
257 l2_cache
= dev
->ip
+ lima_ip_l2_cache0
;
259 l2_cache
= dev
->ip
+ lima_ip_l2_cache1
+ (i
>> 2);
261 if (pp
->present
&& ppmmu
->present
&& l2_cache
->present
) {
262 pipe
->mmu
[pipe
->num_mmu
++] = ppmmu
;
263 pipe
->processor
[pipe
->num_processor
++] = pp
;
264 if (!pipe
->l2_cache
[i
>> 2])
265 pipe
->l2_cache
[pipe
->num_l2_cache
++] = l2_cache
;
269 if (dev
->ip
[lima_ip_bcast
].present
) {
270 pipe
->bcast_processor
= dev
->ip
+ lima_ip_pp_bcast
;
271 pipe
->bcast_mmu
= dev
->ip
+ lima_ip_ppmmu_bcast
;
274 err
= lima_pp_pipe_init(dev
);
276 lima_sched_pipe_fini(pipe
);
283 static void lima_fini_pp_pipe(struct lima_device
*dev
)
285 struct lima_sched_pipe
*pipe
= dev
->pipe
+ lima_pipe_pp
;
287 lima_pp_pipe_fini(dev
);
288 lima_sched_pipe_fini(pipe
);
291 int lima_device_init(struct lima_device
*ldev
)
294 struct resource
*res
;
296 dma_set_coherent_mask(ldev
->dev
, DMA_BIT_MASK(32));
298 err
= lima_clk_init(ldev
);
302 err
= lima_regulator_init(ldev
);
306 ldev
->empty_vm
= lima_vm_create(ldev
);
307 if (!ldev
->empty_vm
) {
313 if (ldev
->id
== lima_gpu_mali450
) {
314 ldev
->va_end
= LIMA_VA_RESERVE_START
;
315 ldev
->dlbu_cpu
= dma_alloc_wc(
316 ldev
->dev
, LIMA_PAGE_SIZE
,
317 &ldev
->dlbu_dma
, GFP_KERNEL
| __GFP_NOWARN
);
318 if (!ldev
->dlbu_cpu
) {
323 ldev
->va_end
= LIMA_VA_RESERVE_END
;
325 res
= platform_get_resource(ldev
->pdev
, IORESOURCE_MEM
, 0);
326 ldev
->iomem
= devm_ioremap_resource(ldev
->dev
, res
);
327 if (IS_ERR(ldev
->iomem
)) {
328 dev_err(ldev
->dev
, "fail to ioremap iomem\n");
329 err
= PTR_ERR(ldev
->iomem
);
333 for (i
= 0; i
< lima_ip_num
; i
++) {
334 err
= lima_init_ip(ldev
, i
);
339 err
= lima_init_gp_pipe(ldev
);
343 err
= lima_init_pp_pipe(ldev
);
347 dev_info(ldev
->dev
, "bus rate = %lu\n", clk_get_rate(ldev
->clk_bus
));
348 dev_info(ldev
->dev
, "mod rate = %lu", clk_get_rate(ldev
->clk_gpu
));
353 lima_fini_gp_pipe(ldev
);
356 lima_fini_ip(ldev
, i
);
359 dma_free_wc(ldev
->dev
, LIMA_PAGE_SIZE
,
360 ldev
->dlbu_cpu
, ldev
->dlbu_dma
);
362 lima_vm_put(ldev
->empty_vm
);
364 lima_regulator_fini(ldev
);
370 void lima_device_fini(struct lima_device
*ldev
)
374 lima_fini_pp_pipe(ldev
);
375 lima_fini_gp_pipe(ldev
);
377 for (i
= lima_ip_num
- 1; i
>= 0; i
--)
378 lima_fini_ip(ldev
, i
);
381 dma_free_wc(ldev
->dev
, LIMA_PAGE_SIZE
,
382 ldev
->dlbu_cpu
, ldev
->dlbu_dma
);
384 lima_vm_put(ldev
->empty_vm
);
386 lima_regulator_fini(ldev
);