treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / gpu / drm / lima / lima_device.c
blob19829b5430242f64d3fb88f6eb88548da9e5faf9
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
4 #include <linux/regulator/consumer.h>
5 #include <linux/reset.h>
6 #include <linux/clk.h>
7 #include <linux/dma-mapping.h>
8 #include <linux/platform_device.h>
10 #include "lima_device.h"
11 #include "lima_gp.h"
12 #include "lima_pp.h"
13 #include "lima_mmu.h"
14 #include "lima_pmu.h"
15 #include "lima_l2_cache.h"
16 #include "lima_dlbu.h"
17 #include "lima_bcast.h"
18 #include "lima_vm.h"
20 struct lima_ip_desc {
21 char *name;
22 char *irq_name;
23 bool must_have[lima_gpu_num];
24 int offset[lima_gpu_num];
26 int (*init)(struct lima_ip *ip);
27 void (*fini)(struct lima_ip *ip);
30 #define LIMA_IP_DESC(ipname, mst0, mst1, off0, off1, func, irq) \
31 [lima_ip_##ipname] = { \
32 .name = #ipname, \
33 .irq_name = irq, \
34 .must_have = { \
35 [lima_gpu_mali400] = mst0, \
36 [lima_gpu_mali450] = mst1, \
37 }, \
38 .offset = { \
39 [lima_gpu_mali400] = off0, \
40 [lima_gpu_mali450] = off1, \
41 }, \
42 .init = lima_##func##_init, \
43 .fini = lima_##func##_fini, \
46 static struct lima_ip_desc lima_ip_desc[lima_ip_num] = {
47 LIMA_IP_DESC(pmu, false, false, 0x02000, 0x02000, pmu, "pmu"),
48 LIMA_IP_DESC(l2_cache0, true, true, 0x01000, 0x10000, l2_cache, NULL),
49 LIMA_IP_DESC(l2_cache1, false, true, -1, 0x01000, l2_cache, NULL),
50 LIMA_IP_DESC(l2_cache2, false, false, -1, 0x11000, l2_cache, NULL),
51 LIMA_IP_DESC(gp, true, true, 0x00000, 0x00000, gp, "gp"),
52 LIMA_IP_DESC(pp0, true, true, 0x08000, 0x08000, pp, "pp0"),
53 LIMA_IP_DESC(pp1, false, false, 0x0A000, 0x0A000, pp, "pp1"),
54 LIMA_IP_DESC(pp2, false, false, 0x0C000, 0x0C000, pp, "pp2"),
55 LIMA_IP_DESC(pp3, false, false, 0x0E000, 0x0E000, pp, "pp3"),
56 LIMA_IP_DESC(pp4, false, false, -1, 0x28000, pp, "pp4"),
57 LIMA_IP_DESC(pp5, false, false, -1, 0x2A000, pp, "pp5"),
58 LIMA_IP_DESC(pp6, false, false, -1, 0x2C000, pp, "pp6"),
59 LIMA_IP_DESC(pp7, false, false, -1, 0x2E000, pp, "pp7"),
60 LIMA_IP_DESC(gpmmu, true, true, 0x03000, 0x03000, mmu, "gpmmu"),
61 LIMA_IP_DESC(ppmmu0, true, true, 0x04000, 0x04000, mmu, "ppmmu0"),
62 LIMA_IP_DESC(ppmmu1, false, false, 0x05000, 0x05000, mmu, "ppmmu1"),
63 LIMA_IP_DESC(ppmmu2, false, false, 0x06000, 0x06000, mmu, "ppmmu2"),
64 LIMA_IP_DESC(ppmmu3, false, false, 0x07000, 0x07000, mmu, "ppmmu3"),
65 LIMA_IP_DESC(ppmmu4, false, false, -1, 0x1C000, mmu, "ppmmu4"),
66 LIMA_IP_DESC(ppmmu5, false, false, -1, 0x1D000, mmu, "ppmmu5"),
67 LIMA_IP_DESC(ppmmu6, false, false, -1, 0x1E000, mmu, "ppmmu6"),
68 LIMA_IP_DESC(ppmmu7, false, false, -1, 0x1F000, mmu, "ppmmu7"),
69 LIMA_IP_DESC(dlbu, false, true, -1, 0x14000, dlbu, NULL),
70 LIMA_IP_DESC(bcast, false, true, -1, 0x13000, bcast, NULL),
71 LIMA_IP_DESC(pp_bcast, false, true, -1, 0x16000, pp_bcast, "pp"),
72 LIMA_IP_DESC(ppmmu_bcast, false, true, -1, 0x15000, mmu, NULL),
75 const char *lima_ip_name(struct lima_ip *ip)
77 return lima_ip_desc[ip->id].name;
80 static int lima_clk_init(struct lima_device *dev)
82 int err;
84 dev->clk_bus = devm_clk_get(dev->dev, "bus");
85 if (IS_ERR(dev->clk_bus)) {
86 err = PTR_ERR(dev->clk_bus);
87 if (err != -EPROBE_DEFER)
88 dev_err(dev->dev, "get bus clk failed %d\n", err);
89 return err;
92 dev->clk_gpu = devm_clk_get(dev->dev, "core");
93 if (IS_ERR(dev->clk_gpu)) {
94 err = PTR_ERR(dev->clk_gpu);
95 if (err != -EPROBE_DEFER)
96 dev_err(dev->dev, "get core clk failed %d\n", err);
97 return err;
100 err = clk_prepare_enable(dev->clk_bus);
101 if (err)
102 return err;
104 err = clk_prepare_enable(dev->clk_gpu);
105 if (err)
106 goto error_out0;
108 dev->reset = devm_reset_control_array_get_optional_shared(dev->dev);
110 if (IS_ERR(dev->reset)) {
111 err = PTR_ERR(dev->reset);
112 if (err != -EPROBE_DEFER)
113 dev_err(dev->dev, "get reset controller failed %d\n",
114 err);
115 goto error_out1;
116 } else if (dev->reset != NULL) {
117 err = reset_control_deassert(dev->reset);
118 if (err) {
119 dev_err(dev->dev,
120 "reset controller deassert failed %d\n", err);
121 goto error_out1;
125 return 0;
127 error_out1:
128 clk_disable_unprepare(dev->clk_gpu);
129 error_out0:
130 clk_disable_unprepare(dev->clk_bus);
131 return err;
134 static void lima_clk_fini(struct lima_device *dev)
136 if (dev->reset != NULL)
137 reset_control_assert(dev->reset);
138 clk_disable_unprepare(dev->clk_gpu);
139 clk_disable_unprepare(dev->clk_bus);
142 static int lima_regulator_init(struct lima_device *dev)
144 int ret;
146 dev->regulator = devm_regulator_get_optional(dev->dev, "mali");
147 if (IS_ERR(dev->regulator)) {
148 ret = PTR_ERR(dev->regulator);
149 dev->regulator = NULL;
150 if (ret == -ENODEV)
151 return 0;
152 if (ret != -EPROBE_DEFER)
153 dev_err(dev->dev, "failed to get regulator: %d\n", ret);
154 return ret;
157 ret = regulator_enable(dev->regulator);
158 if (ret < 0) {
159 dev_err(dev->dev, "failed to enable regulator: %d\n", ret);
160 return ret;
163 return 0;
166 static void lima_regulator_fini(struct lima_device *dev)
168 if (dev->regulator)
169 regulator_disable(dev->regulator);
172 static int lima_init_ip(struct lima_device *dev, int index)
174 struct lima_ip_desc *desc = lima_ip_desc + index;
175 struct lima_ip *ip = dev->ip + index;
176 int offset = desc->offset[dev->id];
177 bool must = desc->must_have[dev->id];
178 int err;
180 if (offset < 0)
181 return 0;
183 ip->dev = dev;
184 ip->id = index;
185 ip->iomem = dev->iomem + offset;
186 if (desc->irq_name) {
187 err = platform_get_irq_byname(dev->pdev, desc->irq_name);
188 if (err < 0)
189 goto out;
190 ip->irq = err;
193 err = desc->init(ip);
194 if (!err) {
195 ip->present = true;
196 return 0;
199 out:
200 return must ? err : 0;
203 static void lima_fini_ip(struct lima_device *ldev, int index)
205 struct lima_ip_desc *desc = lima_ip_desc + index;
206 struct lima_ip *ip = ldev->ip + index;
208 if (ip->present)
209 desc->fini(ip);
212 static int lima_init_gp_pipe(struct lima_device *dev)
214 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp;
215 int err;
217 err = lima_sched_pipe_init(pipe, "gp");
218 if (err)
219 return err;
221 pipe->l2_cache[pipe->num_l2_cache++] = dev->ip + lima_ip_l2_cache0;
222 pipe->mmu[pipe->num_mmu++] = dev->ip + lima_ip_gpmmu;
223 pipe->processor[pipe->num_processor++] = dev->ip + lima_ip_gp;
225 err = lima_gp_pipe_init(dev);
226 if (err) {
227 lima_sched_pipe_fini(pipe);
228 return err;
231 return 0;
234 static void lima_fini_gp_pipe(struct lima_device *dev)
236 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp;
238 lima_gp_pipe_fini(dev);
239 lima_sched_pipe_fini(pipe);
242 static int lima_init_pp_pipe(struct lima_device *dev)
244 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;
245 int err, i;
247 err = lima_sched_pipe_init(pipe, "pp");
248 if (err)
249 return err;
251 for (i = 0; i < LIMA_SCHED_PIPE_MAX_PROCESSOR; i++) {
252 struct lima_ip *pp = dev->ip + lima_ip_pp0 + i;
253 struct lima_ip *ppmmu = dev->ip + lima_ip_ppmmu0 + i;
254 struct lima_ip *l2_cache;
256 if (dev->id == lima_gpu_mali400)
257 l2_cache = dev->ip + lima_ip_l2_cache0;
258 else
259 l2_cache = dev->ip + lima_ip_l2_cache1 + (i >> 2);
261 if (pp->present && ppmmu->present && l2_cache->present) {
262 pipe->mmu[pipe->num_mmu++] = ppmmu;
263 pipe->processor[pipe->num_processor++] = pp;
264 if (!pipe->l2_cache[i >> 2])
265 pipe->l2_cache[pipe->num_l2_cache++] = l2_cache;
269 if (dev->ip[lima_ip_bcast].present) {
270 pipe->bcast_processor = dev->ip + lima_ip_pp_bcast;
271 pipe->bcast_mmu = dev->ip + lima_ip_ppmmu_bcast;
274 err = lima_pp_pipe_init(dev);
275 if (err) {
276 lima_sched_pipe_fini(pipe);
277 return err;
280 return 0;
283 static void lima_fini_pp_pipe(struct lima_device *dev)
285 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;
287 lima_pp_pipe_fini(dev);
288 lima_sched_pipe_fini(pipe);
291 int lima_device_init(struct lima_device *ldev)
293 int err, i;
294 struct resource *res;
296 dma_set_coherent_mask(ldev->dev, DMA_BIT_MASK(32));
298 err = lima_clk_init(ldev);
299 if (err)
300 return err;
302 err = lima_regulator_init(ldev);
303 if (err)
304 goto err_out0;
306 ldev->empty_vm = lima_vm_create(ldev);
307 if (!ldev->empty_vm) {
308 err = -ENOMEM;
309 goto err_out1;
312 ldev->va_start = 0;
313 if (ldev->id == lima_gpu_mali450) {
314 ldev->va_end = LIMA_VA_RESERVE_START;
315 ldev->dlbu_cpu = dma_alloc_wc(
316 ldev->dev, LIMA_PAGE_SIZE,
317 &ldev->dlbu_dma, GFP_KERNEL | __GFP_NOWARN);
318 if (!ldev->dlbu_cpu) {
319 err = -ENOMEM;
320 goto err_out2;
322 } else
323 ldev->va_end = LIMA_VA_RESERVE_END;
325 res = platform_get_resource(ldev->pdev, IORESOURCE_MEM, 0);
326 ldev->iomem = devm_ioremap_resource(ldev->dev, res);
327 if (IS_ERR(ldev->iomem)) {
328 dev_err(ldev->dev, "fail to ioremap iomem\n");
329 err = PTR_ERR(ldev->iomem);
330 goto err_out3;
333 for (i = 0; i < lima_ip_num; i++) {
334 err = lima_init_ip(ldev, i);
335 if (err)
336 goto err_out4;
339 err = lima_init_gp_pipe(ldev);
340 if (err)
341 goto err_out4;
343 err = lima_init_pp_pipe(ldev);
344 if (err)
345 goto err_out5;
347 dev_info(ldev->dev, "bus rate = %lu\n", clk_get_rate(ldev->clk_bus));
348 dev_info(ldev->dev, "mod rate = %lu", clk_get_rate(ldev->clk_gpu));
350 return 0;
352 err_out5:
353 lima_fini_gp_pipe(ldev);
354 err_out4:
355 while (--i >= 0)
356 lima_fini_ip(ldev, i);
357 err_out3:
358 if (ldev->dlbu_cpu)
359 dma_free_wc(ldev->dev, LIMA_PAGE_SIZE,
360 ldev->dlbu_cpu, ldev->dlbu_dma);
361 err_out2:
362 lima_vm_put(ldev->empty_vm);
363 err_out1:
364 lima_regulator_fini(ldev);
365 err_out0:
366 lima_clk_fini(ldev);
367 return err;
370 void lima_device_fini(struct lima_device *ldev)
372 int i;
374 lima_fini_pp_pipe(ldev);
375 lima_fini_gp_pipe(ldev);
377 for (i = lima_ip_num - 1; i >= 0; i--)
378 lima_fini_ip(ldev, i);
380 if (ldev->dlbu_cpu)
381 dma_free_wc(ldev->dev, LIMA_PAGE_SIZE,
382 ldev->dlbu_cpu, ldev->dlbu_dma);
384 lima_vm_put(ldev->empty_vm);
386 lima_regulator_fini(ldev);
388 lima_clk_fini(ldev);