drivers/gpu/drm/lima/lima_sched.h

   1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
   2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
   3
   4 #ifndef __LIMA_SCHED_H__
   5 #define __LIMA_SCHED_H__
   6
   7 #include <drm/gpu_scheduler.h>
   8
   9 struct lima_vm;
  10
  11 struct lima_sched_task {
  12         struct drm_sched_job base;
  13
  14         struct lima_vm *vm;
  15         void *frame;
  16
  17         struct xarray deps;
  18         unsigned long last_dep;
  19
  20         struct lima_bo **bos;
  21         int num_bos;
  22
  23         /* pipe fence */
  24         struct dma_fence *fence;
  25 };
  26
  27 struct lima_sched_context {
  28         struct drm_sched_entity base;
  29 };
  30
  31 #define LIMA_SCHED_PIPE_MAX_MMU       8
  32 #define LIMA_SCHED_PIPE_MAX_L2_CACHE  2
  33 #define LIMA_SCHED_PIPE_MAX_PROCESSOR 8
  34
  35 struct lima_ip;
  36
  37 struct lima_sched_pipe {
  38         struct drm_gpu_scheduler base;
  39
  40         u64 fence_context;
  41         u32 fence_seqno;
  42         spinlock_t fence_lock;
  43
  44         struct lima_sched_task *current_task;
  45         struct lima_vm *current_vm;
  46
  47         struct lima_ip *mmu[LIMA_SCHED_PIPE_MAX_MMU];
  48         int num_mmu;
  49
  50         struct lima_ip *l2_cache[LIMA_SCHED_PIPE_MAX_L2_CACHE];
  51         int num_l2_cache;
  52
  53         struct lima_ip *processor[LIMA_SCHED_PIPE_MAX_PROCESSOR];
  54         int num_processor;
  55
  56         struct lima_ip *bcast_processor;
  57         struct lima_ip *bcast_mmu;
  58
  59         u32 done;
  60         bool error;
  61         atomic_t task;
  62
  63         int frame_size;
  64         struct kmem_cache *task_slab;
  65
  66         int (*task_validate)(struct lima_sched_pipe *pipe, struct lima_sched_task *task);
  67         void (*task_run)(struct lima_sched_pipe *pipe, struct lima_sched_task *task);
  68         void (*task_fini)(struct lima_sched_pipe *pipe);
  69         void (*task_error)(struct lima_sched_pipe *pipe);
  70         void (*task_mmu_error)(struct lima_sched_pipe *pipe);
  71 };
  72
  73 int lima_sched_task_init(struct lima_sched_task *task,
  74                          struct lima_sched_context *context,
  75                          struct lima_bo **bos, int num_bos,
  76                          struct lima_vm *vm);
  77 void lima_sched_task_fini(struct lima_sched_task *task);
  78
  79 int lima_sched_context_init(struct lima_sched_pipe *pipe,
  80                             struct lima_sched_context *context,
  81                             atomic_t *guilty);
  82 void lima_sched_context_fini(struct lima_sched_pipe *pipe,
  83                              struct lima_sched_context *context);
  84 struct dma_fence *lima_sched_context_queue_task(struct lima_sched_context *context,
  85                                                 struct lima_sched_task *task);
  86
  87 int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name);
  88 void lima_sched_pipe_fini(struct lima_sched_pipe *pipe);
  89 void lima_sched_pipe_task_done(struct lima_sched_pipe *pipe);
  90
  91 static inline void lima_sched_pipe_mmu_error(struct lima_sched_pipe *pipe)
  92 {
  93         pipe->error = true;
  94         pipe->task_mmu_error(pipe);
  95 }
  96
  97 int lima_sched_slab_init(void);
  98 void lima_sched_slab_fini(void);
  99
 100 #endif