drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
   4  * Copyright (C) 2013 Red Hat
   5  * Author: Rob Clark <robdclark@gmail.com>
   6  */
   7
   8 #ifndef _DPU_PLANE_H_
   9 #define _DPU_PLANE_H_
  10
  11 #include <drm/drm_crtc.h>
  12
  13 #include "dpu_kms.h"
  14 #include "dpu_hw_mdss.h"
  15 #include "dpu_hw_sspp.h"
  16
  17 /**
  18  * struct dpu_plane_state: Define dpu extension of drm plane state object
  19  * @base:       base drm plane state object
  20  * @aspace:     pointer to address space for input/output buffers
  21  * @stage:      assigned by crtc blender
  22  * @multirect_index: index of the rectangle of SSPP
  23  * @multirect_mode: parallel or time multiplex multirect mode
  24  * @pending:    whether the current update is still pending
  25  * @scaler3_cfg: configuration data for scaler3
  26  * @pixel_ext: configuration data for pixel extensions
  27  * @cdp_cfg:    CDP configuration
  28  */
  29 struct dpu_plane_state {
  30         struct drm_plane_state base;
  31         struct msm_gem_address_space *aspace;
  32         enum dpu_stage stage;
  33         uint32_t multirect_index;
  34         uint32_t multirect_mode;
  35         bool pending;
  36
  37         /* scaler configuration */
  38         struct dpu_hw_scaler3_cfg scaler3_cfg;
  39         struct dpu_hw_pixel_ext pixel_ext;
  40
  41         struct dpu_hw_pipe_cdp_cfg cdp_cfg;
  42 };
  43
  44 /**
  45  * struct dpu_multirect_plane_states: Defines multirect pair of drm plane states
  46  * @r0: drm plane configured on rect 0
  47  * @r1: drm plane configured on rect 1
  48  */
  49 struct dpu_multirect_plane_states {
  50         const struct drm_plane_state *r0;
  51         const struct drm_plane_state *r1;
  52 };
  53
  54 #define to_dpu_plane_state(x) \
  55         container_of(x, struct dpu_plane_state, base)
  56
  57 /**
  58  * dpu_plane_pipe - return sspp identifier for the given plane
  59  * @plane:   Pointer to DRM plane object
  60  * Returns: sspp identifier of the given plane
  61  */
  62 enum dpu_sspp dpu_plane_pipe(struct drm_plane *plane);
  63
  64 /**
  65  * is_dpu_plane_virtual - check for virtual plane
  66  * @plane: Pointer to DRM plane object
  67  * returns: true - if the plane is virtual
  68  *          false - if the plane is primary
  69  */
  70 bool is_dpu_plane_virtual(struct drm_plane *plane);
  71
  72 /**
  73  * dpu_plane_get_ctl_flush - get control flush mask
  74  * @plane:   Pointer to DRM plane object
  75  * @ctl: Pointer to control hardware
  76  * @flush_sspp: Pointer to sspp flush control word
  77  */
  78 void dpu_plane_get_ctl_flush(struct drm_plane *plane, struct dpu_hw_ctl *ctl,
  79                 u32 *flush_sspp);
  80
  81 /**
  82  * dpu_plane_restore - restore hw state if previously power collapsed
  83  * @plane: Pointer to drm plane structure
  84  */
  85 void dpu_plane_restore(struct drm_plane *plane);
  86
  87 /**
  88  * dpu_plane_flush - final plane operations before commit flush
  89  * @plane: Pointer to drm plane structure
  90  */
  91 void dpu_plane_flush(struct drm_plane *plane);
  92
  93 /**
  94  * dpu_plane_set_error: enable/disable error condition
  95  * @plane: pointer to drm_plane structure
  96  */
  97 void dpu_plane_set_error(struct drm_plane *plane, bool error);
  98
  99 /**
 100  * dpu_plane_init - create new dpu plane for the given pipe
 101  * @dev:   Pointer to DRM device
 102  * @pipe:  dpu hardware pipe identifier
 103  * @type:  Plane type - PRIMARY/OVERLAY/CURSOR
 104  * @possible_crtcs: bitmask of crtc that can be attached to the given pipe
 105  * @master_plane_id: primary plane id of a multirect pipe. 0 value passed for
 106  *                   a regular plane initialization. A non-zero primary plane
 107  *                   id will be passed for a virtual pipe initialization.
 108  *
 109  */
 110 struct drm_plane *dpu_plane_init(struct drm_device *dev,
 111                 uint32_t pipe, enum drm_plane_type type,
 112                 unsigned long possible_crtcs, u32 master_plane_id);
 113
 114 /**
 115  * dpu_plane_validate_multirecti_v2 - validate the multirect planes
 116  *                                    against hw limitations
 117  * @plane: drm plate states of the multirect pair
 118  */
 119 int dpu_plane_validate_multirect_v2(struct dpu_multirect_plane_states *plane);
 120
 121 /**
 122  * dpu_plane_clear_multirect - clear multirect bits for the given pipe
 123  * @drm_state: Pointer to DRM plane state
 124  */
 125 void dpu_plane_clear_multirect(const struct drm_plane_state *drm_state);
 126
 127 /**
 128  * dpu_plane_color_fill - enables color fill on plane
 129  * @plane:  Pointer to DRM plane object
 130  * @color:  RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
 131  * @alpha:  8-bit fill alpha value, 255 selects 100% alpha
 132  * Returns: 0 on success
 133  */
 134 int dpu_plane_color_fill(struct drm_plane *plane,
 135                 uint32_t color, uint32_t alpha);
 136
 137 #endif /* _DPU_PLANE_H_ */