drivers/gpu/drm/nouveau/nvkm/subdev/i2c/priv.h

   1 /* SPDX-License-Identifier: MIT */
   2 #ifndef __NVKM_I2C_PRIV_H__
   3 #define __NVKM_I2C_PRIV_H__
   4 #define nvkm_i2c(p) container_of((p), struct nvkm_i2c, subdev)
   5 #include <subdev/i2c.h>
   6
   7 int nvkm_i2c_new_(const struct nvkm_i2c_func *, struct nvkm_device *,
   8                   int index, struct nvkm_i2c **);
   9
  10 struct nvkm_i2c_func {
  11         int (*pad_x_new)(struct nvkm_i2c *, int id, struct nvkm_i2c_pad **);
  12         int (*pad_s_new)(struct nvkm_i2c *, int id, struct nvkm_i2c_pad **);
  13
  14         /* number of native dp aux channels present */
  15         int aux;
  16
  17         /* read and ack pending interrupts, returning only data
  18          * for ports that have not been masked off, while still
  19          * performing the ack for anything that was pending.
  20          */
  21         void (*aux_stat)(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *);
  22
  23         /* mask on/off interrupt types for a given set of auxch
  24          */
  25         void (*aux_mask)(struct nvkm_i2c *, u32, u32, u32);
  26 };
  27
  28 void g94_aux_stat(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *);
  29 void g94_aux_mask(struct nvkm_i2c *, u32, u32, u32);
  30
  31 void gk104_aux_stat(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *);
  32 void gk104_aux_mask(struct nvkm_i2c *, u32, u32, u32);
  33 #endif