drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/os.h

   1 /* SPDX-License-Identifier: MIT */
   2 #ifndef __NVKM_PWR_OS_H__
   3 #define __NVKM_PWR_OS_H__
   4
   5 /* Process names */
   6 #define PROC_KERN 0x52544e49
   7 #define PROC_IDLE 0x454c4449
   8 #define PROC_HOST 0x54534f48
   9 #define PROC_MEMX 0x584d454d
  10 #define PROC_PERF 0x46524550
  11 #define PROC_I2C_ 0x5f433249
  12 #define PROC_TEST 0x54534554
  13
  14 /* KERN: message identifiers */
  15 #define KMSG_FIFO   0x00000000
  16 #define KMSG_ALARM  0x00000001
  17
  18 /* MEMX: message identifiers */
  19 #define MEMX_MSG_INFO 0
  20 #define MEMX_MSG_EXEC 1
  21
  22 /* MEMX: info types */
  23 #define MEMX_INFO_DATA  0
  24 #define MEMX_INFO_TRAIN 1
  25
  26 /* MEMX: script opcode definitions */
  27 #define MEMX_ENTER  1
  28 #define MEMX_LEAVE  2
  29 #define MEMX_WR32   3
  30 #define MEMX_WAIT   4
  31 #define MEMX_DELAY  5
  32 #define MEMX_VBLANK 6
  33 #define MEMX_TRAIN  7
  34
  35 /* I2C_: message identifiers */
  36 #define I2C__MSG_RD08 0
  37 #define I2C__MSG_WR08 1
  38
  39 #define I2C__MSG_DATA0_PORT 24:31
  40 #define I2C__MSG_DATA0_ADDR 14:23
  41
  42 #define I2C__MSG_DATA0_RD08_PORT I2C__MSG_DATA0_PORT
  43 #define I2C__MSG_DATA0_RD08_ADDR I2C__MSG_DATA0_ADDR
  44 #define I2C__MSG_DATA0_RD08_REG 0:7
  45 #define I2C__MSG_DATA1_RD08_VAL 0:7
  46
  47 #define I2C__MSG_DATA0_WR08_PORT I2C__MSG_DATA0_PORT
  48 #define I2C__MSG_DATA0_WR08_ADDR I2C__MSG_DATA0_ADDR
  49 #define I2C__MSG_DATA0_WR08_SYNC 8:8
  50 #define I2C__MSG_DATA0_WR08_REG 0:7
  51 #define I2C__MSG_DATA1_WR08_VAL 0:7
  52
  53 #endif