1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics SA 2014
4 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
8 #include <linux/component.h>
9 #include <linux/debugfs.h>
10 #include <linux/module.h>
11 #include <linux/of_gpio.h>
12 #include <linux/platform_device.h>
14 #include <drm/drm_atomic_helper.h>
15 #include <drm/drm_bridge.h>
16 #include <drm/drm_device.h>
17 #include <drm/drm_panel.h>
18 #include <drm/drm_print.h>
19 #include <drm/drm_probe_helper.h>
21 #include "sti_awg_utils.h"
23 #include "sti_mixer.h"
26 #define DVO_AWG_DIGSYNC_CTRL 0x0000
27 #define DVO_DOF_CFG 0x0004
28 #define DVO_LUT_PROG_LOW 0x0008
29 #define DVO_LUT_PROG_MID 0x000C
30 #define DVO_LUT_PROG_HIGH 0x0010
31 #define DVO_DIGSYNC_INSTR_I 0x0100
33 #define DVO_AWG_CTRL_EN BIT(0)
34 #define DVO_AWG_FRAME_BASED_SYNC BIT(2)
36 #define DVO_DOF_EN_LOWBYTE BIT(0)
37 #define DVO_DOF_EN_MIDBYTE BIT(1)
38 #define DVO_DOF_EN_HIGHBYTE BIT(2)
39 #define DVO_DOF_EN BIT(6)
40 #define DVO_DOF_MOD_COUNT_SHIFT 8
42 #define DVO_LUT_ZERO 0
44 #define DVO_LUT_Y_G_DEL 2
45 #define DVO_LUT_CB_B 3
46 #define DVO_LUT_CB_B_DEL 4
47 #define DVO_LUT_CR_R 5
48 #define DVO_LUT_CR_R_DEL 6
49 #define DVO_LUT_HOLD 7
57 struct awg_code_generation_params
*fw_gen_params
,
58 struct awg_timing
*timing
);
61 static struct dvo_config rgb_24bit_de_cfg
= {
62 .flags
= (0L << DVO_DOF_MOD_COUNT_SHIFT
),
63 .lowbyte
= DVO_LUT_CR_R
,
64 .midbyte
= DVO_LUT_Y_G
,
65 .highbyte
= DVO_LUT_CB_B
,
66 .awg_fwgen_fct
= sti_awg_generate_code_data_enable_mode
,
70 * STI digital video output structure
73 * @drm_dev: pointer to drm device
74 * @mode: current display mode selected
75 * @regs: dvo registers
76 * @clk_pix: pixel clock for dvo
78 * @clk_main_parent: dvo parent clock if main path used
79 * @clk_aux_parent: dvo parent clock if aux path used
80 * @panel_node: panel node reference from device tree
81 * @panel: reference to the panel connected to the dvo
82 * @enabled: true if dvo is enabled else false
83 * @encoder: drm_encoder it is bound
87 struct drm_device
*drm_dev
;
88 struct drm_display_mode mode
;
92 struct clk
*clk_main_parent
;
93 struct clk
*clk_aux_parent
;
94 struct device_node
*panel_node
;
95 struct drm_panel
*panel
;
96 struct dvo_config
*config
;
98 struct drm_encoder
*encoder
;
99 struct drm_bridge
*bridge
;
102 struct sti_dvo_connector
{
103 struct drm_connector drm_connector
;
104 struct drm_encoder
*encoder
;
108 #define to_sti_dvo_connector(x) \
109 container_of(x, struct sti_dvo_connector, drm_connector)
111 #define BLANKING_LEVEL 16
112 static int dvo_awg_generate_code(struct sti_dvo
*dvo
, u8
*ram_size
, u32
*ram_code
)
114 struct drm_display_mode
*mode
= &dvo
->mode
;
115 struct dvo_config
*config
= dvo
->config
;
116 struct awg_code_generation_params fw_gen_params
;
117 struct awg_timing timing
;
119 fw_gen_params
.ram_code
= ram_code
;
120 fw_gen_params
.instruction_offset
= 0;
122 timing
.total_lines
= mode
->vtotal
;
123 timing
.active_lines
= mode
->vdisplay
;
124 timing
.blanking_lines
= mode
->vsync_start
- mode
->vdisplay
;
125 timing
.trailing_lines
= mode
->vtotal
- mode
->vsync_start
;
126 timing
.total_pixels
= mode
->htotal
;
127 timing
.active_pixels
= mode
->hdisplay
;
128 timing
.blanking_pixels
= mode
->hsync_start
- mode
->hdisplay
;
129 timing
.trailing_pixels
= mode
->htotal
- mode
->hsync_start
;
130 timing
.blanking_level
= BLANKING_LEVEL
;
132 if (config
->awg_fwgen_fct(&fw_gen_params
, &timing
)) {
133 DRM_ERROR("AWG firmware not properly generated\n");
137 *ram_size
= fw_gen_params
.instruction_offset
;
142 /* Configure AWG, writing instructions
144 * @dvo: pointer to DVO structure
145 * @awg_ram_code: pointer to AWG instructions table
146 * @nb: nb of AWG instructions
148 static void dvo_awg_configure(struct sti_dvo
*dvo
, u32
*awg_ram_code
, int nb
)
152 DRM_DEBUG_DRIVER("\n");
154 for (i
= 0; i
< nb
; i
++)
155 writel(awg_ram_code
[i
],
156 dvo
->regs
+ DVO_DIGSYNC_INSTR_I
+ i
* 4);
157 for (i
= nb
; i
< AWG_MAX_INST
; i
++)
158 writel(0, dvo
->regs
+ DVO_DIGSYNC_INSTR_I
+ i
* 4);
160 writel(DVO_AWG_CTRL_EN
, dvo
->regs
+ DVO_AWG_DIGSYNC_CTRL
);
163 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
164 readl(dvo->regs + reg))
166 static void dvo_dbg_awg_microcode(struct seq_file
*s
, void __iomem
*reg
)
171 seq_puts(s
, " DVO AWG microcode:");
172 for (i
= 0; i
< AWG_MAX_INST
; i
++) {
174 seq_printf(s
, "\n %04X:", i
);
175 seq_printf(s
, " %04X", readl(reg
+ i
* 4));
179 static int dvo_dbg_show(struct seq_file
*s
, void *data
)
181 struct drm_info_node
*node
= s
->private;
182 struct sti_dvo
*dvo
= (struct sti_dvo
*)node
->info_ent
->data
;
184 seq_printf(s
, "DVO: (vaddr = 0x%p)", dvo
->regs
);
185 DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL
);
186 DBGFS_DUMP(DVO_DOF_CFG
);
187 DBGFS_DUMP(DVO_LUT_PROG_LOW
);
188 DBGFS_DUMP(DVO_LUT_PROG_MID
);
189 DBGFS_DUMP(DVO_LUT_PROG_HIGH
);
190 dvo_dbg_awg_microcode(s
, dvo
->regs
+ DVO_DIGSYNC_INSTR_I
);
195 static struct drm_info_list dvo_debugfs_files
[] = {
196 { "dvo", dvo_dbg_show
, 0, NULL
},
199 static int dvo_debugfs_init(struct sti_dvo
*dvo
, struct drm_minor
*minor
)
203 for (i
= 0; i
< ARRAY_SIZE(dvo_debugfs_files
); i
++)
204 dvo_debugfs_files
[i
].data
= dvo
;
206 return drm_debugfs_create_files(dvo_debugfs_files
,
207 ARRAY_SIZE(dvo_debugfs_files
),
208 minor
->debugfs_root
, minor
);
211 static void sti_dvo_disable(struct drm_bridge
*bridge
)
213 struct sti_dvo
*dvo
= bridge
->driver_private
;
218 DRM_DEBUG_DRIVER("\n");
220 if (dvo
->config
->awg_fwgen_fct
)
221 writel(0x00000000, dvo
->regs
+ DVO_AWG_DIGSYNC_CTRL
);
223 writel(0x00000000, dvo
->regs
+ DVO_DOF_CFG
);
225 drm_panel_disable(dvo
->panel
);
227 /* Disable/unprepare dvo clock */
228 clk_disable_unprepare(dvo
->clk_pix
);
229 clk_disable_unprepare(dvo
->clk
);
231 dvo
->enabled
= false;
234 static void sti_dvo_pre_enable(struct drm_bridge
*bridge
)
236 struct sti_dvo
*dvo
= bridge
->driver_private
;
237 struct dvo_config
*config
= dvo
->config
;
240 DRM_DEBUG_DRIVER("\n");
245 /* Make sure DVO is disabled */
246 writel(0x00000000, dvo
->regs
+ DVO_DOF_CFG
);
247 writel(0x00000000, dvo
->regs
+ DVO_AWG_DIGSYNC_CTRL
);
249 if (config
->awg_fwgen_fct
) {
251 u32 awg_ram_code
[AWG_MAX_INST
];
253 if (!dvo_awg_generate_code(dvo
, &nb_instr
, awg_ram_code
))
254 dvo_awg_configure(dvo
, awg_ram_code
, nb_instr
);
259 /* Prepare/enable clocks */
260 if (clk_prepare_enable(dvo
->clk_pix
))
261 DRM_ERROR("Failed to prepare/enable dvo_pix clk\n");
262 if (clk_prepare_enable(dvo
->clk
))
263 DRM_ERROR("Failed to prepare/enable dvo clk\n");
265 drm_panel_enable(dvo
->panel
);
268 writel(config
->lowbyte
, dvo
->regs
+ DVO_LUT_PROG_LOW
);
269 writel(config
->midbyte
, dvo
->regs
+ DVO_LUT_PROG_MID
);
270 writel(config
->highbyte
, dvo
->regs
+ DVO_LUT_PROG_HIGH
);
272 /* Digital output formatter config */
273 val
= (config
->flags
| DVO_DOF_EN
);
274 writel(val
, dvo
->regs
+ DVO_DOF_CFG
);
279 static void sti_dvo_set_mode(struct drm_bridge
*bridge
,
280 const struct drm_display_mode
*mode
,
281 const struct drm_display_mode
*adjusted_mode
)
283 struct sti_dvo
*dvo
= bridge
->driver_private
;
284 struct sti_mixer
*mixer
= to_sti_mixer(dvo
->encoder
->crtc
);
285 int rate
= mode
->clock
* 1000;
289 DRM_DEBUG_DRIVER("\n");
291 memcpy(&dvo
->mode
, mode
, sizeof(struct drm_display_mode
));
293 /* According to the path used (main or aux), the dvo clocks should
294 * have a different parent clock. */
295 if (mixer
->id
== STI_MIXER_MAIN
)
296 clkp
= dvo
->clk_main_parent
;
298 clkp
= dvo
->clk_aux_parent
;
301 clk_set_parent(dvo
->clk_pix
, clkp
);
302 clk_set_parent(dvo
->clk
, clkp
);
305 /* DVO clocks = compositor clock */
306 ret
= clk_set_rate(dvo
->clk_pix
, rate
);
308 DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate
);
312 ret
= clk_set_rate(dvo
->clk
, rate
);
314 DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate
);
318 /* For now, we only support 24bit data enable (DE) synchro format */
319 dvo
->config
= &rgb_24bit_de_cfg
;
322 static void sti_dvo_bridge_nope(struct drm_bridge
*bridge
)
327 static const struct drm_bridge_funcs sti_dvo_bridge_funcs
= {
328 .pre_enable
= sti_dvo_pre_enable
,
329 .enable
= sti_dvo_bridge_nope
,
330 .disable
= sti_dvo_disable
,
331 .post_disable
= sti_dvo_bridge_nope
,
332 .mode_set
= sti_dvo_set_mode
,
335 static int sti_dvo_connector_get_modes(struct drm_connector
*connector
)
337 struct sti_dvo_connector
*dvo_connector
338 = to_sti_dvo_connector(connector
);
339 struct sti_dvo
*dvo
= dvo_connector
->dvo
;
342 return drm_panel_get_modes(dvo
->panel
, connector
);
347 #define CLK_TOLERANCE_HZ 50
349 static int sti_dvo_connector_mode_valid(struct drm_connector
*connector
,
350 struct drm_display_mode
*mode
)
352 int target
= mode
->clock
* 1000;
353 int target_min
= target
- CLK_TOLERANCE_HZ
;
354 int target_max
= target
+ CLK_TOLERANCE_HZ
;
356 struct sti_dvo_connector
*dvo_connector
357 = to_sti_dvo_connector(connector
);
358 struct sti_dvo
*dvo
= dvo_connector
->dvo
;
360 result
= clk_round_rate(dvo
->clk_pix
, target
);
362 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
365 if ((result
< target_min
) || (result
> target_max
)) {
366 DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target
);
374 struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs
= {
375 .get_modes
= sti_dvo_connector_get_modes
,
376 .mode_valid
= sti_dvo_connector_mode_valid
,
379 static enum drm_connector_status
380 sti_dvo_connector_detect(struct drm_connector
*connector
, bool force
)
382 struct sti_dvo_connector
*dvo_connector
383 = to_sti_dvo_connector(connector
);
384 struct sti_dvo
*dvo
= dvo_connector
->dvo
;
386 DRM_DEBUG_DRIVER("\n");
389 dvo
->panel
= of_drm_find_panel(dvo
->panel_node
);
390 if (IS_ERR(dvo
->panel
))
393 drm_panel_attach(dvo
->panel
, connector
);
397 return connector_status_connected
;
399 return connector_status_disconnected
;
402 static int sti_dvo_late_register(struct drm_connector
*connector
)
404 struct sti_dvo_connector
*dvo_connector
405 = to_sti_dvo_connector(connector
);
406 struct sti_dvo
*dvo
= dvo_connector
->dvo
;
408 if (dvo_debugfs_init(dvo
, dvo
->drm_dev
->primary
)) {
409 DRM_ERROR("DVO debugfs setup failed\n");
416 static const struct drm_connector_funcs sti_dvo_connector_funcs
= {
417 .fill_modes
= drm_helper_probe_single_connector_modes
,
418 .detect
= sti_dvo_connector_detect
,
419 .destroy
= drm_connector_cleanup
,
420 .reset
= drm_atomic_helper_connector_reset
,
421 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
422 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
423 .late_register
= sti_dvo_late_register
,
426 static struct drm_encoder
*sti_dvo_find_encoder(struct drm_device
*dev
)
428 struct drm_encoder
*encoder
;
430 list_for_each_entry(encoder
, &dev
->mode_config
.encoder_list
, head
) {
431 if (encoder
->encoder_type
== DRM_MODE_ENCODER_LVDS
)
438 static int sti_dvo_bind(struct device
*dev
, struct device
*master
, void *data
)
440 struct sti_dvo
*dvo
= dev_get_drvdata(dev
);
441 struct drm_device
*drm_dev
= data
;
442 struct drm_encoder
*encoder
;
443 struct sti_dvo_connector
*connector
;
444 struct drm_connector
*drm_connector
;
445 struct drm_bridge
*bridge
;
448 /* Set the drm device handle */
449 dvo
->drm_dev
= drm_dev
;
451 encoder
= sti_dvo_find_encoder(drm_dev
);
455 connector
= devm_kzalloc(dev
, sizeof(*connector
), GFP_KERNEL
);
459 connector
->dvo
= dvo
;
461 bridge
= devm_kzalloc(dev
, sizeof(*bridge
), GFP_KERNEL
);
465 bridge
->driver_private
= dvo
;
466 bridge
->funcs
= &sti_dvo_bridge_funcs
;
467 bridge
->of_node
= dvo
->dev
.of_node
;
468 drm_bridge_add(bridge
);
470 err
= drm_bridge_attach(encoder
, bridge
, NULL
);
472 DRM_ERROR("Failed to attach bridge\n");
476 dvo
->bridge
= bridge
;
477 connector
->encoder
= encoder
;
478 dvo
->encoder
= encoder
;
480 drm_connector
= (struct drm_connector
*)connector
;
482 drm_connector
->polled
= DRM_CONNECTOR_POLL_HPD
;
484 drm_connector_init(drm_dev
, drm_connector
,
485 &sti_dvo_connector_funcs
, DRM_MODE_CONNECTOR_LVDS
);
486 drm_connector_helper_add(drm_connector
,
487 &sti_dvo_connector_helper_funcs
);
489 err
= drm_connector_attach_encoder(drm_connector
, encoder
);
491 DRM_ERROR("Failed to attach a connector to a encoder\n");
498 drm_bridge_remove(bridge
);
502 static void sti_dvo_unbind(struct device
*dev
,
503 struct device
*master
, void *data
)
505 struct sti_dvo
*dvo
= dev_get_drvdata(dev
);
507 drm_bridge_remove(dvo
->bridge
);
510 static const struct component_ops sti_dvo_ops
= {
511 .bind
= sti_dvo_bind
,
512 .unbind
= sti_dvo_unbind
,
515 static int sti_dvo_probe(struct platform_device
*pdev
)
517 struct device
*dev
= &pdev
->dev
;
519 struct resource
*res
;
520 struct device_node
*np
= dev
->of_node
;
522 DRM_INFO("%s\n", __func__
);
524 dvo
= devm_kzalloc(dev
, sizeof(*dvo
), GFP_KERNEL
);
526 DRM_ERROR("Failed to allocate memory for DVO\n");
530 dvo
->dev
= pdev
->dev
;
532 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "dvo-reg");
534 DRM_ERROR("Invalid dvo resource\n");
537 dvo
->regs
= devm_ioremap(dev
, res
->start
,
542 dvo
->clk_pix
= devm_clk_get(dev
, "dvo_pix");
543 if (IS_ERR(dvo
->clk_pix
)) {
544 DRM_ERROR("Cannot get dvo_pix clock\n");
545 return PTR_ERR(dvo
->clk_pix
);
548 dvo
->clk
= devm_clk_get(dev
, "dvo");
549 if (IS_ERR(dvo
->clk
)) {
550 DRM_ERROR("Cannot get dvo clock\n");
551 return PTR_ERR(dvo
->clk
);
554 dvo
->clk_main_parent
= devm_clk_get(dev
, "main_parent");
555 if (IS_ERR(dvo
->clk_main_parent
)) {
556 DRM_DEBUG_DRIVER("Cannot get main_parent clock\n");
557 dvo
->clk_main_parent
= NULL
;
560 dvo
->clk_aux_parent
= devm_clk_get(dev
, "aux_parent");
561 if (IS_ERR(dvo
->clk_aux_parent
)) {
562 DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n");
563 dvo
->clk_aux_parent
= NULL
;
566 dvo
->panel_node
= of_parse_phandle(np
, "sti,panel", 0);
567 if (!dvo
->panel_node
)
568 DRM_ERROR("No panel associated to the dvo output\n");
569 of_node_put(dvo
->panel_node
);
571 platform_set_drvdata(pdev
, dvo
);
573 return component_add(&pdev
->dev
, &sti_dvo_ops
);
576 static int sti_dvo_remove(struct platform_device
*pdev
)
578 component_del(&pdev
->dev
, &sti_dvo_ops
);
582 static const struct of_device_id dvo_of_match
[] = {
583 { .compatible
= "st,stih407-dvo", },
586 MODULE_DEVICE_TABLE(of
, dvo_of_match
);
588 struct platform_driver sti_dvo_driver
= {
591 .owner
= THIS_MODULE
,
592 .of_match_table
= dvo_of_match
,
594 .probe
= sti_dvo_probe
,
595 .remove
= sti_dvo_remove
,
598 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
599 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
600 MODULE_LICENSE("GPL");