1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Broadcom Limited
9 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
10 * signals. On BCM2835, these can be routed out to GPIO0-27 with the
14 #include <drm/drm_atomic_helper.h>
15 #include <drm/drm_bridge.h>
16 #include <drm/drm_edid.h>
17 #include <drm/drm_of.h>
18 #include <drm/drm_panel.h>
19 #include <drm/drm_probe_helper.h>
20 #include <linux/clk.h>
21 #include <linux/component.h>
22 #include <linux/of_graph.h>
23 #include <linux/of_platform.h>
28 # define DPI_OUTPUT_ENABLE_MODE BIT(16)
30 /* The order field takes the incoming 24 bit RGB from the pixel valve
31 * and shuffles the 3 channels.
33 # define DPI_ORDER_MASK VC4_MASK(15, 14)
34 # define DPI_ORDER_SHIFT 14
35 # define DPI_ORDER_RGB 0
36 # define DPI_ORDER_BGR 1
37 # define DPI_ORDER_GRB 2
38 # define DPI_ORDER_BRG 3
40 /* The format field takes the ORDER-shuffled pixel valve data and
41 * formats it onto the output lines.
43 # define DPI_FORMAT_MASK VC4_MASK(13, 11)
44 # define DPI_FORMAT_SHIFT 11
45 /* This define is named in the hardware, but actually just outputs 0. */
46 # define DPI_FORMAT_9BIT_666_RGB 0
47 /* Outputs 00000000rrrrrggggggbbbbb */
48 # define DPI_FORMAT_16BIT_565_RGB_1 1
49 /* Outputs 000rrrrr00gggggg000bbbbb */
50 # define DPI_FORMAT_16BIT_565_RGB_2 2
51 /* Outputs 00rrrrr000gggggg00bbbbb0 */
52 # define DPI_FORMAT_16BIT_565_RGB_3 3
53 /* Outputs 000000rrrrrrggggggbbbbbb */
54 # define DPI_FORMAT_18BIT_666_RGB_1 4
55 /* Outputs 00rrrrrr00gggggg00bbbbbb */
56 # define DPI_FORMAT_18BIT_666_RGB_2 5
57 /* Outputs rrrrrrrrggggggggbbbbbbbb */
58 # define DPI_FORMAT_24BIT_888_RGB 6
60 /* Reverses the polarity of the corresponding signal */
61 # define DPI_PIXEL_CLK_INVERT BIT(10)
62 # define DPI_HSYNC_INVERT BIT(9)
63 # define DPI_VSYNC_INVERT BIT(8)
64 # define DPI_OUTPUT_ENABLE_INVERT BIT(7)
66 /* Outputs the signal the falling clock edge instead of rising. */
67 # define DPI_HSYNC_NEGATE BIT(6)
68 # define DPI_VSYNC_NEGATE BIT(5)
69 # define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
71 /* Disables the signal */
72 # define DPI_HSYNC_DISABLE BIT(3)
73 # define DPI_VSYNC_DISABLE BIT(2)
74 # define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
76 /* Power gate to the device, full reset at 0 -> 1 transition */
77 # define DPI_ENABLE BIT(0)
79 /* All other registers besides DPI_C return the ID */
81 # define DPI_ID_VALUE 0x00647069
83 /* General DPI hardware state. */
85 struct platform_device
*pdev
;
87 struct drm_encoder
*encoder
;
91 struct clk
*pixel_clock
;
92 struct clk
*core_clock
;
94 struct debugfs_regset32 regset
;
97 #define DPI_READ(offset) readl(dpi->regs + (offset))
98 #define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
100 /* VC4 DPI encoder KMS struct */
101 struct vc4_dpi_encoder
{
102 struct vc4_encoder base
;
106 static inline struct vc4_dpi_encoder
*
107 to_vc4_dpi_encoder(struct drm_encoder
*encoder
)
109 return container_of(encoder
, struct vc4_dpi_encoder
, base
.base
);
112 static const struct debugfs_reg32 dpi_regs
[] = {
117 static const struct drm_encoder_funcs vc4_dpi_encoder_funcs
= {
118 .destroy
= drm_encoder_cleanup
,
121 static void vc4_dpi_encoder_disable(struct drm_encoder
*encoder
)
123 struct vc4_dpi_encoder
*vc4_encoder
= to_vc4_dpi_encoder(encoder
);
124 struct vc4_dpi
*dpi
= vc4_encoder
->dpi
;
126 clk_disable_unprepare(dpi
->pixel_clock
);
129 static void vc4_dpi_encoder_enable(struct drm_encoder
*encoder
)
131 struct drm_device
*dev
= encoder
->dev
;
132 struct drm_display_mode
*mode
= &encoder
->crtc
->mode
;
133 struct vc4_dpi_encoder
*vc4_encoder
= to_vc4_dpi_encoder(encoder
);
134 struct vc4_dpi
*dpi
= vc4_encoder
->dpi
;
135 struct drm_connector_list_iter conn_iter
;
136 struct drm_connector
*connector
= NULL
, *connector_scan
;
137 u32 dpi_c
= DPI_ENABLE
| DPI_OUTPUT_ENABLE_MODE
;
140 /* Look up the connector attached to DPI so we can get the
141 * bus_format. Ideally the bridge would tell us the
142 * bus_format we want, but it doesn't yet, so assume that it's
143 * uniform throughout the bridge chain.
145 drm_connector_list_iter_begin(dev
, &conn_iter
);
146 drm_for_each_connector_iter(connector_scan
, &conn_iter
) {
147 if (connector_scan
->encoder
== encoder
) {
148 connector
= connector_scan
;
152 drm_connector_list_iter_end(&conn_iter
);
154 if (connector
&& connector
->display_info
.num_bus_formats
) {
155 u32 bus_format
= connector
->display_info
.bus_formats
[0];
157 switch (bus_format
) {
158 case MEDIA_BUS_FMT_RGB888_1X24
:
159 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB
,
162 case MEDIA_BUS_FMT_BGR888_1X24
:
163 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB
,
165 dpi_c
|= VC4_SET_FIELD(DPI_ORDER_BGR
, DPI_ORDER
);
167 case MEDIA_BUS_FMT_RGB666_1X24_CPADHI
:
168 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2
,
171 case MEDIA_BUS_FMT_RGB666_1X18
:
172 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1
,
175 case MEDIA_BUS_FMT_RGB565_1X16
:
176 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3
,
180 DRM_ERROR("Unknown media bus format %d\n", bus_format
);
184 /* Default to 24bit if no connector found. */
185 dpi_c
|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB
, DPI_FORMAT
);
188 if (mode
->flags
& DRM_MODE_FLAG_NHSYNC
)
189 dpi_c
|= DPI_HSYNC_INVERT
;
190 else if (!(mode
->flags
& DRM_MODE_FLAG_PHSYNC
))
191 dpi_c
|= DPI_HSYNC_DISABLE
;
193 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
194 dpi_c
|= DPI_VSYNC_INVERT
;
195 else if (!(mode
->flags
& DRM_MODE_FLAG_PVSYNC
))
196 dpi_c
|= DPI_VSYNC_DISABLE
;
198 DPI_WRITE(DPI_C
, dpi_c
);
200 ret
= clk_set_rate(dpi
->pixel_clock
, mode
->clock
* 1000);
202 DRM_ERROR("Failed to set clock rate: %d\n", ret
);
204 ret
= clk_prepare_enable(dpi
->pixel_clock
);
206 DRM_ERROR("Failed to set clock rate: %d\n", ret
);
209 static enum drm_mode_status
vc4_dpi_encoder_mode_valid(struct drm_encoder
*encoder
,
210 const struct drm_display_mode
*mode
)
212 if (mode
->flags
& DRM_MODE_FLAG_INTERLACE
)
213 return MODE_NO_INTERLACE
;
218 static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs
= {
219 .disable
= vc4_dpi_encoder_disable
,
220 .enable
= vc4_dpi_encoder_enable
,
221 .mode_valid
= vc4_dpi_encoder_mode_valid
,
224 static const struct of_device_id vc4_dpi_dt_match
[] = {
225 { .compatible
= "brcm,bcm2835-dpi", .data
= NULL
},
229 /* Sets up the next link in the display chain, whether it's a panel or
232 static int vc4_dpi_init_bridge(struct vc4_dpi
*dpi
)
234 struct device
*dev
= &dpi
->pdev
->dev
;
235 struct drm_panel
*panel
;
236 struct drm_bridge
*bridge
;
239 ret
= drm_of_find_panel_or_bridge(dev
->of_node
, 0, 0,
242 /* If nothing was connected in the DT, that's not an
252 bridge
= drm_panel_bridge_add_typed(panel
,
253 DRM_MODE_CONNECTOR_DPI
);
255 return drm_bridge_attach(dpi
->encoder
, bridge
, NULL
);
258 static int vc4_dpi_bind(struct device
*dev
, struct device
*master
, void *data
)
260 struct platform_device
*pdev
= to_platform_device(dev
);
261 struct drm_device
*drm
= dev_get_drvdata(master
);
262 struct vc4_dev
*vc4
= to_vc4_dev(drm
);
264 struct vc4_dpi_encoder
*vc4_dpi_encoder
;
267 dpi
= devm_kzalloc(dev
, sizeof(*dpi
), GFP_KERNEL
);
271 vc4_dpi_encoder
= devm_kzalloc(dev
, sizeof(*vc4_dpi_encoder
),
273 if (!vc4_dpi_encoder
)
275 vc4_dpi_encoder
->base
.type
= VC4_ENCODER_TYPE_DPI
;
276 vc4_dpi_encoder
->dpi
= dpi
;
277 dpi
->encoder
= &vc4_dpi_encoder
->base
.base
;
280 dpi
->regs
= vc4_ioremap_regs(pdev
, 0);
281 if (IS_ERR(dpi
->regs
))
282 return PTR_ERR(dpi
->regs
);
283 dpi
->regset
.base
= dpi
->regs
;
284 dpi
->regset
.regs
= dpi_regs
;
285 dpi
->regset
.nregs
= ARRAY_SIZE(dpi_regs
);
287 if (DPI_READ(DPI_ID
) != DPI_ID_VALUE
) {
288 dev_err(dev
, "Port returned 0x%08x for ID instead of 0x%08x\n",
289 DPI_READ(DPI_ID
), DPI_ID_VALUE
);
293 dpi
->core_clock
= devm_clk_get(dev
, "core");
294 if (IS_ERR(dpi
->core_clock
)) {
295 ret
= PTR_ERR(dpi
->core_clock
);
296 if (ret
!= -EPROBE_DEFER
)
297 DRM_ERROR("Failed to get core clock: %d\n", ret
);
300 dpi
->pixel_clock
= devm_clk_get(dev
, "pixel");
301 if (IS_ERR(dpi
->pixel_clock
)) {
302 ret
= PTR_ERR(dpi
->pixel_clock
);
303 if (ret
!= -EPROBE_DEFER
)
304 DRM_ERROR("Failed to get pixel clock: %d\n", ret
);
308 ret
= clk_prepare_enable(dpi
->core_clock
);
310 DRM_ERROR("Failed to turn on core clock: %d\n", ret
);
312 drm_encoder_init(drm
, dpi
->encoder
, &vc4_dpi_encoder_funcs
,
313 DRM_MODE_ENCODER_DPI
, NULL
);
314 drm_encoder_helper_add(dpi
->encoder
, &vc4_dpi_encoder_helper_funcs
);
316 ret
= vc4_dpi_init_bridge(dpi
);
318 goto err_destroy_encoder
;
320 dev_set_drvdata(dev
, dpi
);
324 vc4_debugfs_add_regset32(drm
, "dpi_regs", &dpi
->regset
);
329 drm_encoder_cleanup(dpi
->encoder
);
330 clk_disable_unprepare(dpi
->core_clock
);
334 static void vc4_dpi_unbind(struct device
*dev
, struct device
*master
,
337 struct drm_device
*drm
= dev_get_drvdata(master
);
338 struct vc4_dev
*vc4
= to_vc4_dev(drm
);
339 struct vc4_dpi
*dpi
= dev_get_drvdata(dev
);
341 drm_of_panel_bridge_remove(dev
->of_node
, 0, 0);
343 drm_encoder_cleanup(dpi
->encoder
);
345 clk_disable_unprepare(dpi
->core_clock
);
350 static const struct component_ops vc4_dpi_ops
= {
351 .bind
= vc4_dpi_bind
,
352 .unbind
= vc4_dpi_unbind
,
355 static int vc4_dpi_dev_probe(struct platform_device
*pdev
)
357 return component_add(&pdev
->dev
, &vc4_dpi_ops
);
360 static int vc4_dpi_dev_remove(struct platform_device
*pdev
)
362 component_del(&pdev
->dev
, &vc4_dpi_ops
);
366 struct platform_driver vc4_dpi_driver
= {
367 .probe
= vc4_dpi_dev_probe
,
368 .remove
= vc4_dpi_dev_remove
,
371 .of_match_table
= vc4_dpi_dt_match
,