?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / gpu / drm / vmwgfx / device_include / svga3d_devcaps.h
blobf256560049bfde168f670842a48eed7ac13504c0
1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
2 /**********************************************************
3 * Copyright 1998-2015 VMware, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without
8 * restriction, including without limitation the rights to use, copy,
9 * modify, merge, publish, distribute, sublicense, and/or sell copies
10 * of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
20 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
21 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 **********************************************************/
26
27 /*
28 * svga3d_devcaps.h --
29 *
30 * SVGA 3d caps definitions
31 */
32
33 #ifndef _SVGA3D_DEVCAPS_H_
34 #define _SVGA3D_DEVCAPS_H_
35
36 #define INCLUDE_ALLOW_MODULE
37 #define INCLUDE_ALLOW_USERLEVEL
38 #define INCLUDE_ALLOW_VMCORE
39
40 #include "includeCheck.h"
41
42 /*
43 * 3D Hardware Version
44 *
45 * The hardware version is stored in the SVGA_FIFO_3D_HWVERSION fifo
46 * register. Is set by the host and read by the guest. This lets
47 * us make new guest drivers which are backwards-compatible with old
48 * SVGA hardware revisions. It does not let us support old guest
49 * drivers. Good enough for now.
50 *
51 */
52
53 #define SVGA3D_MAKE_HWVERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
54 #define SVGA3D_MAJOR_HWVERSION(version) ((version) >> 16)
55 #define SVGA3D_MINOR_HWVERSION(version) ((version) & 0xFF)
56
57 typedef enum {
58 SVGA3D_HWVERSION_WS5_RC1 = SVGA3D_MAKE_HWVERSION(0, 1),
59 SVGA3D_HWVERSION_WS5_RC2 = SVGA3D_MAKE_HWVERSION(0, 2),
60 SVGA3D_HWVERSION_WS51_RC1 = SVGA3D_MAKE_HWVERSION(0, 3),
61 SVGA3D_HWVERSION_WS6_B1 = SVGA3D_MAKE_HWVERSION(1, 1),
62 SVGA3D_HWVERSION_FUSION_11 = SVGA3D_MAKE_HWVERSION(1, 4),
63 SVGA3D_HWVERSION_WS65_B1 = SVGA3D_MAKE_HWVERSION(2, 0),
64 SVGA3D_HWVERSION_WS8_B1 = SVGA3D_MAKE_HWVERSION(2, 1),
65 SVGA3D_HWVERSION_CURRENT = SVGA3D_HWVERSION_WS8_B1,
66 } SVGA3dHardwareVersion;
67
68 /*
69 * DevCap indexes.
70 */
71
72 typedef enum {
73 SVGA3D_DEVCAP_INVALID = ((uint32)-1),
74 SVGA3D_DEVCAP_3D = 0,
75 SVGA3D_DEVCAP_MAX_LIGHTS = 1,
76
77 /*
78 * SVGA3D_DEVCAP_MAX_TEXTURES reflects the maximum number of
79 * fixed-function texture units available. Each of these units
80 * work in both FFP and Shader modes, and they support texture
81 * transforms and texture coordinates. The host may have additional
82 * texture image units that are only usable with shaders.
83 */
84 SVGA3D_DEVCAP_MAX_TEXTURES = 2,
85 SVGA3D_DEVCAP_MAX_CLIP_PLANES = 3,
86 SVGA3D_DEVCAP_VERTEX_SHADER_VERSION = 4,
87 SVGA3D_DEVCAP_VERTEX_SHADER = 5,
88 SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION = 6,
89 SVGA3D_DEVCAP_FRAGMENT_SHADER = 7,
90 SVGA3D_DEVCAP_MAX_RENDER_TARGETS = 8,
91 SVGA3D_DEVCAP_S23E8_TEXTURES = 9,
92 SVGA3D_DEVCAP_S10E5_TEXTURES = 10,
93 SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND = 11,
94 SVGA3D_DEVCAP_D16_BUFFER_FORMAT = 12,
95 SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT = 13,
96 SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT = 14,
97 SVGA3D_DEVCAP_QUERY_TYPES = 15,
98 SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING = 16,
99 SVGA3D_DEVCAP_MAX_POINT_SIZE = 17,
100 SVGA3D_DEVCAP_MAX_SHADER_TEXTURES = 18,
101 SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH = 19,
102 SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT = 20,
103 SVGA3D_DEVCAP_MAX_VOLUME_EXTENT = 21,
104 SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT = 22,
105 SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO = 23,
106 SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY = 24,
107 SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT = 25,
108 SVGA3D_DEVCAP_MAX_VERTEX_INDEX = 26,
109 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS = 27,
110 SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS = 28,
111 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS = 29,
112 SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS = 30,
113 SVGA3D_DEVCAP_TEXTURE_OPS = 31,
114 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8 = 32,
115 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8 = 33,
116 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10 = 34,
117 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5 = 35,
118 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5 = 36,
119 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4 = 37,
120 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5 = 38,
121 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16 = 39,
122 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8 = 40,
123 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8 = 41,
124 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8 = 42,
125 SVGA3D_DEVCAP_SURFACEFMT_Z_D16 = 43,
126 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8 = 44,
127 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8 = 45,
128 SVGA3D_DEVCAP_SURFACEFMT_DXT1 = 46,
129 SVGA3D_DEVCAP_SURFACEFMT_DXT2 = 47,
130 SVGA3D_DEVCAP_SURFACEFMT_DXT3 = 48,
131 SVGA3D_DEVCAP_SURFACEFMT_DXT4 = 49,
132 SVGA3D_DEVCAP_SURFACEFMT_DXT5 = 50,
133 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8 = 51,
134 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10 = 52,
135 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8 = 53,
136 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8 = 54,
137 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8 = 55,
138 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5 = 56,
139 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8 = 57,
140 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5 = 58,
141 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8 = 59,
142 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5 = 60,
143 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8 = 61,
144
145 /*
146 * There is a hole in our devcap definitions for
147 * historical reasons.
148 *
149 * Define a constant just for completeness.
150 */
151 SVGA3D_DEVCAP_MISSING62 = 62,
152
153 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES = 63,
154
155 /*
156 * Note that MAX_SIMULTANEOUS_RENDER_TARGETS is a maximum count of color
157 * render targets. This does not include the depth or stencil targets.
158 */
159 SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS = 64,
160
161 SVGA3D_DEVCAP_SURFACEFMT_V16U16 = 65,
162 SVGA3D_DEVCAP_SURFACEFMT_G16R16 = 66,
163 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16 = 67,
164 SVGA3D_DEVCAP_SURFACEFMT_UYVY = 68,
165 SVGA3D_DEVCAP_SURFACEFMT_YUY2 = 69,
166 SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES = 70,
167 SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES = 71,
168 SVGA3D_DEVCAP_ALPHATOCOVERAGE = 72,
169 SVGA3D_DEVCAP_SUPERSAMPLE = 73,
170 SVGA3D_DEVCAP_AUTOGENMIPMAPS = 74,
171 SVGA3D_DEVCAP_SURFACEFMT_NV12 = 75,
172 SVGA3D_DEVCAP_SURFACEFMT_AYUV = 76,
173
174 /*
175 * This is the maximum number of SVGA context IDs that the guest
176 * can define using SVGA_3D_CMD_CONTEXT_DEFINE.
177 */
178 SVGA3D_DEVCAP_MAX_CONTEXT_IDS = 77,
179
180 /*
181 * This is the maximum number of SVGA surface IDs that the guest
182 * can define using SVGA_3D_CMD_SURFACE_DEFINE*.
183 */
184 SVGA3D_DEVCAP_MAX_SURFACE_IDS = 78,
185
186 SVGA3D_DEVCAP_SURFACEFMT_Z_DF16 = 79,
187 SVGA3D_DEVCAP_SURFACEFMT_Z_DF24 = 80,
188 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT = 81,
189
190 SVGA3D_DEVCAP_SURFACEFMT_ATI1 = 82,
191 SVGA3D_DEVCAP_SURFACEFMT_ATI2 = 83,
192
193 /*
194 * Deprecated.
195 */
196 SVGA3D_DEVCAP_DEAD1 = 84,
197
198 /*
199 * This contains several SVGA_3D_CAPS_VIDEO_DECODE elements
200 * ored together, one for every type of video decoding supported.
201 */
202 SVGA3D_DEVCAP_VIDEO_DECODE = 85,
203
204 /*
205 * This contains several SVGA_3D_CAPS_VIDEO_PROCESS elements
206 * ored together, one for every type of video processing supported.
207 */
208 SVGA3D_DEVCAP_VIDEO_PROCESS = 86,
209
210 SVGA3D_DEVCAP_LINE_AA = 87, /* boolean */
211 SVGA3D_DEVCAP_LINE_STIPPLE = 88, /* boolean */
212 SVGA3D_DEVCAP_MAX_LINE_WIDTH = 89, /* float */
213 SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH = 90, /* float */
214
215 SVGA3D_DEVCAP_SURFACEFMT_YV12 = 91,
216
217 /*
218 * Does the host support the SVGA logic ops commands?
219 */
220 SVGA3D_DEVCAP_LOGICOPS = 92,
221
222 /*
223 * Are TS_CONSTANT, TS_COLOR_KEY, and TS_COLOR_KEY_ENABLE supported?
224 */
225 SVGA3D_DEVCAP_TS_COLOR_KEY = 93, /* boolean */
226
227 /*
228 * Deprecated.
229 */
230 SVGA3D_DEVCAP_DEAD2 = 94,
231
232 /*
233 * Does the device support DXContexts?
234 */
235 SVGA3D_DEVCAP_DXCONTEXT = 95,
236
237 /*
238 * What is the maximum size of a texture array?
239 *
240 * (Even if this cap is zero, cubemaps are still allowed.)
241 */
242 SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE = 96,
243
244 /*
245 * What is the maximum number of vertex buffers or vertex input registers
246 * that can be expected to work correctly with a DXContext?
247 *
248 * The guest is allowed to set up to SVGA3D_DX_MAX_VERTEXBUFFERS, but
249 * anything in excess of this cap is not guaranteed to render correctly.
250 *
251 * Similarly, the guest can set up to SVGA3D_DX_MAX_VERTEXINPUTREGISTERS
252 * input registers without the SVGA3D_DEVCAP_SM4_1 cap, or
253 * SVGA3D_DX_SM41_MAX_VERTEXINPUTREGISTERS with the SVGA3D_DEVCAP_SM4_1,
254 * but only the registers up to this cap value are guaranteed to render
255 * correctly.
256 *
257 * If guest-drivers are able to expose a lower-limit, it's recommended
258 * that they clamp to this value. Otherwise, the host will make a
259 * best-effort on case-by-case basis if guests exceed this.
260 */
261 SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS = 97,
262
263 /*
264 * What is the maximum number of constant buffers that can be expected to
265 * work correctly with a DX context?
266 *
267 * The guest is allowed to set up to SVGA3D_DX_MAX_CONSTBUFFERS, but
268 * anything in excess of this cap is not guaranteed to render correctly.
269 *
270 * If guest-drivers are able to expose a lower-limit, it's recommended
271 * that they clamp to this value. Otherwise, the host will make a
272 * best-effort on case-by-case basis if guests exceed this.
273 */
274 SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS = 98,
275
276 /*
277 * Does the device support provoking vertex control?
278 *
279 * If this cap is present, the provokingVertexLast field in the
280 * rasterizer state is enabled. (Guests can then set it to FALSE,
281 * meaning that the first vertex is the provoking vertex, or TRUE,
282 * meaning that the last verteix is the provoking vertex.)
283 *
284 * If this cap is FALSE, then guests should set the provokingVertexLast
285 * to FALSE, otherwise rendering behavior is undefined.
286 */
287 SVGA3D_DEVCAP_DX_PROVOKING_VERTEX = 99,
288
289 SVGA3D_DEVCAP_DXFMT_X8R8G8B8 = 100,
290 SVGA3D_DEVCAP_DXFMT_A8R8G8B8 = 101,
291 SVGA3D_DEVCAP_DXFMT_R5G6B5 = 102,
292 SVGA3D_DEVCAP_DXFMT_X1R5G5B5 = 103,
293 SVGA3D_DEVCAP_DXFMT_A1R5G5B5 = 104,
294 SVGA3D_DEVCAP_DXFMT_A4R4G4B4 = 105,
295 SVGA3D_DEVCAP_DXFMT_Z_D32 = 106,
296 SVGA3D_DEVCAP_DXFMT_Z_D16 = 107,
297 SVGA3D_DEVCAP_DXFMT_Z_D24S8 = 108,
298 SVGA3D_DEVCAP_DXFMT_Z_D15S1 = 109,
299 SVGA3D_DEVCAP_DXFMT_LUMINANCE8 = 110,
300 SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4 = 111,
301 SVGA3D_DEVCAP_DXFMT_LUMINANCE16 = 112,
302 SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8 = 113,
303 SVGA3D_DEVCAP_DXFMT_DXT1 = 114,
304 SVGA3D_DEVCAP_DXFMT_DXT2 = 115,
305 SVGA3D_DEVCAP_DXFMT_DXT3 = 116,
306 SVGA3D_DEVCAP_DXFMT_DXT4 = 117,
307 SVGA3D_DEVCAP_DXFMT_DXT5 = 118,
308 SVGA3D_DEVCAP_DXFMT_BUMPU8V8 = 119,
309 SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5 = 120,
310 SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8 = 121,
311 SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1 = 122,
312 SVGA3D_DEVCAP_DXFMT_ARGB_S10E5 = 123,
313 SVGA3D_DEVCAP_DXFMT_ARGB_S23E8 = 124,
314 SVGA3D_DEVCAP_DXFMT_A2R10G10B10 = 125,
315 SVGA3D_DEVCAP_DXFMT_V8U8 = 126,
316 SVGA3D_DEVCAP_DXFMT_Q8W8V8U8 = 127,
317 SVGA3D_DEVCAP_DXFMT_CxV8U8 = 128,
318 SVGA3D_DEVCAP_DXFMT_X8L8V8U8 = 129,
319 SVGA3D_DEVCAP_DXFMT_A2W10V10U10 = 130,
320 SVGA3D_DEVCAP_DXFMT_ALPHA8 = 131,
321 SVGA3D_DEVCAP_DXFMT_R_S10E5 = 132,
322 SVGA3D_DEVCAP_DXFMT_R_S23E8 = 133,
323 SVGA3D_DEVCAP_DXFMT_RG_S10E5 = 134,
324 SVGA3D_DEVCAP_DXFMT_RG_S23E8 = 135,
325 SVGA3D_DEVCAP_DXFMT_BUFFER = 136,
326 SVGA3D_DEVCAP_DXFMT_Z_D24X8 = 137,
327 SVGA3D_DEVCAP_DXFMT_V16U16 = 138,
328 SVGA3D_DEVCAP_DXFMT_G16R16 = 139,
329 SVGA3D_DEVCAP_DXFMT_A16B16G16R16 = 140,
330 SVGA3D_DEVCAP_DXFMT_UYVY = 141,
331 SVGA3D_DEVCAP_DXFMT_YUY2 = 142,
332 SVGA3D_DEVCAP_DXFMT_NV12 = 143,
333 SVGA3D_DEVCAP_DXFMT_AYUV = 144,
334 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS = 145,
335 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT = 146,
336 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT = 147,
337 SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS = 148,
338 SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT = 149,
339 SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT = 150,
340 SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT = 151,
341 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS = 152,
342 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT = 153,
343 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM = 154,
344 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT = 155,
345 SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS = 156,
346 SVGA3D_DEVCAP_DXFMT_R32G32_UINT = 157,
347 SVGA3D_DEVCAP_DXFMT_R32G32_SINT = 158,
348 SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS = 159,
349 SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT = 160,
350 SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24 = 161,
351 SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT = 162,
352 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS = 163,
353 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT = 164,
354 SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT = 165,
355 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS = 166,
356 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM = 167,
357 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB = 168,
358 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT = 169,
359 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT = 170,
360 SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS = 171,
361 SVGA3D_DEVCAP_DXFMT_R16G16_UINT = 172,
362 SVGA3D_DEVCAP_DXFMT_R16G16_SINT = 173,
363 SVGA3D_DEVCAP_DXFMT_R32_TYPELESS = 174,
364 SVGA3D_DEVCAP_DXFMT_D32_FLOAT = 175,
365 SVGA3D_DEVCAP_DXFMT_R32_UINT = 176,
366 SVGA3D_DEVCAP_DXFMT_R32_SINT = 177,
367 SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS = 178,
368 SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT = 179,
369 SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8 = 180,
370 SVGA3D_DEVCAP_DXFMT_X24_G8_UINT = 181,
371 SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS = 182,
372 SVGA3D_DEVCAP_DXFMT_R8G8_UNORM = 183,
373 SVGA3D_DEVCAP_DXFMT_R8G8_UINT = 184,
374 SVGA3D_DEVCAP_DXFMT_R8G8_SINT = 185,
375 SVGA3D_DEVCAP_DXFMT_R16_TYPELESS = 186,
376 SVGA3D_DEVCAP_DXFMT_R16_UNORM = 187,
377 SVGA3D_DEVCAP_DXFMT_R16_UINT = 188,
378 SVGA3D_DEVCAP_DXFMT_R16_SNORM = 189,
379 SVGA3D_DEVCAP_DXFMT_R16_SINT = 190,
380 SVGA3D_DEVCAP_DXFMT_R8_TYPELESS = 191,
381 SVGA3D_DEVCAP_DXFMT_R8_UNORM = 192,
382 SVGA3D_DEVCAP_DXFMT_R8_UINT = 193,
383 SVGA3D_DEVCAP_DXFMT_R8_SNORM = 194,
384 SVGA3D_DEVCAP_DXFMT_R8_SINT = 195,
385 SVGA3D_DEVCAP_DXFMT_P8 = 196,
386 SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP = 197,
387 SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM = 198,
388 SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM = 199,
389 SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS = 200,
390 SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB = 201,
391 SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS = 202,
392 SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB = 203,
393 SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS = 204,
394 SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB = 205,
395 SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS = 206,
396 SVGA3D_DEVCAP_DXFMT_ATI1 = 207,
397 SVGA3D_DEVCAP_DXFMT_BC4_SNORM = 208,
398 SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS = 209,
399 SVGA3D_DEVCAP_DXFMT_ATI2 = 210,
400 SVGA3D_DEVCAP_DXFMT_BC5_SNORM = 211,
401 SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM = 212,
402 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS = 213,
403 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB = 214,
404 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS = 215,
405 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB = 216,
406 SVGA3D_DEVCAP_DXFMT_Z_DF16 = 217,
407 SVGA3D_DEVCAP_DXFMT_Z_DF24 = 218,
408 SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT = 219,
409 SVGA3D_DEVCAP_DXFMT_YV12 = 220,
410 SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT = 221,
411 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT = 222,
412 SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM = 223,
413 SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT = 224,
414 SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM = 225,
415 SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM = 226,
416 SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT = 227,
417 SVGA3D_DEVCAP_DXFMT_R16G16_UNORM = 228,
418 SVGA3D_DEVCAP_DXFMT_R16G16_SNORM = 229,
419 SVGA3D_DEVCAP_DXFMT_R32_FLOAT = 230,
420 SVGA3D_DEVCAP_DXFMT_R8G8_SNORM = 231,
421 SVGA3D_DEVCAP_DXFMT_R16_FLOAT = 232,
422 SVGA3D_DEVCAP_DXFMT_D16_UNORM = 233,
423 SVGA3D_DEVCAP_DXFMT_A8_UNORM = 234,
424 SVGA3D_DEVCAP_DXFMT_BC1_UNORM = 235,
425 SVGA3D_DEVCAP_DXFMT_BC2_UNORM = 236,
426 SVGA3D_DEVCAP_DXFMT_BC3_UNORM = 237,
427 SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM = 238,
428 SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM = 239,
429 SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM = 240,
430 SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM = 241,
431 SVGA3D_DEVCAP_DXFMT_BC4_UNORM = 242,
432 SVGA3D_DEVCAP_DXFMT_BC5_UNORM = 243,
433
434 /*
435 * Advertises shaderModel 4.1 support, independent blend-states,
436 * cube-map arrays, and a higher vertex input registers limit.
437 *
438 * (See documentation on SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS.)
439 */
440 SVGA3D_DEVCAP_SM41 = 244,
441
442 SVGA3D_DEVCAP_MULTISAMPLE_2X = 245,
443 SVGA3D_DEVCAP_MULTISAMPLE_4X = 246,
444
445 SVGA3D_DEVCAP_MAX /* This must be the last index. */
446 } SVGA3dDevCapIndex;
447
448 /*
449 * Bit definitions for DXFMT devcaps
450 *
451 *
452 * SUPPORTED: Can the format be defined?
453 * SHADER_SAMPLE: Can the format be sampled from a shader?
454 * COLOR_RENDERTARGET: Can the format be a color render target?
455 * DEPTH_RENDERTARGET: Can the format be a depth render target?
456 * BLENDABLE: Is the format blendable?
457 * MIPS: Does the format support mip levels?
458 * ARRAY: Does the format support texture arrays?
459 * VOLUME: Does the format support having volume?
460 * MULTISAMPLE: Does the format support multisample?
461 */
462 #define SVGA3D_DXFMT_SUPPORTED (1 << 0)
463 #define SVGA3D_DXFMT_SHADER_SAMPLE (1 << 1)
464 #define SVGA3D_DXFMT_COLOR_RENDERTARGET (1 << 2)
465 #define SVGA3D_DXFMT_DEPTH_RENDERTARGET (1 << 3)
466 #define SVGA3D_DXFMT_BLENDABLE (1 << 4)
467 #define SVGA3D_DXFMT_MIPS (1 << 5)
468 #define SVGA3D_DXFMT_ARRAY (1 << 6)
469 #define SVGA3D_DXFMT_VOLUME (1 << 7)
470 #define SVGA3D_DXFMT_DX_VERTEX_BUFFER (1 << 8)
471 #define SVGA3D_DXFMT_MULTISAMPLE (1 << 9)
472 #define SVGA3D_DXFMT_MAX (1 << 10)
473
474 typedef union {
475 Bool b;
476 uint32 u;
477 int32 i;
478 float f;
479 } SVGA3dDevCapResult;
480
481 #endif /* _SVGA3D_DEVCAPS_H_ */
Linux with added FPC-III support