drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Most ISHTP provider device and ISHTP logic declarations
   4  *
   5  * Copyright (c) 2003-2016, Intel Corporation.
   6  */
   7
   8 #ifndef _ISHTP_DEV_H_
   9 #define _ISHTP_DEV_H_
  10
  11 #include <linux/types.h>
  12 #include <linux/spinlock.h>
  13 #include "bus.h"
  14 #include "hbm.h"
  15
  16 #define IPC_PAYLOAD_SIZE        128
  17 #define ISHTP_RD_MSG_BUF_SIZE   IPC_PAYLOAD_SIZE
  18 #define IPC_FULL_MSG_SIZE       132
  19
  20 /* Number of messages to be held in ISR->BH FIFO */
  21 #define RD_INT_FIFO_SIZE        64
  22
  23 /*
  24  * Number of IPC messages to be held in Tx FIFO, to be sent by ISR -
  25  * Tx complete interrupt or RX_COMPLETE handler
  26  */
  27 #define IPC_TX_FIFO_SIZE        512
  28
  29 /*
  30  * Number of Maximum ISHTP Clients
  31  */
  32 #define ISHTP_CLIENTS_MAX 256
  33
  34 /*
  35  * Number of File descriptors/handles
  36  * that can be opened to the driver.
  37  *
  38  * Limit to 255: 256 Total Clients
  39  * minus internal client for ISHTP Bus Messages
  40  */
  41 #define ISHTP_MAX_OPEN_HANDLE_COUNT (ISHTP_CLIENTS_MAX - 1)
  42
  43 /* Internal Clients Number */
  44 #define ISHTP_HOST_CLIENT_ID_ANY                (-1)
  45 #define ISHTP_HBM_HOST_CLIENT_ID                0
  46
  47 #define MAX_DMA_DELAY   20
  48
  49 /* ISHTP device states */
  50 enum ishtp_dev_state {
  51         ISHTP_DEV_INITIALIZING = 0,
  52         ISHTP_DEV_INIT_CLIENTS,
  53         ISHTP_DEV_ENABLED,
  54         ISHTP_DEV_RESETTING,
  55         ISHTP_DEV_DISABLED,
  56         ISHTP_DEV_POWER_DOWN,
  57         ISHTP_DEV_POWER_UP
  58 };
  59 const char *ishtp_dev_state_str(int state);
  60
  61 struct ishtp_cl;
  62
  63 /**
  64  * struct ishtp_fw_client - representation of fw client
  65  *
  66  * @props - client properties
  67  * @client_id - fw client id
  68  */
  69 struct ishtp_fw_client {
  70         struct ishtp_client_properties props;
  71         uint8_t client_id;
  72 };
  73
  74 /*
  75  * Control info for IPC messages ISHTP/IPC sending FIFO -
  76  * list with inline data buffer
  77  * This structure will be filled with parameters submitted
  78  * by the caller glue layer
  79  * 'buf' may be pointing to the external buffer or to 'inline_data'
  80  * 'offset' will be initialized to 0 by submitting
  81  *
  82  * 'ipc_send_compl' is intended for use by clients that send fragmented
  83  * messages. When a fragment is sent down to IPC msg regs,
  84  * it will be called.
  85  * If it has more fragments to send, it will do it. With last fragment
  86  * it will send appropriate ISHTP "message-complete" flag.
  87  * It will remove the outstanding message
  88  * (mark outstanding buffer as available).
  89  * If counting flow control is in work and there are more flow control
  90  * credits, it can put the next client message queued in cl.
  91  * structure for IPC processing.
  92  *
  93  */
  94 struct wr_msg_ctl_info {
  95         /* Will be called with 'ipc_send_compl_prm' as parameter */
  96         void (*ipc_send_compl)(void *);
  97
  98         void *ipc_send_compl_prm;
  99         size_t length;
 100         struct list_head        link;
 101         unsigned char   inline_data[IPC_FULL_MSG_SIZE];
 102 };
 103
 104 /*
 105  * The ISHTP layer talks to hardware IPC message using the following
 106  * callbacks
 107  */
 108 struct ishtp_hw_ops {
 109         int     (*hw_reset)(struct ishtp_device *dev);
 110         int     (*ipc_reset)(struct ishtp_device *dev);
 111         uint32_t (*ipc_get_header)(struct ishtp_device *dev, int length,
 112                                    int busy);
 113         int     (*write)(struct ishtp_device *dev,
 114                 void (*ipc_send_compl)(void *), void *ipc_send_compl_prm,
 115                 unsigned char *msg, int length);
 116         uint32_t        (*ishtp_read_hdr)(const struct ishtp_device *dev);
 117         int     (*ishtp_read)(struct ishtp_device *dev, unsigned char *buffer,
 118                         unsigned long buffer_length);
 119         uint32_t        (*get_fw_status)(struct ishtp_device *dev);
 120         void    (*sync_fw_clock)(struct ishtp_device *dev);
 121 };
 122
 123 /**
 124  * struct ishtp_device - ISHTP private device struct
 125  */
 126 struct ishtp_device {
 127         struct device *devc;    /* pointer to lowest device */
 128         struct pci_dev *pdev;   /* PCI device to get device ids */
 129
 130         /* waitq for waiting for suspend response */
 131         wait_queue_head_t suspend_wait;
 132         bool suspend_flag;      /* Suspend is active */
 133
 134         /* waitq for waiting for resume response */
 135         wait_queue_head_t resume_wait;
 136         bool resume_flag;       /*Resume is active */
 137
 138         /*
 139          * lock for the device, for everything that doesn't have
 140          * a dedicated spinlock
 141          */
 142         spinlock_t device_lock;
 143
 144         bool recvd_hw_ready;
 145         struct hbm_version version;
 146         int transfer_path; /* Choice of transfer path: IPC or DMA */
 147
 148         /* ishtp device states */
 149         enum ishtp_dev_state dev_state;
 150         enum ishtp_hbm_state hbm_state;
 151
 152         /* driver read queue */
 153         struct ishtp_cl_rb read_list;
 154         spinlock_t read_list_spinlock;
 155
 156         /* list of ishtp_cl's */
 157         struct list_head cl_list;
 158         spinlock_t cl_list_lock;
 159         long open_handle_count;
 160
 161         /* List of bus devices */
 162         struct list_head device_list;
 163         spinlock_t device_list_lock;
 164
 165         /* waiting queues for receive message from FW */
 166         wait_queue_head_t wait_hw_ready;
 167         wait_queue_head_t wait_hbm_recvd_msg;
 168
 169         /* FIFO for input messages for BH processing */
 170         unsigned char rd_msg_fifo[RD_INT_FIFO_SIZE * IPC_PAYLOAD_SIZE];
 171         unsigned int rd_msg_fifo_head, rd_msg_fifo_tail;
 172         spinlock_t rd_msg_spinlock;
 173         struct work_struct bh_hbm_work;
 174
 175         /* IPC write queue */
 176         struct list_head wr_processing_list, wr_free_list;
 177         /* For both processing list  and free list */
 178         spinlock_t wr_processing_spinlock;
 179
 180         struct ishtp_fw_client *fw_clients; /*Note:memory has to be allocated*/
 181         DECLARE_BITMAP(fw_clients_map, ISHTP_CLIENTS_MAX);
 182         DECLARE_BITMAP(host_clients_map, ISHTP_CLIENTS_MAX);
 183         uint8_t fw_clients_num;
 184         uint8_t fw_client_presentation_num;
 185         uint8_t fw_client_index;
 186         spinlock_t fw_clients_lock;
 187
 188         /* TX DMA buffers and slots */
 189         int ishtp_host_dma_enabled;
 190         void *ishtp_host_dma_tx_buf;
 191         unsigned int ishtp_host_dma_tx_buf_size;
 192         uint64_t ishtp_host_dma_tx_buf_phys;
 193         int ishtp_dma_num_slots;
 194
 195         /* map of 4k blocks in Tx dma buf: 0-free, 1-used */
 196         uint8_t *ishtp_dma_tx_map;
 197         spinlock_t ishtp_dma_tx_lock;
 198
 199         /* RX DMA buffers and slots */
 200         void *ishtp_host_dma_rx_buf;
 201         unsigned int ishtp_host_dma_rx_buf_size;
 202         uint64_t ishtp_host_dma_rx_buf_phys;
 203
 204         /* Dump to trace buffers if enabled*/
 205         __printf(2, 3) void (*print_log)(struct ishtp_device *dev,
 206                                          const char *format, ...);
 207
 208         /* Debug stats */
 209         unsigned int    ipc_rx_cnt;
 210         unsigned long long      ipc_rx_bytes_cnt;
 211         unsigned int    ipc_tx_cnt;
 212         unsigned long long      ipc_tx_bytes_cnt;
 213
 214         const struct ishtp_hw_ops *ops;
 215         size_t  mtu;
 216         uint32_t        ishtp_msg_hdr;
 217         char hw[0] __aligned(sizeof(void *));
 218 };
 219
 220 static inline unsigned long ishtp_secs_to_jiffies(unsigned long sec)
 221 {
 222         return msecs_to_jiffies(sec * MSEC_PER_SEC);
 223 }
 224
 225 /*
 226  * Register Access Function
 227  */
 228 static inline int ish_ipc_reset(struct ishtp_device *dev)
 229 {
 230         return dev->ops->ipc_reset(dev);
 231 }
 232
 233 /* Exported function */
 234 void    ishtp_device_init(struct ishtp_device *dev);
 235 int     ishtp_start(struct ishtp_device *dev);
 236
 237 #endif /*_ISHTP_DEV_H_*/