1 // SPDX-License-Identifier: GPL-2.0
3 #define pr_fmt(fmt) "irq-ls-extirq: " fmt
6 #include <linux/irqchip.h>
7 #include <linux/irqdomain.h>
9 #include <linux/mfd/syscon.h>
10 #include <linux/regmap.h>
11 #include <linux/slab.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #define LS1021A_SCFGREVCR 0x200
18 struct ls_extirq_data
{
19 struct regmap
*syscon
;
23 struct irq_fwspec map
[MAXIRQ
];
27 ls_extirq_set_type(struct irq_data
*data
, unsigned int type
)
29 struct ls_extirq_data
*priv
= data
->chip_data
;
30 irq_hw_number_t hwirq
= data
->hwirq
;
33 if (priv
->bit_reverse
)
34 mask
= 1U << (31 - hwirq
);
39 case IRQ_TYPE_LEVEL_LOW
:
40 type
= IRQ_TYPE_LEVEL_HIGH
;
43 case IRQ_TYPE_EDGE_FALLING
:
44 type
= IRQ_TYPE_EDGE_RISING
;
47 case IRQ_TYPE_LEVEL_HIGH
:
48 case IRQ_TYPE_EDGE_RISING
:
54 regmap_update_bits(priv
->syscon
, priv
->intpcr
, mask
, value
);
56 return irq_chip_set_type_parent(data
, type
);
59 static struct irq_chip ls_extirq_chip
= {
61 .irq_mask
= irq_chip_mask_parent
,
62 .irq_unmask
= irq_chip_unmask_parent
,
63 .irq_eoi
= irq_chip_eoi_parent
,
64 .irq_set_type
= ls_extirq_set_type
,
65 .irq_retrigger
= irq_chip_retrigger_hierarchy
,
66 .irq_set_affinity
= irq_chip_set_affinity_parent
,
67 .flags
= IRQCHIP_SET_TYPE_MASKED
,
71 ls_extirq_domain_alloc(struct irq_domain
*domain
, unsigned int virq
,
72 unsigned int nr_irqs
, void *arg
)
74 struct ls_extirq_data
*priv
= domain
->host_data
;
75 struct irq_fwspec
*fwspec
= arg
;
76 irq_hw_number_t hwirq
;
78 if (fwspec
->param_count
!= 2)
81 hwirq
= fwspec
->param
[0];
82 if (hwirq
>= priv
->nirq
)
85 irq_domain_set_hwirq_and_chip(domain
, virq
, hwirq
, &ls_extirq_chip
,
88 return irq_domain_alloc_irqs_parent(domain
, virq
, 1, &priv
->map
[hwirq
]);
91 static const struct irq_domain_ops extirq_domain_ops
= {
92 .xlate
= irq_domain_xlate_twocell
,
93 .alloc
= ls_extirq_domain_alloc
,
94 .free
= irq_domain_free_irqs_common
,
98 ls_extirq_parse_map(struct ls_extirq_data
*priv
, struct device_node
*node
)
104 map
= of_get_property(node
, "interrupt-map", &mapsize
);
107 if (mapsize
% sizeof(*map
))
109 mapsize
/= sizeof(*map
);
112 struct device_node
*ipar
;
113 u32 hwirq
, intsize
, j
;
117 hwirq
= be32_to_cpup(map
);
120 priv
->nirq
= max(priv
->nirq
, hwirq
+ 1);
122 ipar
= of_find_node_by_phandle(be32_to_cpup(map
+ 2));
127 priv
->map
[hwirq
].fwnode
= &ipar
->fwnode
;
128 ret
= of_property_read_u32(ipar
, "#interrupt-cells", &intsize
);
132 if (intsize
> mapsize
)
135 priv
->map
[hwirq
].param_count
= intsize
;
136 for (j
= 0; j
< intsize
; ++j
)
137 priv
->map
[hwirq
].param
[j
] = be32_to_cpup(map
++);
144 ls_extirq_of_init(struct device_node
*node
, struct device_node
*parent
)
147 struct irq_domain
*domain
, *parent_domain
;
148 struct ls_extirq_data
*priv
;
151 parent_domain
= irq_find_host(parent
);
152 if (!parent_domain
) {
153 pr_err("Cannot find parent domain\n");
157 priv
= kzalloc(sizeof(*priv
), GFP_KERNEL
);
161 priv
->syscon
= syscon_node_to_regmap(node
->parent
);
162 if (IS_ERR(priv
->syscon
)) {
163 ret
= PTR_ERR(priv
->syscon
);
164 pr_err("Failed to lookup parent regmap\n");
167 ret
= of_property_read_u32(node
, "reg", &priv
->intpcr
);
169 pr_err("Missing INTPCR offset value\n");
173 ret
= ls_extirq_parse_map(priv
, node
);
177 if (of_device_is_compatible(node
, "fsl,ls1021a-extirq")) {
180 ret
= regmap_read(priv
->syscon
, LS1021A_SCFGREVCR
, &revcr
);
183 priv
->bit_reverse
= (revcr
!= 0);
186 domain
= irq_domain_add_hierarchy(parent_domain
, 0, priv
->nirq
, node
,
187 &extirq_domain_ops
, priv
);
197 IRQCHIP_DECLARE(ls1021a_extirq
, "fsl,ls1021a-extirq", ls_extirq_of_init
);