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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / isdn / hardware / mISDN / mISDNisar.c
blobe325e87c05934cd187a78b273688ea8b82baee55
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * mISDNisar.c ISAR (Siemens PSB 7110) specific functions
4 *
5 * Author Karsten Keil (keil@isdn4linux.de)
6 *
7 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
8 */
9
10 /* define this to enable static debug messages, if you kernel supports
11 * dynamic debugging, you should use debugfs for this
12 */
13 /* #define DEBUG */
14
15 #include <linux/gfp.h>
16 #include <linux/delay.h>
17 #include <linux/vmalloc.h>
18 #include <linux/mISDNhw.h>
19 #include <linux/module.h>
20 #include "isar.h"
21
22 #define ISAR_REV "2.1"
23
24 MODULE_AUTHOR("Karsten Keil");
25 MODULE_LICENSE("GPL v2");
26 MODULE_VERSION(ISAR_REV);
27
28 #define DEBUG_HW_FIRMWARE_FIFO 0x10000
29
30 static const u8 faxmodulation[] = {3, 24, 48, 72, 73, 74, 96, 97, 98, 121,
31 122, 145, 146};
32 #define FAXMODCNT 13
33
34 static void isar_setup(struct isar_hw *);
35
36 static inline int
37 waitforHIA(struct isar_hw *isar, int timeout)
38 {
39 int t = timeout;
40 u8 val = isar->read_reg(isar->hw, ISAR_HIA);
41
42 while ((val & 1) && t) {
43 udelay(1);
44 t--;
45 val = isar->read_reg(isar->hw, ISAR_HIA);
46 }
47 pr_debug("%s: HIA after %dus\n", isar->name, timeout - t);
48 return timeout;
49 }
50
51 /*
52 * send msg to ISAR mailbox
53 * if msg is NULL use isar->buf
54 */
55 static int
56 send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg)
57 {
58 if (!waitforHIA(isar, 1000))
59 return 0;
60 pr_debug("send_mbox(%02x,%02x,%d)\n", his, creg, len);
61 isar->write_reg(isar->hw, ISAR_CTRL_H, creg);
62 isar->write_reg(isar->hw, ISAR_CTRL_L, len);
63 isar->write_reg(isar->hw, ISAR_WADR, 0);
64 if (!msg)
65 msg = isar->buf;
66 if (msg && len) {
67 isar->write_fifo(isar->hw, ISAR_MBOX, msg, len);
68 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
69 int l = 0;
70
71 while (l < (int)len) {
72 hex_dump_to_buffer(msg + l, len - l, 32, 1,
73 isar->log, 256, 1);
74 pr_debug("%s: %s %02x: %s\n", isar->name,
75 __func__, l, isar->log);
76 l += 32;
77 }
78 }
79 }
80 isar->write_reg(isar->hw, ISAR_HIS, his);
81 waitforHIA(isar, 1000);
82 return 1;
83 }
84
85 /*
86 * receive message from ISAR mailbox
87 * if msg is NULL use isar->buf
88 */
89 static void
90 rcv_mbox(struct isar_hw *isar, u8 *msg)
91 {
92 if (!msg)
93 msg = isar->buf;
94 isar->write_reg(isar->hw, ISAR_RADR, 0);
95 if (msg && isar->clsb) {
96 isar->read_fifo(isar->hw, ISAR_MBOX, msg, isar->clsb);
97 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
98 int l = 0;
99
100 while (l < (int)isar->clsb) {
101 hex_dump_to_buffer(msg + l, isar->clsb - l, 32,
102 1, isar->log, 256, 1);
103 pr_debug("%s: %s %02x: %s\n", isar->name,
104 __func__, l, isar->log);
105 l += 32;
106 }
107 }
108 }
109 isar->write_reg(isar->hw, ISAR_IIA, 0);
110 }
111
112 static inline void
113 get_irq_infos(struct isar_hw *isar)
114 {
115 isar->iis = isar->read_reg(isar->hw, ISAR_IIS);
116 isar->cmsb = isar->read_reg(isar->hw, ISAR_CTRL_H);
117 isar->clsb = isar->read_reg(isar->hw, ISAR_CTRL_L);
118 pr_debug("%s: rcv_mbox(%02x,%02x,%d)\n", isar->name,
119 isar->iis, isar->cmsb, isar->clsb);
120 }
121
122 /*
123 * poll answer message from ISAR mailbox
124 * should be used only with ISAR IRQs disabled before DSP was started
125 *
126 */
127 static int
128 poll_mbox(struct isar_hw *isar, int maxdelay)
129 {
130 int t = maxdelay;
131 u8 irq;
132
133 irq = isar->read_reg(isar->hw, ISAR_IRQBIT);
134 while (t && !(irq & ISAR_IRQSTA)) {
135 udelay(1);
136 t--;
137 }
138 if (t) {
139 get_irq_infos(isar);
140 rcv_mbox(isar, NULL);
141 }
142 pr_debug("%s: pulled %d bytes after %d us\n",
143 isar->name, isar->clsb, maxdelay - t);
144 return t;
145 }
146
147 static int
148 ISARVersion(struct isar_hw *isar)
149 {
150 int ver;
151
152 /* disable ISAR IRQ */
153 isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
154 isar->buf[0] = ISAR_MSG_HWVER;
155 isar->buf[1] = 0;
156 isar->buf[2] = 1;
157 if (!send_mbox(isar, ISAR_HIS_VNR, 0, 3, NULL))
158 return -1;
159 if (!poll_mbox(isar, 1000))
160 return -2;
161 if (isar->iis == ISAR_IIS_VNR) {
162 if (isar->clsb == 1) {
163 ver = isar->buf[0] & 0xf;
164 return ver;
165 }
166 return -3;
167 }
168 return -4;
169 }
170
171 static int
172 load_firmware(struct isar_hw *isar, const u8 *buf, int size)
173 {
174 u32 saved_debug = isar->ch[0].bch.debug;
175 int ret, cnt;
176 u8 nom, noc;
177 u16 left, val, *sp = (u16 *)buf;
178 u8 *mp;
179 u_long flags;
180
181 struct {
182 u16 sadr;
183 u16 len;
184 u16 d_key;
185 } blk_head;
186
187 if (1 != isar->version) {
188 pr_err("%s: ISAR wrong version %d firmware download aborted\n",
189 isar->name, isar->version);
190 return -EINVAL;
191 }
192 if (!(saved_debug & DEBUG_HW_FIRMWARE_FIFO))
193 isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO;
194 pr_debug("%s: load firmware %d words (%d bytes)\n",
195 isar->name, size / 2, size);
196 cnt = 0;
197 size /= 2;
198 /* disable ISAR IRQ */
199 spin_lock_irqsave(isar->hwlock, flags);
200 isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
201 spin_unlock_irqrestore(isar->hwlock, flags);
202 while (cnt < size) {
203 blk_head.sadr = le16_to_cpu(*sp++);
204 blk_head.len = le16_to_cpu(*sp++);
205 blk_head.d_key = le16_to_cpu(*sp++);
206 cnt += 3;
207 pr_debug("ISAR firmware block (%#x,%d,%#x)\n",
208 blk_head.sadr, blk_head.len, blk_head.d_key & 0xff);
209 left = blk_head.len;
210 if (cnt + left > size) {
211 pr_info("%s: firmware error have %d need %d words\n",
212 isar->name, size, cnt + left);
213 ret = -EINVAL;
214 goto reterrflg;
215 }
216 spin_lock_irqsave(isar->hwlock, flags);
217 if (!send_mbox(isar, ISAR_HIS_DKEY, blk_head.d_key & 0xff,
218 0, NULL)) {
219 pr_info("ISAR send_mbox dkey failed\n");
220 ret = -ETIME;
221 goto reterror;
222 }
223 if (!poll_mbox(isar, 1000)) {
224 pr_warn("ISAR poll_mbox dkey failed\n");
225 ret = -ETIME;
226 goto reterror;
227 }
228 spin_unlock_irqrestore(isar->hwlock, flags);
229 if ((isar->iis != ISAR_IIS_DKEY) || isar->cmsb || isar->clsb) {
230 pr_info("ISAR wrong dkey response (%x,%x,%x)\n",
231 isar->iis, isar->cmsb, isar->clsb);
232 ret = 1;
233 goto reterrflg;
234 }
235 while (left > 0) {
236 if (left > 126)
237 noc = 126;
238 else
239 noc = left;
240 nom = (2 * noc) + 3;
241 mp = isar->buf;
242 /* the ISAR is big endian */
243 *mp++ = blk_head.sadr >> 8;
244 *mp++ = blk_head.sadr & 0xFF;
245 left -= noc;
246 cnt += noc;
247 *mp++ = noc;
248 pr_debug("%s: load %3d words at %04x\n", isar->name,
249 noc, blk_head.sadr);
250 blk_head.sadr += noc;
251 while (noc) {
252 val = le16_to_cpu(*sp++);
253 *mp++ = val >> 8;
254 *mp++ = val & 0xFF;
255 noc--;
256 }
257 spin_lock_irqsave(isar->hwlock, flags);
258 if (!send_mbox(isar, ISAR_HIS_FIRM, 0, nom, NULL)) {
259 pr_info("ISAR send_mbox prog failed\n");
260 ret = -ETIME;
261 goto reterror;
262 }
263 if (!poll_mbox(isar, 1000)) {
264 pr_info("ISAR poll_mbox prog failed\n");
265 ret = -ETIME;
266 goto reterror;
267 }
268 spin_unlock_irqrestore(isar->hwlock, flags);
269 if ((isar->iis != ISAR_IIS_FIRM) ||
270 isar->cmsb || isar->clsb) {
271 pr_info("ISAR wrong prog response (%x,%x,%x)\n",
272 isar->iis, isar->cmsb, isar->clsb);
273 ret = -EIO;
274 goto reterrflg;
275 }
276 }
277 pr_debug("%s: ISAR firmware block %d words loaded\n",
278 isar->name, blk_head.len);
279 }
280 isar->ch[0].bch.debug = saved_debug;
281 /* 10ms delay */
282 cnt = 10;
283 while (cnt--)
284 mdelay(1);
285 isar->buf[0] = 0xff;
286 isar->buf[1] = 0xfe;
287 isar->bstat = 0;
288 spin_lock_irqsave(isar->hwlock, flags);
289 if (!send_mbox(isar, ISAR_HIS_STDSP, 0, 2, NULL)) {
290 pr_info("ISAR send_mbox start dsp failed\n");
291 ret = -ETIME;
292 goto reterror;
293 }
294 if (!poll_mbox(isar, 1000)) {
295 pr_info("ISAR poll_mbox start dsp failed\n");
296 ret = -ETIME;
297 goto reterror;
298 }
299 if ((isar->iis != ISAR_IIS_STDSP) || isar->cmsb || isar->clsb) {
300 pr_info("ISAR wrong start dsp response (%x,%x,%x)\n",
301 isar->iis, isar->cmsb, isar->clsb);
302 ret = -EIO;
303 goto reterror;
304 } else
305 pr_debug("%s: ISAR start dsp success\n", isar->name);
306
307 /* NORMAL mode entered */
308 /* Enable IRQs of ISAR */
309 isar->write_reg(isar->hw, ISAR_IRQBIT, ISAR_IRQSTA);
310 spin_unlock_irqrestore(isar->hwlock, flags);
311 cnt = 1000; /* max 1s */
312 while ((!isar->bstat) && cnt) {
313 mdelay(1);
314 cnt--;
315 }
316 if (!cnt) {
317 pr_info("ISAR no general status event received\n");
318 ret = -ETIME;
319 goto reterrflg;
320 } else
321 pr_debug("%s: ISAR general status event %x\n",
322 isar->name, isar->bstat);
323 /* 10ms delay */
324 cnt = 10;
325 while (cnt--)
326 mdelay(1);
327 isar->iis = 0;
328 spin_lock_irqsave(isar->hwlock, flags);
329 if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {
330 pr_info("ISAR send_mbox self tst failed\n");
331 ret = -ETIME;
332 goto reterror;
333 }
334 spin_unlock_irqrestore(isar->hwlock, flags);
335 cnt = 10000; /* max 100 ms */
336 while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
337 udelay(10);
338 cnt--;
339 }
340 mdelay(1);
341 if (!cnt) {
342 pr_info("ISAR no self tst response\n");
343 ret = -ETIME;
344 goto reterrflg;
345 }
346 if ((isar->cmsb == ISAR_CTRL_STST) && (isar->clsb == 1)
347 && (isar->buf[0] == 0))
348 pr_debug("%s: ISAR selftest OK\n", isar->name);
349 else {
350 pr_info("ISAR selftest not OK %x/%x/%x\n",
351 isar->cmsb, isar->clsb, isar->buf[0]);
352 ret = -EIO;
353 goto reterrflg;
354 }
355 spin_lock_irqsave(isar->hwlock, flags);
356 isar->iis = 0;
357 if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {
358 pr_info("ISAR RQST SVN failed\n");
359 ret = -ETIME;
360 goto reterror;
361 }
362 spin_unlock_irqrestore(isar->hwlock, flags);
363 cnt = 30000; /* max 300 ms */
364 while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
365 udelay(10);
366 cnt--;
367 }
368 mdelay(1);
369 if (!cnt) {
370 pr_info("ISAR no SVN response\n");
371 ret = -ETIME;
372 goto reterrflg;
373 } else {
374 if ((isar->cmsb == ISAR_CTRL_SWVER) && (isar->clsb == 1)) {
375 pr_notice("%s: ISAR software version %#x\n",
376 isar->name, isar->buf[0]);
377 } else {
378 pr_info("%s: ISAR wrong swver response (%x,%x)"
379 " cnt(%d)\n", isar->name, isar->cmsb,
380 isar->clsb, cnt);
381 ret = -EIO;
382 goto reterrflg;
383 }
384 }
385 spin_lock_irqsave(isar->hwlock, flags);
386 isar_setup(isar);
387 spin_unlock_irqrestore(isar->hwlock, flags);
388 ret = 0;
389 reterrflg:
390 spin_lock_irqsave(isar->hwlock, flags);
391 reterror:
392 isar->ch[0].bch.debug = saved_debug;
393 if (ret)
394 /* disable ISAR IRQ */
395 isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
396 spin_unlock_irqrestore(isar->hwlock, flags);
397 return ret;
398 }
399
400 static inline void
401 deliver_status(struct isar_ch *ch, int status)
402 {
403 pr_debug("%s: HL->LL FAXIND %x\n", ch->is->name, status);
404 _queue_data(&ch->bch.ch, PH_CONTROL_IND, status, 0, NULL, GFP_ATOMIC);
405 }
406
407 static inline void
408 isar_rcv_frame(struct isar_ch *ch)
409 {
410 u8 *ptr;
411 int maxlen;
412
413 if (!ch->is->clsb) {
414 pr_debug("%s; ISAR zero len frame\n", ch->is->name);
415 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
416 return;
417 }
418 if (test_bit(FLG_RX_OFF, &ch->bch.Flags)) {
419 ch->bch.dropcnt += ch->is->clsb;
420 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
421 return;
422 }
423 switch (ch->bch.state) {
424 case ISDN_P_NONE:
425 pr_debug("%s: ISAR protocol 0 spurious IIS_RDATA %x/%x/%x\n",
426 ch->is->name, ch->is->iis, ch->is->cmsb, ch->is->clsb);
427 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
428 break;
429 case ISDN_P_B_RAW:
430 case ISDN_P_B_L2DTMF:
431 case ISDN_P_B_MODEM_ASYNC:
432 maxlen = bchannel_get_rxbuf(&ch->bch, ch->is->clsb);
433 if (maxlen < 0) {
434 pr_warn("%s.B%d: No bufferspace for %d bytes\n",
435 ch->is->name, ch->bch.nr, ch->is->clsb);
436 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
437 break;
438 }
439 rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb));
440 recv_Bchannel(&ch->bch, 0, false);
441 break;
442 case ISDN_P_B_HDLC:
443 maxlen = bchannel_get_rxbuf(&ch->bch, ch->is->clsb);
444 if (maxlen < 0) {
445 pr_warn("%s.B%d: No bufferspace for %d bytes\n",
446 ch->is->name, ch->bch.nr, ch->is->clsb);
447 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
448 break;
449 }
450 if (ch->is->cmsb & HDLC_ERROR) {
451 pr_debug("%s: ISAR frame error %x len %d\n",
452 ch->is->name, ch->is->cmsb, ch->is->clsb);
453 #ifdef ERROR_STATISTIC
454 if (ch->is->cmsb & HDLC_ERR_RER)
455 ch->bch.err_inv++;
456 if (ch->is->cmsb & HDLC_ERR_CER)
457 ch->bch.err_crc++;
458 #endif
459 skb_trim(ch->bch.rx_skb, 0);
460 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
461 break;
462 }
463 if (ch->is->cmsb & HDLC_FSD)
464 skb_trim(ch->bch.rx_skb, 0);
465 ptr = skb_put(ch->bch.rx_skb, ch->is->clsb);
466 rcv_mbox(ch->is, ptr);
467 if (ch->is->cmsb & HDLC_FED) {
468 if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */
469 pr_debug("%s: ISAR frame to short %d\n",
470 ch->is->name, ch->bch.rx_skb->len);
471 skb_trim(ch->bch.rx_skb, 0);
472 break;
473 }
474 skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2);
475 recv_Bchannel(&ch->bch, 0, false);
476 }
477 break;
478 case ISDN_P_B_T30_FAX:
479 if (ch->state != STFAX_ACTIV) {
480 pr_debug("%s: isar_rcv_frame: not ACTIV\n",
481 ch->is->name);
482 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
483 if (ch->bch.rx_skb)
484 skb_trim(ch->bch.rx_skb, 0);
485 break;
486 }
487 if (!ch->bch.rx_skb) {
488 ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen,
489 GFP_ATOMIC);
490 if (unlikely(!ch->bch.rx_skb)) {
491 pr_info("%s: B receive out of memory\n",
492 __func__);
493 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
494 break;
495 }
496 }
497 if (ch->cmd == PCTRL_CMD_FRM) {
498 rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb));
499 pr_debug("%s: isar_rcv_frame: %d\n",
500 ch->is->name, ch->bch.rx_skb->len);
501 if (ch->is->cmsb & SART_NMD) { /* ABORT */
502 pr_debug("%s: isar_rcv_frame: no more data\n",
503 ch->is->name);
504 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
505 send_mbox(ch->is, SET_DPS(ch->dpath) |
506 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
507 0, NULL);
508 ch->state = STFAX_ESCAPE;
509 /* set_skb_flag(skb, DF_NOMOREDATA); */
510 }
511 recv_Bchannel(&ch->bch, 0, false);
512 if (ch->is->cmsb & SART_NMD)
513 deliver_status(ch, HW_MOD_NOCARR);
514 break;
515 }
516 if (ch->cmd != PCTRL_CMD_FRH) {
517 pr_debug("%s: isar_rcv_frame: unknown fax mode %x\n",
518 ch->is->name, ch->cmd);
519 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
520 if (ch->bch.rx_skb)
521 skb_trim(ch->bch.rx_skb, 0);
522 break;
523 }
524 /* PCTRL_CMD_FRH */
525 if ((ch->bch.rx_skb->len + ch->is->clsb) >
526 (ch->bch.maxlen + 2)) {
527 pr_info("%s: %s incoming packet too large\n",
528 ch->is->name, __func__);
529 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
530 skb_trim(ch->bch.rx_skb, 0);
531 break;
532 } else if (ch->is->cmsb & HDLC_ERROR) {
533 pr_info("%s: ISAR frame error %x len %d\n",
534 ch->is->name, ch->is->cmsb, ch->is->clsb);
535 skb_trim(ch->bch.rx_skb, 0);
536 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
537 break;
538 }
539 if (ch->is->cmsb & HDLC_FSD)
540 skb_trim(ch->bch.rx_skb, 0);
541 ptr = skb_put(ch->bch.rx_skb, ch->is->clsb);
542 rcv_mbox(ch->is, ptr);
543 if (ch->is->cmsb & HDLC_FED) {
544 if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */
545 pr_info("%s: ISAR frame to short %d\n",
546 ch->is->name, ch->bch.rx_skb->len);
547 skb_trim(ch->bch.rx_skb, 0);
548 break;
549 }
550 skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2);
551 recv_Bchannel(&ch->bch, 0, false);
552 }
553 if (ch->is->cmsb & SART_NMD) { /* ABORT */
554 pr_debug("%s: isar_rcv_frame: no more data\n",
555 ch->is->name);
556 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
557 if (ch->bch.rx_skb)
558 skb_trim(ch->bch.rx_skb, 0);
559 send_mbox(ch->is, SET_DPS(ch->dpath) |
560 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
561 ch->state = STFAX_ESCAPE;
562 deliver_status(ch, HW_MOD_NOCARR);
563 }
564 break;
565 default:
566 pr_info("isar_rcv_frame protocol (%x)error\n", ch->bch.state);
567 ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
568 break;
569 }
570 }
571
572 static void
573 isar_fill_fifo(struct isar_ch *ch)
574 {
575 int count;
576 u8 msb;
577 u8 *ptr;
578
579 pr_debug("%s: ch%d tx_skb %d tx_idx %d\n", ch->is->name, ch->bch.nr,
580 ch->bch.tx_skb ? ch->bch.tx_skb->len : -1, ch->bch.tx_idx);
581 if (!(ch->is->bstat &
582 (ch->dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))
583 return;
584 if (!ch->bch.tx_skb) {
585 if (!test_bit(FLG_TX_EMPTY, &ch->bch.Flags) ||
586 (ch->bch.state != ISDN_P_B_RAW))
587 return;
588 count = ch->mml;
589 /* use the card buffer */
590 memset(ch->is->buf, ch->bch.fill[0], count);
591 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
592 0, count, ch->is->buf);
593 return;
594 }
595 count = ch->bch.tx_skb->len - ch->bch.tx_idx;
596 if (count <= 0)
597 return;
598 if (count > ch->mml) {
599 msb = 0;
600 count = ch->mml;
601 } else {
602 msb = HDLC_FED;
603 }
604 ptr = ch->bch.tx_skb->data + ch->bch.tx_idx;
605 if (!ch->bch.tx_idx) {
606 pr_debug("%s: frame start\n", ch->is->name);
607 if ((ch->bch.state == ISDN_P_B_T30_FAX) &&
608 (ch->cmd == PCTRL_CMD_FTH)) {
609 if (count > 1) {
610 if ((ptr[0] == 0xff) && (ptr[1] == 0x13)) {
611 /* last frame */
612 test_and_set_bit(FLG_LASTDATA,
613 &ch->bch.Flags);
614 pr_debug("%s: set LASTDATA\n",
615 ch->is->name);
616 if (msb == HDLC_FED)
617 test_and_set_bit(FLG_DLEETX,
618 &ch->bch.Flags);
619 }
620 }
621 }
622 msb |= HDLC_FST;
623 }
624 ch->bch.tx_idx += count;
625 switch (ch->bch.state) {
626 case ISDN_P_NONE:
627 pr_info("%s: wrong protocol 0\n", __func__);
628 break;
629 case ISDN_P_B_RAW:
630 case ISDN_P_B_L2DTMF:
631 case ISDN_P_B_MODEM_ASYNC:
632 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
633 0, count, ptr);
634 break;
635 case ISDN_P_B_HDLC:
636 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
637 msb, count, ptr);
638 break;
639 case ISDN_P_B_T30_FAX:
640 if (ch->state != STFAX_ACTIV)
641 pr_debug("%s: not ACTIV\n", ch->is->name);
642 else if (ch->cmd == PCTRL_CMD_FTH)
643 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
644 msb, count, ptr);
645 else if (ch->cmd == PCTRL_CMD_FTM)
646 send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
647 0, count, ptr);
648 else
649 pr_debug("%s: not FTH/FTM\n", ch->is->name);
650 break;
651 default:
652 pr_info("%s: protocol(%x) error\n",
653 __func__, ch->bch.state);
654 break;
655 }
656 }
657
658 static inline struct isar_ch *
659 sel_bch_isar(struct isar_hw *isar, u8 dpath)
660 {
661 struct isar_ch *base = &isar->ch[0];
662
663 if ((!dpath) || (dpath > 2))
664 return NULL;
665 if (base->dpath == dpath)
666 return base;
667 base++;
668 if (base->dpath == dpath)
669 return base;
670 return NULL;
671 }
672
673 static void
674 send_next(struct isar_ch *ch)
675 {
676 pr_debug("%s: %s ch%d tx_skb %d tx_idx %d\n", ch->is->name, __func__,
677 ch->bch.nr, ch->bch.tx_skb ? ch->bch.tx_skb->len : -1,
678 ch->bch.tx_idx);
679 if (ch->bch.state == ISDN_P_B_T30_FAX) {
680 if (ch->cmd == PCTRL_CMD_FTH) {
681 if (test_bit(FLG_LASTDATA, &ch->bch.Flags)) {
682 pr_debug("set NMD_DATA\n");
683 test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags);
684 }
685 } else if (ch->cmd == PCTRL_CMD_FTM) {
686 if (test_bit(FLG_DLEETX, &ch->bch.Flags)) {
687 test_and_set_bit(FLG_LASTDATA, &ch->bch.Flags);
688 test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags);
689 }
690 }
691 }
692 dev_kfree_skb(ch->bch.tx_skb);
693 if (get_next_bframe(&ch->bch)) {
694 isar_fill_fifo(ch);
695 test_and_clear_bit(FLG_TX_EMPTY, &ch->bch.Flags);
696 } else if (test_bit(FLG_TX_EMPTY, &ch->bch.Flags)) {
697 isar_fill_fifo(ch);
698 } else {
699 if (test_and_clear_bit(FLG_DLEETX, &ch->bch.Flags)) {
700 if (test_and_clear_bit(FLG_LASTDATA,
701 &ch->bch.Flags)) {
702 if (test_and_clear_bit(FLG_NMD_DATA,
703 &ch->bch.Flags)) {
704 u8 zd = 0;
705 send_mbox(ch->is, SET_DPS(ch->dpath) |
706 ISAR_HIS_SDATA, 0x01, 1, &zd);
707 }
708 test_and_set_bit(FLG_LL_OK, &ch->bch.Flags);
709 } else {
710 deliver_status(ch, HW_MOD_CONNECT);
711 }
712 } else if (test_bit(FLG_FILLEMPTY, &ch->bch.Flags)) {
713 test_and_set_bit(FLG_TX_EMPTY, &ch->bch.Flags);
714 }
715 }
716 }
717
718 static void
719 check_send(struct isar_hw *isar, u8 rdm)
720 {
721 struct isar_ch *ch;
722
723 pr_debug("%s: rdm %x\n", isar->name, rdm);
724 if (rdm & BSTAT_RDM1) {
725 ch = sel_bch_isar(isar, 1);
726 if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) {
727 if (ch->bch.tx_skb && (ch->bch.tx_skb->len >
728 ch->bch.tx_idx))
729 isar_fill_fifo(ch);
730 else
731 send_next(ch);
732 }
733 }
734 if (rdm & BSTAT_RDM2) {
735 ch = sel_bch_isar(isar, 2);
736 if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) {
737 if (ch->bch.tx_skb && (ch->bch.tx_skb->len >
738 ch->bch.tx_idx))
739 isar_fill_fifo(ch);
740 else
741 send_next(ch);
742 }
743 }
744 }
745
746 const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4",
747 "300", "600", "1200", "2400", "4800", "7200",
748 "9600nt", "9600t", "12000", "14400", "WRONG"};
749 const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",
750 "Bell103", "V23", "Bell202", "V17", "V29", "V27ter"};
751
752 static void
753 isar_pump_status_rsp(struct isar_ch *ch) {
754 u8 ril = ch->is->buf[0];
755 u8 rim;
756
757 if (!test_and_clear_bit(ISAR_RATE_REQ, &ch->is->Flags))
758 return;
759 if (ril > 14) {
760 pr_info("%s: wrong pstrsp ril=%d\n", ch->is->name, ril);
761 ril = 15;
762 }
763 switch (ch->is->buf[1]) {
764 case 0:
765 rim = 0;
766 break;
767 case 0x20:
768 rim = 2;
769 break;
770 case 0x40:
771 rim = 3;
772 break;
773 case 0x41:
774 rim = 4;
775 break;
776 case 0x51:
777 rim = 5;
778 break;
779 case 0x61:
780 rim = 6;
781 break;
782 case 0x71:
783 rim = 7;
784 break;
785 case 0x82:
786 rim = 8;
787 break;
788 case 0x92:
789 rim = 9;
790 break;
791 case 0xa2:
792 rim = 10;
793 break;
794 default:
795 rim = 1;
796 break;
797 }
798 sprintf(ch->conmsg, "%s %s", dmril[ril], dmrim[rim]);
799 pr_debug("%s: pump strsp %s\n", ch->is->name, ch->conmsg);
800 }
801
802 static void
803 isar_pump_statev_modem(struct isar_ch *ch, u8 devt) {
804 u8 dps = SET_DPS(ch->dpath);
805
806 switch (devt) {
807 case PSEV_10MS_TIMER:
808 pr_debug("%s: pump stev TIMER\n", ch->is->name);
809 break;
810 case PSEV_CON_ON:
811 pr_debug("%s: pump stev CONNECT\n", ch->is->name);
812 deliver_status(ch, HW_MOD_CONNECT);
813 break;
814 case PSEV_CON_OFF:
815 pr_debug("%s: pump stev NO CONNECT\n", ch->is->name);
816 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
817 deliver_status(ch, HW_MOD_NOCARR);
818 break;
819 case PSEV_V24_OFF:
820 pr_debug("%s: pump stev V24 OFF\n", ch->is->name);
821 break;
822 case PSEV_CTS_ON:
823 pr_debug("%s: pump stev CTS ON\n", ch->is->name);
824 break;
825 case PSEV_CTS_OFF:
826 pr_debug("%s pump stev CTS OFF\n", ch->is->name);
827 break;
828 case PSEV_DCD_ON:
829 pr_debug("%s: pump stev CARRIER ON\n", ch->is->name);
830 test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags);
831 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
832 break;
833 case PSEV_DCD_OFF:
834 pr_debug("%s: pump stev CARRIER OFF\n", ch->is->name);
835 break;
836 case PSEV_DSR_ON:
837 pr_debug("%s: pump stev DSR ON\n", ch->is->name);
838 break;
839 case PSEV_DSR_OFF:
840 pr_debug("%s: pump stev DSR_OFF\n", ch->is->name);
841 break;
842 case PSEV_REM_RET:
843 pr_debug("%s: pump stev REMOTE RETRAIN\n", ch->is->name);
844 break;
845 case PSEV_REM_REN:
846 pr_debug("%s: pump stev REMOTE RENEGOTIATE\n", ch->is->name);
847 break;
848 case PSEV_GSTN_CLR:
849 pr_debug("%s: pump stev GSTN CLEAR\n", ch->is->name);
850 break;
851 default:
852 pr_info("u%s: unknown pump stev %x\n", ch->is->name, devt);
853 break;
854 }
855 }
856
857 static void
858 isar_pump_statev_fax(struct isar_ch *ch, u8 devt) {
859 u8 dps = SET_DPS(ch->dpath);
860 u8 p1;
861
862 switch (devt) {
863 case PSEV_10MS_TIMER:
864 pr_debug("%s: pump stev TIMER\n", ch->is->name);
865 break;
866 case PSEV_RSP_READY:
867 pr_debug("%s: pump stev RSP_READY\n", ch->is->name);
868 ch->state = STFAX_READY;
869 deliver_status(ch, HW_MOD_READY);
870 #ifdef AUTOCON
871 if (test_bit(BC_FLG_ORIG, &ch->bch.Flags))
872 isar_pump_cmd(bch, HW_MOD_FRH, 3);
873 else
874 isar_pump_cmd(bch, HW_MOD_FTH, 3);
875 #endif
876 break;
877 case PSEV_LINE_TX_H:
878 if (ch->state == STFAX_LINE) {
879 pr_debug("%s: pump stev LINE_TX_H\n", ch->is->name);
880 ch->state = STFAX_CONT;
881 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
882 PCTRL_CMD_CONT, 0, NULL);
883 } else {
884 pr_debug("%s: pump stev LINE_TX_H wrong st %x\n",
885 ch->is->name, ch->state);
886 }
887 break;
888 case PSEV_LINE_RX_H:
889 if (ch->state == STFAX_LINE) {
890 pr_debug("%s: pump stev LINE_RX_H\n", ch->is->name);
891 ch->state = STFAX_CONT;
892 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
893 PCTRL_CMD_CONT, 0, NULL);
894 } else {
895 pr_debug("%s: pump stev LINE_RX_H wrong st %x\n",
896 ch->is->name, ch->state);
897 }
898 break;
899 case PSEV_LINE_TX_B:
900 if (ch->state == STFAX_LINE) {
901 pr_debug("%s: pump stev LINE_TX_B\n", ch->is->name);
902 ch->state = STFAX_CONT;
903 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
904 PCTRL_CMD_CONT, 0, NULL);
905 } else {
906 pr_debug("%s: pump stev LINE_TX_B wrong st %x\n",
907 ch->is->name, ch->state);
908 }
909 break;
910 case PSEV_LINE_RX_B:
911 if (ch->state == STFAX_LINE) {
912 pr_debug("%s: pump stev LINE_RX_B\n", ch->is->name);
913 ch->state = STFAX_CONT;
914 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
915 PCTRL_CMD_CONT, 0, NULL);
916 } else {
917 pr_debug("%s: pump stev LINE_RX_B wrong st %x\n",
918 ch->is->name, ch->state);
919 }
920 break;
921 case PSEV_RSP_CONN:
922 if (ch->state == STFAX_CONT) {
923 pr_debug("%s: pump stev RSP_CONN\n", ch->is->name);
924 ch->state = STFAX_ACTIV;
925 test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags);
926 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
927 if (ch->cmd == PCTRL_CMD_FTH) {
928 int delay = (ch->mod == 3) ? 1000 : 200;
929 /* 1s (200 ms) Flags before data */
930 if (test_and_set_bit(FLG_FTI_RUN,
931 &ch->bch.Flags))
932 del_timer(&ch->ftimer);
933 ch->ftimer.expires =
934 jiffies + ((delay * HZ) / 1000);
935 test_and_set_bit(FLG_LL_CONN,
936 &ch->bch.Flags);
937 add_timer(&ch->ftimer);
938 } else {
939 deliver_status(ch, HW_MOD_CONNECT);
940 }
941 } else {
942 pr_debug("%s: pump stev RSP_CONN wrong st %x\n",
943 ch->is->name, ch->state);
944 }
945 break;
946 case PSEV_FLAGS_DET:
947 pr_debug("%s: pump stev FLAGS_DET\n", ch->is->name);
948 break;
949 case PSEV_RSP_DISC:
950 pr_debug("%s: pump stev RSP_DISC state(%d)\n",
951 ch->is->name, ch->state);
952 if (ch->state == STFAX_ESCAPE) {
953 p1 = 5;
954 switch (ch->newcmd) {
955 case 0:
956 ch->state = STFAX_READY;
957 break;
958 case PCTRL_CMD_FTM:
959 p1 = 2;
960 /* fall through */
961 case PCTRL_CMD_FTH:
962 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
963 PCTRL_CMD_SILON, 1, &p1);
964 ch->state = STFAX_SILDET;
965 break;
966 case PCTRL_CMD_FRH:
967 case PCTRL_CMD_FRM:
968 ch->mod = ch->newmod;
969 p1 = ch->newmod;
970 ch->newmod = 0;
971 ch->cmd = ch->newcmd;
972 ch->newcmd = 0;
973 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
974 ch->cmd, 1, &p1);
975 ch->state = STFAX_LINE;
976 ch->try_mod = 3;
977 break;
978 default:
979 pr_debug("%s: RSP_DISC unknown newcmd %x\n",
980 ch->is->name, ch->newcmd);
981 break;
982 }
983 } else if (ch->state == STFAX_ACTIV) {
984 if (test_and_clear_bit(FLG_LL_OK, &ch->bch.Flags))
985 deliver_status(ch, HW_MOD_OK);
986 else if (ch->cmd == PCTRL_CMD_FRM)
987 deliver_status(ch, HW_MOD_NOCARR);
988 else
989 deliver_status(ch, HW_MOD_FCERROR);
990 ch->state = STFAX_READY;
991 } else if (ch->state != STFAX_SILDET) {
992 /* ignore in STFAX_SILDET */
993 ch->state = STFAX_READY;
994 deliver_status(ch, HW_MOD_FCERROR);
995 }
996 break;
997 case PSEV_RSP_SILDET:
998 pr_debug("%s: pump stev RSP_SILDET\n", ch->is->name);
999 if (ch->state == STFAX_SILDET) {
1000 ch->mod = ch->newmod;
1001 p1 = ch->newmod;
1002 ch->newmod = 0;
1003 ch->cmd = ch->newcmd;
1004 ch->newcmd = 0;
1005 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
1006 ch->cmd, 1, &p1);
1007 ch->state = STFAX_LINE;
1008 ch->try_mod = 3;
1009 }
1010 break;
1011 case PSEV_RSP_SILOFF:
1012 pr_debug("%s: pump stev RSP_SILOFF\n", ch->is->name);
1013 break;
1014 case PSEV_RSP_FCERR:
1015 if (ch->state == STFAX_LINE) {
1016 pr_debug("%s: pump stev RSP_FCERR try %d\n",
1017 ch->is->name, ch->try_mod);
1018 if (ch->try_mod--) {
1019 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
1020 ch->cmd, 1, &ch->mod);
1021 break;
1022 }
1023 }
1024 pr_debug("%s: pump stev RSP_FCERR\n", ch->is->name);
1025 ch->state = STFAX_ESCAPE;
1026 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
1027 0, NULL);
1028 deliver_status(ch, HW_MOD_FCERROR);
1029 break;
1030 default:
1031 break;
1032 }
1033 }
1034
1035 void
1036 mISDNisar_irq(struct isar_hw *isar)
1037 {
1038 struct isar_ch *ch;
1039
1040 get_irq_infos(isar);
1041 switch (isar->iis & ISAR_IIS_MSCMSD) {
1042 case ISAR_IIS_RDATA:
1043 ch = sel_bch_isar(isar, isar->iis >> 6);
1044 if (ch)
1045 isar_rcv_frame(ch);
1046 else {
1047 pr_debug("%s: ISAR spurious IIS_RDATA %x/%x/%x\n",
1048 isar->name, isar->iis, isar->cmsb,
1049 isar->clsb);
1050 isar->write_reg(isar->hw, ISAR_IIA, 0);
1051 }
1052 break;
1053 case ISAR_IIS_GSTEV:
1054 isar->write_reg(isar->hw, ISAR_IIA, 0);
1055 isar->bstat |= isar->cmsb;
1056 check_send(isar, isar->cmsb);
1057 break;
1058 case ISAR_IIS_BSTEV:
1059 #ifdef ERROR_STATISTIC
1060 ch = sel_bch_isar(isar, isar->iis >> 6);
1061 if (ch) {
1062 if (isar->cmsb == BSTEV_TBO)
1063 ch->bch.err_tx++;
1064 if (isar->cmsb == BSTEV_RBO)
1065 ch->bch.err_rdo++;
1066 }
1067 #endif
1068 pr_debug("%s: Buffer STEV dpath%d msb(%x)\n",
1069 isar->name, isar->iis >> 6, isar->cmsb);
1070 isar->write_reg(isar->hw, ISAR_IIA, 0);
1071 break;
1072 case ISAR_IIS_PSTEV:
1073 ch = sel_bch_isar(isar, isar->iis >> 6);
1074 if (ch) {
1075 rcv_mbox(isar, NULL);
1076 if (ch->bch.state == ISDN_P_B_MODEM_ASYNC)
1077 isar_pump_statev_modem(ch, isar->cmsb);
1078 else if (ch->bch.state == ISDN_P_B_T30_FAX)
1079 isar_pump_statev_fax(ch, isar->cmsb);
1080 else if (ch->bch.state == ISDN_P_B_RAW) {
1081 int tt;
1082 tt = isar->cmsb | 0x30;
1083 if (tt == 0x3e)
1084 tt = '*';
1085 else if (tt == 0x3f)
1086 tt = '#';
1087 else if (tt > '9')
1088 tt += 7;
1089 tt |= DTMF_TONE_VAL;
1090 _queue_data(&ch->bch.ch, PH_CONTROL_IND,
1091 MISDN_ID_ANY, sizeof(tt), &tt,
1092 GFP_ATOMIC);
1093 } else
1094 pr_debug("%s: ISAR IIS_PSTEV pm %d sta %x\n",
1095 isar->name, ch->bch.state,
1096 isar->cmsb);
1097 } else {
1098 pr_debug("%s: ISAR spurious IIS_PSTEV %x/%x/%x\n",
1099 isar->name, isar->iis, isar->cmsb,
1100 isar->clsb);
1101 isar->write_reg(isar->hw, ISAR_IIA, 0);
1102 }
1103 break;
1104 case ISAR_IIS_PSTRSP:
1105 ch = sel_bch_isar(isar, isar->iis >> 6);
1106 if (ch) {
1107 rcv_mbox(isar, NULL);
1108 isar_pump_status_rsp(ch);
1109 } else {
1110 pr_debug("%s: ISAR spurious IIS_PSTRSP %x/%x/%x\n",
1111 isar->name, isar->iis, isar->cmsb,
1112 isar->clsb);
1113 isar->write_reg(isar->hw, ISAR_IIA, 0);
1114 }
1115 break;
1116 case ISAR_IIS_DIAG:
1117 case ISAR_IIS_BSTRSP:
1118 case ISAR_IIS_IOM2RSP:
1119 rcv_mbox(isar, NULL);
1120 break;
1121 case ISAR_IIS_INVMSG:
1122 rcv_mbox(isar, NULL);
1123 pr_debug("%s: invalid msg his:%x\n", isar->name, isar->cmsb);
1124 break;
1125 default:
1126 rcv_mbox(isar, NULL);
1127 pr_debug("%s: unhandled msg iis(%x) ctrl(%x/%x)\n",
1128 isar->name, isar->iis, isar->cmsb, isar->clsb);
1129 break;
1130 }
1131 }
1132 EXPORT_SYMBOL(mISDNisar_irq);
1133
1134 static void
1135 ftimer_handler(struct timer_list *t)
1136 {
1137 struct isar_ch *ch = from_timer(ch, t, ftimer);
1138
1139 pr_debug("%s: ftimer flags %lx\n", ch->is->name, ch->bch.Flags);
1140 test_and_clear_bit(FLG_FTI_RUN, &ch->bch.Flags);
1141 if (test_and_clear_bit(FLG_LL_CONN, &ch->bch.Flags))
1142 deliver_status(ch, HW_MOD_CONNECT);
1143 }
1144
1145 static void
1146 setup_pump(struct isar_ch *ch) {
1147 u8 dps = SET_DPS(ch->dpath);
1148 u8 ctrl, param[6];
1149
1150 switch (ch->bch.state) {
1151 case ISDN_P_NONE:
1152 case ISDN_P_B_RAW:
1153 case ISDN_P_B_HDLC:
1154 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL);
1155 break;
1156 case ISDN_P_B_L2DTMF:
1157 if (test_bit(FLG_DTMFSEND, &ch->bch.Flags)) {
1158 param[0] = 5; /* TOA 5 db */
1159 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG,
1160 PMOD_DTMF_TRANS, 1, param);
1161 } else {
1162 param[0] = 40; /* REL -46 dbm */
1163 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG,
1164 PMOD_DTMF, 1, param);
1165 }
1166 /* fall through */
1167 case ISDN_P_B_MODEM_ASYNC:
1168 ctrl = PMOD_DATAMODEM;
1169 if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
1170 ctrl |= PCTRL_ORIG;
1171 param[5] = PV32P6_CTN;
1172 } else {
1173 param[5] = PV32P6_ATN;
1174 }
1175 param[0] = 6; /* 6 db */
1176 param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B |
1177 PV32P2_V22C | PV32P2_V21 | PV32P2_BEL;
1178 param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B;
1179 param[3] = PV32P4_UT144;
1180 param[4] = PV32P5_UT144;
1181 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param);
1182 break;
1183 case ISDN_P_B_T30_FAX:
1184 ctrl = PMOD_FAX;
1185 if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
1186 ctrl |= PCTRL_ORIG;
1187 param[1] = PFAXP2_CTN;
1188 } else {
1189 param[1] = PFAXP2_ATN;
1190 }
1191 param[0] = 6; /* 6 db */
1192 send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param);
1193 ch->state = STFAX_NULL;
1194 ch->newcmd = 0;
1195 ch->newmod = 0;
1196 test_and_set_bit(FLG_FTI_RUN, &ch->bch.Flags);
1197 break;
1198 }
1199 udelay(1000);
1200 send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1201 udelay(1000);
1202 }
1203
1204 static void
1205 setup_sart(struct isar_ch *ch) {
1206 u8 dps = SET_DPS(ch->dpath);
1207 u8 ctrl, param[2] = {0, 0};
1208
1209 switch (ch->bch.state) {
1210 case ISDN_P_NONE:
1211 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE,
1212 0, NULL);
1213 break;
1214 case ISDN_P_B_RAW:
1215 case ISDN_P_B_L2DTMF:
1216 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_BINARY,
1217 2, param);
1218 break;
1219 case ISDN_P_B_HDLC:
1220 case ISDN_P_B_T30_FAX:
1221 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_HDLC,
1222 1, param);
1223 break;
1224 case ISDN_P_B_MODEM_ASYNC:
1225 ctrl = SMODE_V14 | SCTRL_HDMC_BOTH;
1226 param[0] = S_P1_CHS_8;
1227 param[1] = S_P2_BFT_DEF;
1228 send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, ctrl, 2, param);
1229 break;
1230 }
1231 udelay(1000);
1232 send_mbox(ch->is, dps | ISAR_HIS_BSTREQ, 0, 0, NULL);
1233 udelay(1000);
1234 }
1235
1236 static void
1237 setup_iom2(struct isar_ch *ch) {
1238 u8 dps = SET_DPS(ch->dpath);
1239 u8 cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD, 0, 0, 0, 0};
1240
1241 if (ch->bch.nr == 2) {
1242 msg[1] = 1;
1243 msg[3] = 1;
1244 }
1245 switch (ch->bch.state) {
1246 case ISDN_P_NONE:
1247 cmsb = 0;
1248 /* dummy slot */
1249 msg[1] = ch->dpath + 2;
1250 msg[3] = ch->dpath + 2;
1251 break;
1252 case ISDN_P_B_RAW:
1253 case ISDN_P_B_HDLC:
1254 break;
1255 case ISDN_P_B_MODEM_ASYNC:
1256 case ISDN_P_B_T30_FAX:
1257 cmsb |= IOM_CTRL_RCV;
1258 /* fall through */
1259 case ISDN_P_B_L2DTMF:
1260 if (test_bit(FLG_DTMFSEND, &ch->bch.Flags))
1261 cmsb |= IOM_CTRL_RCV;
1262 cmsb |= IOM_CTRL_ALAW;
1263 break;
1264 }
1265 send_mbox(ch->is, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg);
1266 udelay(1000);
1267 send_mbox(ch->is, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL);
1268 udelay(1000);
1269 }
1270
1271 static int
1272 modeisar(struct isar_ch *ch, u32 bprotocol)
1273 {
1274 /* Here we are selecting the best datapath for requested protocol */
1275 if (ch->bch.state == ISDN_P_NONE) { /* New Setup */
1276 switch (bprotocol) {
1277 case ISDN_P_NONE: /* init */
1278 if (!ch->dpath)
1279 /* no init for dpath 0 */
1280 return 0;
1281 test_and_clear_bit(FLG_HDLC, &ch->bch.Flags);
1282 test_and_clear_bit(FLG_TRANSPARENT, &ch->bch.Flags);
1283 break;
1284 case ISDN_P_B_RAW:
1285 case ISDN_P_B_HDLC:
1286 /* best is datapath 2 */
1287 if (!test_and_set_bit(ISAR_DP2_USE, &ch->is->Flags))
1288 ch->dpath = 2;
1289 else if (!test_and_set_bit(ISAR_DP1_USE,
1290 &ch->is->Flags))
1291 ch->dpath = 1;
1292 else {
1293 pr_info("modeisar both paths in use\n");
1294 return -EBUSY;
1295 }
1296 if (bprotocol == ISDN_P_B_HDLC)
1297 test_and_set_bit(FLG_HDLC, &ch->bch.Flags);
1298 else
1299 test_and_set_bit(FLG_TRANSPARENT,
1300 &ch->bch.Flags);
1301 break;
1302 case ISDN_P_B_MODEM_ASYNC:
1303 case ISDN_P_B_T30_FAX:
1304 case ISDN_P_B_L2DTMF:
1305 /* only datapath 1 */
1306 if (!test_and_set_bit(ISAR_DP1_USE, &ch->is->Flags))
1307 ch->dpath = 1;
1308 else {
1309 pr_info("%s: ISAR modeisar analog functions"
1310 "only with DP1\n", ch->is->name);
1311 return -EBUSY;
1312 }
1313 break;
1314 default:
1315 pr_info("%s: protocol not known %x\n", ch->is->name,
1316 bprotocol);
1317 return -ENOPROTOOPT;
1318 }
1319 }
1320 pr_debug("%s: ISAR ch%d dp%d protocol %x->%x\n", ch->is->name,
1321 ch->bch.nr, ch->dpath, ch->bch.state, bprotocol);
1322 ch->bch.state = bprotocol;
1323 setup_pump(ch);
1324 setup_iom2(ch);
1325 setup_sart(ch);
1326 if (ch->bch.state == ISDN_P_NONE) {
1327 /* Clear resources */
1328 if (ch->dpath == 1)
1329 test_and_clear_bit(ISAR_DP1_USE, &ch->is->Flags);
1330 else if (ch->dpath == 2)
1331 test_and_clear_bit(ISAR_DP2_USE, &ch->is->Flags);
1332 ch->dpath = 0;
1333 ch->is->ctrl(ch->is->hw, HW_DEACT_IND, ch->bch.nr);
1334 } else
1335 ch->is->ctrl(ch->is->hw, HW_ACTIVATE_IND, ch->bch.nr);
1336 return 0;
1337 }
1338
1339 static void
1340 isar_pump_cmd(struct isar_ch *ch, u32 cmd, u8 para)
1341 {
1342 u8 dps = SET_DPS(ch->dpath);
1343 u8 ctrl = 0, nom = 0, p1 = 0;
1344
1345 pr_debug("%s: isar_pump_cmd %x/%x state(%x)\n",
1346 ch->is->name, cmd, para, ch->bch.state);
1347 switch (cmd) {
1348 case HW_MOD_FTM:
1349 if (ch->state == STFAX_READY) {
1350 p1 = para;
1351 ctrl = PCTRL_CMD_FTM;
1352 nom = 1;
1353 ch->state = STFAX_LINE;
1354 ch->cmd = ctrl;
1355 ch->mod = para;
1356 ch->newmod = 0;
1357 ch->newcmd = 0;
1358 ch->try_mod = 3;
1359 } else if ((ch->state == STFAX_ACTIV) &&
1360 (ch->cmd == PCTRL_CMD_FTM) && (ch->mod == para))
1361 deliver_status(ch, HW_MOD_CONNECT);
1362 else {
1363 ch->newmod = para;
1364 ch->newcmd = PCTRL_CMD_FTM;
1365 nom = 0;
1366 ctrl = PCTRL_CMD_ESC;
1367 ch->state = STFAX_ESCAPE;
1368 }
1369 break;
1370 case HW_MOD_FTH:
1371 if (ch->state == STFAX_READY) {
1372 p1 = para;
1373 ctrl = PCTRL_CMD_FTH;
1374 nom = 1;
1375 ch->state = STFAX_LINE;
1376 ch->cmd = ctrl;
1377 ch->mod = para;
1378 ch->newmod = 0;
1379 ch->newcmd = 0;
1380 ch->try_mod = 3;
1381 } else if ((ch->state == STFAX_ACTIV) &&
1382 (ch->cmd == PCTRL_CMD_FTH) && (ch->mod == para))
1383 deliver_status(ch, HW_MOD_CONNECT);
1384 else {
1385 ch->newmod = para;
1386 ch->newcmd = PCTRL_CMD_FTH;
1387 nom = 0;
1388 ctrl = PCTRL_CMD_ESC;
1389 ch->state = STFAX_ESCAPE;
1390 }
1391 break;
1392 case HW_MOD_FRM:
1393 if (ch->state == STFAX_READY) {
1394 p1 = para;
1395 ctrl = PCTRL_CMD_FRM;
1396 nom = 1;
1397 ch->state = STFAX_LINE;
1398 ch->cmd = ctrl;
1399 ch->mod = para;
1400 ch->newmod = 0;
1401 ch->newcmd = 0;
1402 ch->try_mod = 3;
1403 } else if ((ch->state == STFAX_ACTIV) &&
1404 (ch->cmd == PCTRL_CMD_FRM) && (ch->mod == para))
1405 deliver_status(ch, HW_MOD_CONNECT);
1406 else {
1407 ch->newmod = para;
1408 ch->newcmd = PCTRL_CMD_FRM;
1409 nom = 0;
1410 ctrl = PCTRL_CMD_ESC;
1411 ch->state = STFAX_ESCAPE;
1412 }
1413 break;
1414 case HW_MOD_FRH:
1415 if (ch->state == STFAX_READY) {
1416 p1 = para;
1417 ctrl = PCTRL_CMD_FRH;
1418 nom = 1;
1419 ch->state = STFAX_LINE;
1420 ch->cmd = ctrl;
1421 ch->mod = para;
1422 ch->newmod = 0;
1423 ch->newcmd = 0;
1424 ch->try_mod = 3;
1425 } else if ((ch->state == STFAX_ACTIV) &&
1426 (ch->cmd == PCTRL_CMD_FRH) && (ch->mod == para))
1427 deliver_status(ch, HW_MOD_CONNECT);
1428 else {
1429 ch->newmod = para;
1430 ch->newcmd = PCTRL_CMD_FRH;
1431 nom = 0;
1432 ctrl = PCTRL_CMD_ESC;
1433 ch->state = STFAX_ESCAPE;
1434 }
1435 break;
1436 case PCTRL_CMD_TDTMF:
1437 p1 = para;
1438 nom = 1;
1439 ctrl = PCTRL_CMD_TDTMF;
1440 break;
1441 }
1442 if (ctrl)
1443 send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1);
1444 }
1445
1446 static void
1447 isar_setup(struct isar_hw *isar)
1448 {
1449 u8 msg;
1450 int i;
1451
1452 /* Dpath 1, 2 */
1453 msg = 61;
1454 for (i = 0; i < 2; i++) {
1455 /* Buffer Config */
1456 send_mbox(isar, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |
1457 ISAR_HIS_P12CFG, 4, 1, &msg);
1458 isar->ch[i].mml = msg;
1459 isar->ch[i].bch.state = 0;
1460 isar->ch[i].dpath = i + 1;
1461 modeisar(&isar->ch[i], ISDN_P_NONE);
1462 }
1463 }
1464
1465 static int
1466 isar_l2l1(struct mISDNchannel *ch, struct sk_buff *skb)
1467 {
1468 struct bchannel *bch = container_of(ch, struct bchannel, ch);
1469 struct isar_ch *ich = container_of(bch, struct isar_ch, bch);
1470 int ret = -EINVAL;
1471 struct mISDNhead *hh = mISDN_HEAD_P(skb);
1472 u32 id, *val;
1473 u_long flags;
1474
1475 switch (hh->prim) {
1476 case PH_DATA_REQ:
1477 spin_lock_irqsave(ich->is->hwlock, flags);
1478 ret = bchannel_senddata(bch, skb);
1479 if (ret > 0) { /* direct TX */
1480 ret = 0;
1481 isar_fill_fifo(ich);
1482 }
1483 spin_unlock_irqrestore(ich->is->hwlock, flags);
1484 return ret;
1485 case PH_ACTIVATE_REQ:
1486 spin_lock_irqsave(ich->is->hwlock, flags);
1487 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
1488 ret = modeisar(ich, ch->protocol);
1489 else
1490 ret = 0;
1491 spin_unlock_irqrestore(ich->is->hwlock, flags);
1492 if (!ret)
1493 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
1494 NULL, GFP_KERNEL);
1495 break;
1496 case PH_DEACTIVATE_REQ:
1497 spin_lock_irqsave(ich->is->hwlock, flags);
1498 mISDN_clear_bchannel(bch);
1499 modeisar(ich, ISDN_P_NONE);
1500 spin_unlock_irqrestore(ich->is->hwlock, flags);
1501 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
1502 NULL, GFP_KERNEL);
1503 ret = 0;
1504 break;
1505 case PH_CONTROL_REQ:
1506 val = (u32 *)skb->data;
1507 pr_debug("%s: PH_CONTROL | REQUEST %x/%x\n", ich->is->name,
1508 hh->id, *val);
1509 if ((hh->id == 0) && ((*val & ~DTMF_TONE_MASK) ==
1510 DTMF_TONE_VAL)) {
1511 if (bch->state == ISDN_P_B_L2DTMF) {
1512 char tt = *val & DTMF_TONE_MASK;
1513
1514 if (tt == '*')
1515 tt = 0x1e;
1516 else if (tt == '#')
1517 tt = 0x1f;
1518 else if (tt > '9')
1519 tt -= 7;
1520 tt &= 0x1f;
1521 spin_lock_irqsave(ich->is->hwlock, flags);
1522 isar_pump_cmd(ich, PCTRL_CMD_TDTMF, tt);
1523 spin_unlock_irqrestore(ich->is->hwlock, flags);
1524 } else {
1525 pr_info("%s: DTMF send wrong protocol %x\n",
1526 __func__, bch->state);
1527 return -EINVAL;
1528 }
1529 } else if ((hh->id == HW_MOD_FRM) || (hh->id == HW_MOD_FRH) ||
1530 (hh->id == HW_MOD_FTM) || (hh->id == HW_MOD_FTH)) {
1531 for (id = 0; id < FAXMODCNT; id++)
1532 if (faxmodulation[id] == *val)
1533 break;
1534 if ((FAXMODCNT > id) &&
1535 test_bit(FLG_INITIALIZED, &bch->Flags)) {
1536 pr_debug("%s: isar: new mod\n", ich->is->name);
1537 isar_pump_cmd(ich, hh->id, *val);
1538 ret = 0;
1539 } else {
1540 pr_info("%s: wrong modulation\n",
1541 ich->is->name);
1542 ret = -EINVAL;
1543 }
1544 } else if (hh->id == HW_MOD_LASTDATA)
1545 test_and_set_bit(FLG_DLEETX, &bch->Flags);
1546 else {
1547 pr_info("%s: unknown PH_CONTROL_REQ %x\n",
1548 ich->is->name, hh->id);
1549 ret = -EINVAL;
1550 }
1551 /* fall through */
1552 default:
1553 pr_info("%s: %s unknown prim(%x,%x)\n",
1554 ich->is->name, __func__, hh->prim, hh->id);
1555 ret = -EINVAL;
1556 }
1557 if (!ret)
1558 dev_kfree_skb(skb);
1559 return ret;
1560 }
1561
1562 static int
1563 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
1564 {
1565 return mISDN_ctrl_bchannel(bch, cq);
1566 }
1567
1568 static int
1569 isar_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1570 {
1571 struct bchannel *bch = container_of(ch, struct bchannel, ch);
1572 struct isar_ch *ich = container_of(bch, struct isar_ch, bch);
1573 int ret = -EINVAL;
1574 u_long flags;
1575
1576 pr_debug("%s: %s cmd:%x %p\n", ich->is->name, __func__, cmd, arg);
1577 switch (cmd) {
1578 case CLOSE_CHANNEL:
1579 test_and_clear_bit(FLG_OPEN, &bch->Flags);
1580 cancel_work_sync(&bch->workq);
1581 spin_lock_irqsave(ich->is->hwlock, flags);
1582 mISDN_clear_bchannel(bch);
1583 modeisar(ich, ISDN_P_NONE);
1584 spin_unlock_irqrestore(ich->is->hwlock, flags);
1585 ch->protocol = ISDN_P_NONE;
1586 ch->peer = NULL;
1587 module_put(ich->is->owner);
1588 ret = 0;
1589 break;
1590 case CONTROL_CHANNEL:
1591 ret = channel_bctrl(bch, arg);
1592 break;
1593 default:
1594 pr_info("%s: %s unknown prim(%x)\n",
1595 ich->is->name, __func__, cmd);
1596 }
1597 return ret;
1598 }
1599
1600 static void
1601 free_isar(struct isar_hw *isar)
1602 {
1603 modeisar(&isar->ch[0], ISDN_P_NONE);
1604 modeisar(&isar->ch[1], ISDN_P_NONE);
1605 del_timer(&isar->ch[0].ftimer);
1606 del_timer(&isar->ch[1].ftimer);
1607 test_and_clear_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
1608 test_and_clear_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
1609 }
1610
1611 static int
1612 init_isar(struct isar_hw *isar)
1613 {
1614 int cnt = 3;
1615
1616 while (cnt--) {
1617 isar->version = ISARVersion(isar);
1618 if (isar->ch[0].bch.debug & DEBUG_HW)
1619 pr_notice("%s: Testing version %d (%d time)\n",
1620 isar->name, isar->version, 3 - cnt);
1621 if (isar->version == 1)
1622 break;
1623 isar->ctrl(isar->hw, HW_RESET_REQ, 0);
1624 }
1625 if (isar->version != 1)
1626 return -EINVAL;
1627 timer_setup(&isar->ch[0].ftimer, ftimer_handler, 0);
1628 test_and_set_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
1629 timer_setup(&isar->ch[1].ftimer, ftimer_handler, 0);
1630 test_and_set_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
1631 return 0;
1632 }
1633
1634 static int
1635 isar_open(struct isar_hw *isar, struct channel_req *rq)
1636 {
1637 struct bchannel *bch;
1638
1639 if (rq->adr.channel == 0 || rq->adr.channel > 2)
1640 return -EINVAL;
1641 if (rq->protocol == ISDN_P_NONE)
1642 return -EINVAL;
1643 bch = &isar->ch[rq->adr.channel - 1].bch;
1644 if (test_and_set_bit(FLG_OPEN, &bch->Flags))
1645 return -EBUSY; /* b-channel can be only open once */
1646 bch->ch.protocol = rq->protocol;
1647 rq->ch = &bch->ch;
1648 return 0;
1649 }
1650
1651 u32
1652 mISDNisar_init(struct isar_hw *isar, void *hw)
1653 {
1654 u32 ret, i;
1655
1656 isar->hw = hw;
1657 for (i = 0; i < 2; i++) {
1658 isar->ch[i].bch.nr = i + 1;
1659 mISDN_initbchannel(&isar->ch[i].bch, MAX_DATA_MEM, 32);
1660 isar->ch[i].bch.ch.nr = i + 1;
1661 isar->ch[i].bch.ch.send = &isar_l2l1;
1662 isar->ch[i].bch.ch.ctrl = isar_bctrl;
1663 isar->ch[i].bch.hw = hw;
1664 isar->ch[i].is = isar;
1665 }
1666
1667 isar->init = &init_isar;
1668 isar->release = &free_isar;
1669 isar->firmware = &load_firmware;
1670 isar->open = &isar_open;
1671
1672 ret = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
1673 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)) |
1674 (1 << (ISDN_P_B_L2DTMF & ISDN_P_B_MASK)) |
1675 (1 << (ISDN_P_B_MODEM_ASYNC & ISDN_P_B_MASK)) |
1676 (1 << (ISDN_P_B_T30_FAX & ISDN_P_B_MASK));
1677
1678 return ret;
1679 }
1680 EXPORT_SYMBOL(mISDNisar_init);
1681
1682 static int __init isar_mod_init(void)
1683 {
1684 pr_notice("mISDN: ISAR driver Rev. %s\n", ISAR_REV);
1685 return 0;
1686 }
1687
1688 static void __exit isar_mod_cleanup(void)
1689 {
1690 pr_notice("mISDN: ISAR module unloaded\n");
1691 }
1692 module_init(isar_mod_init);
1693 module_exit(isar_mod_cleanup);
Linux with added FPC-III support