?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / media / i2c / imx258.c
blobf86ae18bc104b313e47324fa79e3166800b7ed58
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Intel Corporation
3
4 #include <linux/acpi.h>
5 #include <linux/delay.h>
6 #include <linux/i2c.h>
7 #include <linux/module.h>
8 #include <linux/pm_runtime.h>
9 #include <media/v4l2-ctrls.h>
10 #include <media/v4l2-device.h>
11 #include <asm/unaligned.h>
12
13 #define IMX258_REG_VALUE_08BIT 1
14 #define IMX258_REG_VALUE_16BIT 2
15
16 #define IMX258_REG_MODE_SELECT 0x0100
17 #define IMX258_MODE_STANDBY 0x00
18 #define IMX258_MODE_STREAMING 0x01
19
20 /* Chip ID */
21 #define IMX258_REG_CHIP_ID 0x0016
22 #define IMX258_CHIP_ID 0x0258
23
24 /* V_TIMING internal */
25 #define IMX258_VTS_30FPS 0x0c98
26 #define IMX258_VTS_30FPS_2K 0x0638
27 #define IMX258_VTS_30FPS_VGA 0x034c
28 #define IMX258_VTS_MAX 0xffff
29
30 /*Frame Length Line*/
31 #define IMX258_FLL_MIN 0x08a6
32 #define IMX258_FLL_MAX 0xffff
33 #define IMX258_FLL_STEP 1
34 #define IMX258_FLL_DEFAULT 0x0c98
35
36 /* HBLANK control - read only */
37 #define IMX258_PPL_DEFAULT 5352
38
39 /* Exposure control */
40 #define IMX258_REG_EXPOSURE 0x0202
41 #define IMX258_EXPOSURE_MIN 4
42 #define IMX258_EXPOSURE_STEP 1
43 #define IMX258_EXPOSURE_DEFAULT 0x640
44 #define IMX258_EXPOSURE_MAX 65535
45
46 /* Analog gain control */
47 #define IMX258_REG_ANALOG_GAIN 0x0204
48 #define IMX258_ANA_GAIN_MIN 0
49 #define IMX258_ANA_GAIN_MAX 0x1fff
50 #define IMX258_ANA_GAIN_STEP 1
51 #define IMX258_ANA_GAIN_DEFAULT 0x0
52
53 /* Digital gain control */
54 #define IMX258_REG_GR_DIGITAL_GAIN 0x020e
55 #define IMX258_REG_R_DIGITAL_GAIN 0x0210
56 #define IMX258_REG_B_DIGITAL_GAIN 0x0212
57 #define IMX258_REG_GB_DIGITAL_GAIN 0x0214
58 #define IMX258_DGTL_GAIN_MIN 0
59 #define IMX258_DGTL_GAIN_MAX 4096 /* Max = 0xFFF */
60 #define IMX258_DGTL_GAIN_DEFAULT 1024
61 #define IMX258_DGTL_GAIN_STEP 1
62
63 /* Test Pattern Control */
64 #define IMX258_REG_TEST_PATTERN 0x0600
65
66 /* Orientation */
67 #define REG_MIRROR_FLIP_CONTROL 0x0101
68 #define REG_CONFIG_MIRROR_FLIP 0x03
69 #define REG_CONFIG_FLIP_TEST_PATTERN 0x02
70
71 struct imx258_reg {
72 u16 address;
73 u8 val;
74 };
75
76 struct imx258_reg_list {
77 u32 num_of_regs;
78 const struct imx258_reg *regs;
79 };
80
81 /* Link frequency config */
82 struct imx258_link_freq_config {
83 u32 pixels_per_line;
84
85 /* PLL registers for this link frequency */
86 struct imx258_reg_list reg_list;
87 };
88
89 /* Mode : resolution and related config&values */
90 struct imx258_mode {
91 /* Frame width */
92 u32 width;
93 /* Frame height */
94 u32 height;
95
96 /* V-timing */
97 u32 vts_def;
98 u32 vts_min;
99
100 /* Index of Link frequency config to be used */
101 u32 link_freq_index;
102 /* Default register values */
103 struct imx258_reg_list reg_list;
104 };
105
106 /* 4208x3118 needs 1267Mbps/lane, 4 lanes */
107 static const struct imx258_reg mipi_data_rate_1267mbps[] = {
108 { 0x0301, 0x05 },
109 { 0x0303, 0x02 },
110 { 0x0305, 0x03 },
111 { 0x0306, 0x00 },
112 { 0x0307, 0xC6 },
113 { 0x0309, 0x0A },
114 { 0x030B, 0x01 },
115 { 0x030D, 0x02 },
116 { 0x030E, 0x00 },
117 { 0x030F, 0xD8 },
118 { 0x0310, 0x00 },
119 { 0x0820, 0x13 },
120 { 0x0821, 0x4C },
121 { 0x0822, 0xCC },
122 { 0x0823, 0xCC },
123 };
124
125 static const struct imx258_reg mipi_data_rate_640mbps[] = {
126 { 0x0301, 0x05 },
127 { 0x0303, 0x02 },
128 { 0x0305, 0x03 },
129 { 0x0306, 0x00 },
130 { 0x0307, 0x64 },
131 { 0x0309, 0x0A },
132 { 0x030B, 0x01 },
133 { 0x030D, 0x02 },
134 { 0x030E, 0x00 },
135 { 0x030F, 0xD8 },
136 { 0x0310, 0x00 },
137 { 0x0820, 0x0A },
138 { 0x0821, 0x00 },
139 { 0x0822, 0x00 },
140 { 0x0823, 0x00 },
141 };
142
143 static const struct imx258_reg mode_4208x3118_regs[] = {
144 { 0x0136, 0x13 },
145 { 0x0137, 0x33 },
146 { 0x3051, 0x00 },
147 { 0x3052, 0x00 },
148 { 0x4E21, 0x14 },
149 { 0x6B11, 0xCF },
150 { 0x7FF0, 0x08 },
151 { 0x7FF1, 0x0F },
152 { 0x7FF2, 0x08 },
153 { 0x7FF3, 0x1B },
154 { 0x7FF4, 0x23 },
155 { 0x7FF5, 0x60 },
156 { 0x7FF6, 0x00 },
157 { 0x7FF7, 0x01 },
158 { 0x7FF8, 0x00 },
159 { 0x7FF9, 0x78 },
160 { 0x7FFA, 0x00 },
161 { 0x7FFB, 0x00 },
162 { 0x7FFC, 0x00 },
163 { 0x7FFD, 0x00 },
164 { 0x7FFE, 0x00 },
165 { 0x7FFF, 0x03 },
166 { 0x7F76, 0x03 },
167 { 0x7F77, 0xFE },
168 { 0x7FA8, 0x03 },
169 { 0x7FA9, 0xFE },
170 { 0x7B24, 0x81 },
171 { 0x7B25, 0x00 },
172 { 0x6564, 0x07 },
173 { 0x6B0D, 0x41 },
174 { 0x653D, 0x04 },
175 { 0x6B05, 0x8C },
176 { 0x6B06, 0xF9 },
177 { 0x6B08, 0x65 },
178 { 0x6B09, 0xFC },
179 { 0x6B0A, 0xCF },
180 { 0x6B0B, 0xD2 },
181 { 0x6700, 0x0E },
182 { 0x6707, 0x0E },
183 { 0x9104, 0x00 },
184 { 0x4648, 0x7F },
185 { 0x7420, 0x00 },
186 { 0x7421, 0x1C },
187 { 0x7422, 0x00 },
188 { 0x7423, 0xD7 },
189 { 0x5F04, 0x00 },
190 { 0x5F05, 0xED },
191 { 0x0112, 0x0A },
192 { 0x0113, 0x0A },
193 { 0x0114, 0x03 },
194 { 0x0342, 0x14 },
195 { 0x0343, 0xE8 },
196 { 0x0340, 0x0C },
197 { 0x0341, 0x50 },
198 { 0x0344, 0x00 },
199 { 0x0345, 0x00 },
200 { 0x0346, 0x00 },
201 { 0x0347, 0x00 },
202 { 0x0348, 0x10 },
203 { 0x0349, 0x6F },
204 { 0x034A, 0x0C },
205 { 0x034B, 0x2E },
206 { 0x0381, 0x01 },
207 { 0x0383, 0x01 },
208 { 0x0385, 0x01 },
209 { 0x0387, 0x01 },
210 { 0x0900, 0x00 },
211 { 0x0901, 0x11 },
212 { 0x0401, 0x00 },
213 { 0x0404, 0x00 },
214 { 0x0405, 0x10 },
215 { 0x0408, 0x00 },
216 { 0x0409, 0x00 },
217 { 0x040A, 0x00 },
218 { 0x040B, 0x00 },
219 { 0x040C, 0x10 },
220 { 0x040D, 0x70 },
221 { 0x040E, 0x0C },
222 { 0x040F, 0x30 },
223 { 0x3038, 0x00 },
224 { 0x303A, 0x00 },
225 { 0x303B, 0x10 },
226 { 0x300D, 0x00 },
227 { 0x034C, 0x10 },
228 { 0x034D, 0x70 },
229 { 0x034E, 0x0C },
230 { 0x034F, 0x30 },
231 { 0x0350, 0x01 },
232 { 0x0202, 0x0C },
233 { 0x0203, 0x46 },
234 { 0x0204, 0x00 },
235 { 0x0205, 0x00 },
236 { 0x020E, 0x01 },
237 { 0x020F, 0x00 },
238 { 0x0210, 0x01 },
239 { 0x0211, 0x00 },
240 { 0x0212, 0x01 },
241 { 0x0213, 0x00 },
242 { 0x0214, 0x01 },
243 { 0x0215, 0x00 },
244 { 0x7BCD, 0x00 },
245 { 0x94DC, 0x20 },
246 { 0x94DD, 0x20 },
247 { 0x94DE, 0x20 },
248 { 0x95DC, 0x20 },
249 { 0x95DD, 0x20 },
250 { 0x95DE, 0x20 },
251 { 0x7FB0, 0x00 },
252 { 0x9010, 0x3E },
253 { 0x9419, 0x50 },
254 { 0x941B, 0x50 },
255 { 0x9519, 0x50 },
256 { 0x951B, 0x50 },
257 { 0x3030, 0x00 },
258 { 0x3032, 0x00 },
259 { 0x0220, 0x00 },
260 };
261
262 static const struct imx258_reg mode_2104_1560_regs[] = {
263 { 0x0136, 0x13 },
264 { 0x0137, 0x33 },
265 { 0x3051, 0x00 },
266 { 0x3052, 0x00 },
267 { 0x4E21, 0x14 },
268 { 0x6B11, 0xCF },
269 { 0x7FF0, 0x08 },
270 { 0x7FF1, 0x0F },
271 { 0x7FF2, 0x08 },
272 { 0x7FF3, 0x1B },
273 { 0x7FF4, 0x23 },
274 { 0x7FF5, 0x60 },
275 { 0x7FF6, 0x00 },
276 { 0x7FF7, 0x01 },
277 { 0x7FF8, 0x00 },
278 { 0x7FF9, 0x78 },
279 { 0x7FFA, 0x00 },
280 { 0x7FFB, 0x00 },
281 { 0x7FFC, 0x00 },
282 { 0x7FFD, 0x00 },
283 { 0x7FFE, 0x00 },
284 { 0x7FFF, 0x03 },
285 { 0x7F76, 0x03 },
286 { 0x7F77, 0xFE },
287 { 0x7FA8, 0x03 },
288 { 0x7FA9, 0xFE },
289 { 0x7B24, 0x81 },
290 { 0x7B25, 0x00 },
291 { 0x6564, 0x07 },
292 { 0x6B0D, 0x41 },
293 { 0x653D, 0x04 },
294 { 0x6B05, 0x8C },
295 { 0x6B06, 0xF9 },
296 { 0x6B08, 0x65 },
297 { 0x6B09, 0xFC },
298 { 0x6B0A, 0xCF },
299 { 0x6B0B, 0xD2 },
300 { 0x6700, 0x0E },
301 { 0x6707, 0x0E },
302 { 0x9104, 0x00 },
303 { 0x4648, 0x7F },
304 { 0x7420, 0x00 },
305 { 0x7421, 0x1C },
306 { 0x7422, 0x00 },
307 { 0x7423, 0xD7 },
308 { 0x5F04, 0x00 },
309 { 0x5F05, 0xED },
310 { 0x0112, 0x0A },
311 { 0x0113, 0x0A },
312 { 0x0114, 0x03 },
313 { 0x0342, 0x14 },
314 { 0x0343, 0xE8 },
315 { 0x0340, 0x06 },
316 { 0x0341, 0x38 },
317 { 0x0344, 0x00 },
318 { 0x0345, 0x00 },
319 { 0x0346, 0x00 },
320 { 0x0347, 0x00 },
321 { 0x0348, 0x10 },
322 { 0x0349, 0x6F },
323 { 0x034A, 0x0C },
324 { 0x034B, 0x2E },
325 { 0x0381, 0x01 },
326 { 0x0383, 0x01 },
327 { 0x0385, 0x01 },
328 { 0x0387, 0x01 },
329 { 0x0900, 0x01 },
330 { 0x0901, 0x12 },
331 { 0x0401, 0x01 },
332 { 0x0404, 0x00 },
333 { 0x0405, 0x20 },
334 { 0x0408, 0x00 },
335 { 0x0409, 0x02 },
336 { 0x040A, 0x00 },
337 { 0x040B, 0x00 },
338 { 0x040C, 0x10 },
339 { 0x040D, 0x6A },
340 { 0x040E, 0x06 },
341 { 0x040F, 0x18 },
342 { 0x3038, 0x00 },
343 { 0x303A, 0x00 },
344 { 0x303B, 0x10 },
345 { 0x300D, 0x00 },
346 { 0x034C, 0x08 },
347 { 0x034D, 0x38 },
348 { 0x034E, 0x06 },
349 { 0x034F, 0x18 },
350 { 0x0350, 0x01 },
351 { 0x0202, 0x06 },
352 { 0x0203, 0x2E },
353 { 0x0204, 0x00 },
354 { 0x0205, 0x00 },
355 { 0x020E, 0x01 },
356 { 0x020F, 0x00 },
357 { 0x0210, 0x01 },
358 { 0x0211, 0x00 },
359 { 0x0212, 0x01 },
360 { 0x0213, 0x00 },
361 { 0x0214, 0x01 },
362 { 0x0215, 0x00 },
363 { 0x7BCD, 0x01 },
364 { 0x94DC, 0x20 },
365 { 0x94DD, 0x20 },
366 { 0x94DE, 0x20 },
367 { 0x95DC, 0x20 },
368 { 0x95DD, 0x20 },
369 { 0x95DE, 0x20 },
370 { 0x7FB0, 0x00 },
371 { 0x9010, 0x3E },
372 { 0x9419, 0x50 },
373 { 0x941B, 0x50 },
374 { 0x9519, 0x50 },
375 { 0x951B, 0x50 },
376 { 0x3030, 0x00 },
377 { 0x3032, 0x00 },
378 { 0x0220, 0x00 },
379 };
380
381 static const struct imx258_reg mode_1048_780_regs[] = {
382 { 0x0136, 0x13 },
383 { 0x0137, 0x33 },
384 { 0x3051, 0x00 },
385 { 0x3052, 0x00 },
386 { 0x4E21, 0x14 },
387 { 0x6B11, 0xCF },
388 { 0x7FF0, 0x08 },
389 { 0x7FF1, 0x0F },
390 { 0x7FF2, 0x08 },
391 { 0x7FF3, 0x1B },
392 { 0x7FF4, 0x23 },
393 { 0x7FF5, 0x60 },
394 { 0x7FF6, 0x00 },
395 { 0x7FF7, 0x01 },
396 { 0x7FF8, 0x00 },
397 { 0x7FF9, 0x78 },
398 { 0x7FFA, 0x00 },
399 { 0x7FFB, 0x00 },
400 { 0x7FFC, 0x00 },
401 { 0x7FFD, 0x00 },
402 { 0x7FFE, 0x00 },
403 { 0x7FFF, 0x03 },
404 { 0x7F76, 0x03 },
405 { 0x7F77, 0xFE },
406 { 0x7FA8, 0x03 },
407 { 0x7FA9, 0xFE },
408 { 0x7B24, 0x81 },
409 { 0x7B25, 0x00 },
410 { 0x6564, 0x07 },
411 { 0x6B0D, 0x41 },
412 { 0x653D, 0x04 },
413 { 0x6B05, 0x8C },
414 { 0x6B06, 0xF9 },
415 { 0x6B08, 0x65 },
416 { 0x6B09, 0xFC },
417 { 0x6B0A, 0xCF },
418 { 0x6B0B, 0xD2 },
419 { 0x6700, 0x0E },
420 { 0x6707, 0x0E },
421 { 0x9104, 0x00 },
422 { 0x4648, 0x7F },
423 { 0x7420, 0x00 },
424 { 0x7421, 0x1C },
425 { 0x7422, 0x00 },
426 { 0x7423, 0xD7 },
427 { 0x5F04, 0x00 },
428 { 0x5F05, 0xED },
429 { 0x0112, 0x0A },
430 { 0x0113, 0x0A },
431 { 0x0114, 0x03 },
432 { 0x0342, 0x14 },
433 { 0x0343, 0xE8 },
434 { 0x0340, 0x03 },
435 { 0x0341, 0x4C },
436 { 0x0344, 0x00 },
437 { 0x0345, 0x00 },
438 { 0x0346, 0x00 },
439 { 0x0347, 0x00 },
440 { 0x0348, 0x10 },
441 { 0x0349, 0x6F },
442 { 0x034A, 0x0C },
443 { 0x034B, 0x2E },
444 { 0x0381, 0x01 },
445 { 0x0383, 0x01 },
446 { 0x0385, 0x01 },
447 { 0x0387, 0x01 },
448 { 0x0900, 0x01 },
449 { 0x0901, 0x14 },
450 { 0x0401, 0x01 },
451 { 0x0404, 0x00 },
452 { 0x0405, 0x40 },
453 { 0x0408, 0x00 },
454 { 0x0409, 0x06 },
455 { 0x040A, 0x00 },
456 { 0x040B, 0x00 },
457 { 0x040C, 0x10 },
458 { 0x040D, 0x64 },
459 { 0x040E, 0x03 },
460 { 0x040F, 0x0C },
461 { 0x3038, 0x00 },
462 { 0x303A, 0x00 },
463 { 0x303B, 0x10 },
464 { 0x300D, 0x00 },
465 { 0x034C, 0x04 },
466 { 0x034D, 0x18 },
467 { 0x034E, 0x03 },
468 { 0x034F, 0x0C },
469 { 0x0350, 0x01 },
470 { 0x0202, 0x03 },
471 { 0x0203, 0x42 },
472 { 0x0204, 0x00 },
473 { 0x0205, 0x00 },
474 { 0x020E, 0x01 },
475 { 0x020F, 0x00 },
476 { 0x0210, 0x01 },
477 { 0x0211, 0x00 },
478 { 0x0212, 0x01 },
479 { 0x0213, 0x00 },
480 { 0x0214, 0x01 },
481 { 0x0215, 0x00 },
482 { 0x7BCD, 0x00 },
483 { 0x94DC, 0x20 },
484 { 0x94DD, 0x20 },
485 { 0x94DE, 0x20 },
486 { 0x95DC, 0x20 },
487 { 0x95DD, 0x20 },
488 { 0x95DE, 0x20 },
489 { 0x7FB0, 0x00 },
490 { 0x9010, 0x3E },
491 { 0x9419, 0x50 },
492 { 0x941B, 0x50 },
493 { 0x9519, 0x50 },
494 { 0x951B, 0x50 },
495 { 0x3030, 0x00 },
496 { 0x3032, 0x00 },
497 { 0x0220, 0x00 },
498 };
499
500 static const char * const imx258_test_pattern_menu[] = {
501 "Disabled",
502 "Solid Colour",
503 "Eight Vertical Colour Bars",
504 "Colour Bars With Fade to Grey",
505 "Pseudorandom Sequence (PN9)",
506 };
507
508 /* Configurations for supported link frequencies */
509 #define IMX258_LINK_FREQ_634MHZ 633600000ULL
510 #define IMX258_LINK_FREQ_320MHZ 320000000ULL
511
512 enum {
513 IMX258_LINK_FREQ_1267MBPS,
514 IMX258_LINK_FREQ_640MBPS,
515 };
516
517 /*
518 * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample
519 * data rate => double data rate; number of lanes => 4; bits per pixel => 10
520 */
521 static u64 link_freq_to_pixel_rate(u64 f)
522 {
523 f *= 2 * 4;
524 do_div(f, 10);
525
526 return f;
527 }
528
529 /* Menu items for LINK_FREQ V4L2 control */
530 static const s64 link_freq_menu_items[] = {
531 IMX258_LINK_FREQ_634MHZ,
532 IMX258_LINK_FREQ_320MHZ,
533 };
534
535 /* Link frequency configs */
536 static const struct imx258_link_freq_config link_freq_configs[] = {
537 [IMX258_LINK_FREQ_1267MBPS] = {
538 .pixels_per_line = IMX258_PPL_DEFAULT,
539 .reg_list = {
540 .num_of_regs = ARRAY_SIZE(mipi_data_rate_1267mbps),
541 .regs = mipi_data_rate_1267mbps,
542 }
543 },
544 [IMX258_LINK_FREQ_640MBPS] = {
545 .pixels_per_line = IMX258_PPL_DEFAULT,
546 .reg_list = {
547 .num_of_regs = ARRAY_SIZE(mipi_data_rate_640mbps),
548 .regs = mipi_data_rate_640mbps,
549 }
550 },
551 };
552
553 /* Mode configs */
554 static const struct imx258_mode supported_modes[] = {
555 {
556 .width = 4208,
557 .height = 3118,
558 .vts_def = IMX258_VTS_30FPS,
559 .vts_min = IMX258_VTS_30FPS,
560 .reg_list = {
561 .num_of_regs = ARRAY_SIZE(mode_4208x3118_regs),
562 .regs = mode_4208x3118_regs,
563 },
564 .link_freq_index = IMX258_LINK_FREQ_1267MBPS,
565 },
566 {
567 .width = 2104,
568 .height = 1560,
569 .vts_def = IMX258_VTS_30FPS_2K,
570 .vts_min = IMX258_VTS_30FPS_2K,
571 .reg_list = {
572 .num_of_regs = ARRAY_SIZE(mode_2104_1560_regs),
573 .regs = mode_2104_1560_regs,
574 },
575 .link_freq_index = IMX258_LINK_FREQ_640MBPS,
576 },
577 {
578 .width = 1048,
579 .height = 780,
580 .vts_def = IMX258_VTS_30FPS_VGA,
581 .vts_min = IMX258_VTS_30FPS_VGA,
582 .reg_list = {
583 .num_of_regs = ARRAY_SIZE(mode_1048_780_regs),
584 .regs = mode_1048_780_regs,
585 },
586 .link_freq_index = IMX258_LINK_FREQ_640MBPS,
587 },
588 };
589
590 struct imx258 {
591 struct v4l2_subdev sd;
592 struct media_pad pad;
593
594 struct v4l2_ctrl_handler ctrl_handler;
595 /* V4L2 Controls */
596 struct v4l2_ctrl *link_freq;
597 struct v4l2_ctrl *pixel_rate;
598 struct v4l2_ctrl *vblank;
599 struct v4l2_ctrl *hblank;
600 struct v4l2_ctrl *exposure;
601
602 /* Current mode */
603 const struct imx258_mode *cur_mode;
604
605 /*
606 * Mutex for serialized access:
607 * Protect sensor module set pad format and start/stop streaming safely.
608 */
609 struct mutex mutex;
610
611 /* Streaming on/off */
612 bool streaming;
613 };
614
615 static inline struct imx258 *to_imx258(struct v4l2_subdev *_sd)
616 {
617 return container_of(_sd, struct imx258, sd);
618 }
619
620 /* Read registers up to 2 at a time */
621 static int imx258_read_reg(struct imx258 *imx258, u16 reg, u32 len, u32 *val)
622 {
623 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
624 struct i2c_msg msgs[2];
625 u8 addr_buf[2] = { reg >> 8, reg & 0xff };
626 u8 data_buf[4] = { 0, };
627 int ret;
628
629 if (len > 4)
630 return -EINVAL;
631
632 /* Write register address */
633 msgs[0].addr = client->addr;
634 msgs[0].flags = 0;
635 msgs[0].len = ARRAY_SIZE(addr_buf);
636 msgs[0].buf = addr_buf;
637
638 /* Read data from register */
639 msgs[1].addr = client->addr;
640 msgs[1].flags = I2C_M_RD;
641 msgs[1].len = len;
642 msgs[1].buf = &data_buf[4 - len];
643
644 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
645 if (ret != ARRAY_SIZE(msgs))
646 return -EIO;
647
648 *val = get_unaligned_be32(data_buf);
649
650 return 0;
651 }
652
653 /* Write registers up to 2 at a time */
654 static int imx258_write_reg(struct imx258 *imx258, u16 reg, u32 len, u32 val)
655 {
656 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
657 u8 buf[6];
658
659 if (len > 4)
660 return -EINVAL;
661
662 put_unaligned_be16(reg, buf);
663 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
664 if (i2c_master_send(client, buf, len + 2) != len + 2)
665 return -EIO;
666
667 return 0;
668 }
669
670 /* Write a list of registers */
671 static int imx258_write_regs(struct imx258 *imx258,
672 const struct imx258_reg *regs, u32 len)
673 {
674 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
675 unsigned int i;
676 int ret;
677
678 for (i = 0; i < len; i++) {
679 ret = imx258_write_reg(imx258, regs[i].address, 1,
680 regs[i].val);
681 if (ret) {
682 dev_err_ratelimited(
683 &client->dev,
684 "Failed to write reg 0x%4.4x. error = %d\n",
685 regs[i].address, ret);
686
687 return ret;
688 }
689 }
690
691 return 0;
692 }
693
694 /* Open sub-device */
695 static int imx258_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
696 {
697 struct v4l2_mbus_framefmt *try_fmt =
698 v4l2_subdev_get_try_format(sd, fh->pad, 0);
699
700 /* Initialize try_fmt */
701 try_fmt->width = supported_modes[0].width;
702 try_fmt->height = supported_modes[0].height;
703 try_fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
704 try_fmt->field = V4L2_FIELD_NONE;
705
706 return 0;
707 }
708
709 static int imx258_update_digital_gain(struct imx258 *imx258, u32 len, u32 val)
710 {
711 int ret;
712
713 ret = imx258_write_reg(imx258, IMX258_REG_GR_DIGITAL_GAIN,
714 IMX258_REG_VALUE_16BIT,
715 val);
716 if (ret)
717 return ret;
718 ret = imx258_write_reg(imx258, IMX258_REG_GB_DIGITAL_GAIN,
719 IMX258_REG_VALUE_16BIT,
720 val);
721 if (ret)
722 return ret;
723 ret = imx258_write_reg(imx258, IMX258_REG_R_DIGITAL_GAIN,
724 IMX258_REG_VALUE_16BIT,
725 val);
726 if (ret)
727 return ret;
728 ret = imx258_write_reg(imx258, IMX258_REG_B_DIGITAL_GAIN,
729 IMX258_REG_VALUE_16BIT,
730 val);
731 if (ret)
732 return ret;
733 return 0;
734 }
735
736 static int imx258_set_ctrl(struct v4l2_ctrl *ctrl)
737 {
738 struct imx258 *imx258 =
739 container_of(ctrl->handler, struct imx258, ctrl_handler);
740 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
741 int ret = 0;
742
743 /*
744 * Applying V4L2 control value only happens
745 * when power is up for streaming
746 */
747 if (pm_runtime_get_if_in_use(&client->dev) == 0)
748 return 0;
749
750 switch (ctrl->id) {
751 case V4L2_CID_ANALOGUE_GAIN:
752 ret = imx258_write_reg(imx258, IMX258_REG_ANALOG_GAIN,
753 IMX258_REG_VALUE_16BIT,
754 ctrl->val);
755 break;
756 case V4L2_CID_EXPOSURE:
757 ret = imx258_write_reg(imx258, IMX258_REG_EXPOSURE,
758 IMX258_REG_VALUE_16BIT,
759 ctrl->val);
760 break;
761 case V4L2_CID_DIGITAL_GAIN:
762 ret = imx258_update_digital_gain(imx258, IMX258_REG_VALUE_16BIT,
763 ctrl->val);
764 break;
765 case V4L2_CID_TEST_PATTERN:
766 ret = imx258_write_reg(imx258, IMX258_REG_TEST_PATTERN,
767 IMX258_REG_VALUE_16BIT,
768 ctrl->val);
769 ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL,
770 IMX258_REG_VALUE_08BIT,
771 !ctrl->val ? REG_CONFIG_MIRROR_FLIP :
772 REG_CONFIG_FLIP_TEST_PATTERN);
773 break;
774 default:
775 dev_info(&client->dev,
776 "ctrl(id:0x%x,val:0x%x) is not handled\n",
777 ctrl->id, ctrl->val);
778 ret = -EINVAL;
779 break;
780 }
781
782 pm_runtime_put(&client->dev);
783
784 return ret;
785 }
786
787 static const struct v4l2_ctrl_ops imx258_ctrl_ops = {
788 .s_ctrl = imx258_set_ctrl,
789 };
790
791 static int imx258_enum_mbus_code(struct v4l2_subdev *sd,
792 struct v4l2_subdev_pad_config *cfg,
793 struct v4l2_subdev_mbus_code_enum *code)
794 {
795 /* Only one bayer order(GRBG) is supported */
796 if (code->index > 0)
797 return -EINVAL;
798
799 code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
800
801 return 0;
802 }
803
804 static int imx258_enum_frame_size(struct v4l2_subdev *sd,
805 struct v4l2_subdev_pad_config *cfg,
806 struct v4l2_subdev_frame_size_enum *fse)
807 {
808 if (fse->index >= ARRAY_SIZE(supported_modes))
809 return -EINVAL;
810
811 if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
812 return -EINVAL;
813
814 fse->min_width = supported_modes[fse->index].width;
815 fse->max_width = fse->min_width;
816 fse->min_height = supported_modes[fse->index].height;
817 fse->max_height = fse->min_height;
818
819 return 0;
820 }
821
822 static void imx258_update_pad_format(const struct imx258_mode *mode,
823 struct v4l2_subdev_format *fmt)
824 {
825 fmt->format.width = mode->width;
826 fmt->format.height = mode->height;
827 fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
828 fmt->format.field = V4L2_FIELD_NONE;
829 }
830
831 static int __imx258_get_pad_format(struct imx258 *imx258,
832 struct v4l2_subdev_pad_config *cfg,
833 struct v4l2_subdev_format *fmt)
834 {
835 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
836 fmt->format = *v4l2_subdev_get_try_format(&imx258->sd, cfg,
837 fmt->pad);
838 else
839 imx258_update_pad_format(imx258->cur_mode, fmt);
840
841 return 0;
842 }
843
844 static int imx258_get_pad_format(struct v4l2_subdev *sd,
845 struct v4l2_subdev_pad_config *cfg,
846 struct v4l2_subdev_format *fmt)
847 {
848 struct imx258 *imx258 = to_imx258(sd);
849 int ret;
850
851 mutex_lock(&imx258->mutex);
852 ret = __imx258_get_pad_format(imx258, cfg, fmt);
853 mutex_unlock(&imx258->mutex);
854
855 return ret;
856 }
857
858 static int imx258_set_pad_format(struct v4l2_subdev *sd,
859 struct v4l2_subdev_pad_config *cfg,
860 struct v4l2_subdev_format *fmt)
861 {
862 struct imx258 *imx258 = to_imx258(sd);
863 const struct imx258_mode *mode;
864 struct v4l2_mbus_framefmt *framefmt;
865 s32 vblank_def;
866 s32 vblank_min;
867 s64 h_blank;
868 s64 pixel_rate;
869 s64 link_freq;
870
871 mutex_lock(&imx258->mutex);
872
873 /* Only one raw bayer(GBRG) order is supported */
874 fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
875
876 mode = v4l2_find_nearest_size(supported_modes,
877 ARRAY_SIZE(supported_modes), width, height,
878 fmt->format.width, fmt->format.height);
879 imx258_update_pad_format(mode, fmt);
880 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
881 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
882 *framefmt = fmt->format;
883 } else {
884 imx258->cur_mode = mode;
885 __v4l2_ctrl_s_ctrl(imx258->link_freq, mode->link_freq_index);
886
887 link_freq = link_freq_menu_items[mode->link_freq_index];
888 pixel_rate = link_freq_to_pixel_rate(link_freq);
889 __v4l2_ctrl_s_ctrl_int64(imx258->pixel_rate, pixel_rate);
890 /* Update limits and set FPS to default */
891 vblank_def = imx258->cur_mode->vts_def -
892 imx258->cur_mode->height;
893 vblank_min = imx258->cur_mode->vts_min -
894 imx258->cur_mode->height;
895 __v4l2_ctrl_modify_range(
896 imx258->vblank, vblank_min,
897 IMX258_VTS_MAX - imx258->cur_mode->height, 1,
898 vblank_def);
899 __v4l2_ctrl_s_ctrl(imx258->vblank, vblank_def);
900 h_blank =
901 link_freq_configs[mode->link_freq_index].pixels_per_line
902 - imx258->cur_mode->width;
903 __v4l2_ctrl_modify_range(imx258->hblank, h_blank,
904 h_blank, 1, h_blank);
905 }
906
907 mutex_unlock(&imx258->mutex);
908
909 return 0;
910 }
911
912 /* Start streaming */
913 static int imx258_start_streaming(struct imx258 *imx258)
914 {
915 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
916 const struct imx258_reg_list *reg_list;
917 int ret, link_freq_index;
918
919 /* Setup PLL */
920 link_freq_index = imx258->cur_mode->link_freq_index;
921 reg_list = &link_freq_configs[link_freq_index].reg_list;
922 ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs);
923 if (ret) {
924 dev_err(&client->dev, "%s failed to set plls\n", __func__);
925 return ret;
926 }
927
928 /* Apply default values of current mode */
929 reg_list = &imx258->cur_mode->reg_list;
930 ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs);
931 if (ret) {
932 dev_err(&client->dev, "%s failed to set mode\n", __func__);
933 return ret;
934 }
935
936 /* Set Orientation be 180 degree */
937 ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL,
938 IMX258_REG_VALUE_08BIT, REG_CONFIG_MIRROR_FLIP);
939 if (ret) {
940 dev_err(&client->dev, "%s failed to set orientation\n",
941 __func__);
942 return ret;
943 }
944
945 /* Apply customized values from user */
946 ret = __v4l2_ctrl_handler_setup(imx258->sd.ctrl_handler);
947 if (ret)
948 return ret;
949
950 /* set stream on register */
951 return imx258_write_reg(imx258, IMX258_REG_MODE_SELECT,
952 IMX258_REG_VALUE_08BIT,
953 IMX258_MODE_STREAMING);
954 }
955
956 /* Stop streaming */
957 static int imx258_stop_streaming(struct imx258 *imx258)
958 {
959 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
960 int ret;
961
962 /* set stream off register */
963 ret = imx258_write_reg(imx258, IMX258_REG_MODE_SELECT,
964 IMX258_REG_VALUE_08BIT, IMX258_MODE_STANDBY);
965 if (ret)
966 dev_err(&client->dev, "%s failed to set stream\n", __func__);
967
968 /*
969 * Return success even if it was an error, as there is nothing the
970 * caller can do about it.
971 */
972 return 0;
973 }
974
975 static int imx258_set_stream(struct v4l2_subdev *sd, int enable)
976 {
977 struct imx258 *imx258 = to_imx258(sd);
978 struct i2c_client *client = v4l2_get_subdevdata(sd);
979 int ret = 0;
980
981 mutex_lock(&imx258->mutex);
982 if (imx258->streaming == enable) {
983 mutex_unlock(&imx258->mutex);
984 return 0;
985 }
986
987 if (enable) {
988 ret = pm_runtime_get_sync(&client->dev);
989 if (ret < 0) {
990 pm_runtime_put_noidle(&client->dev);
991 goto err_unlock;
992 }
993
994 /*
995 * Apply default & customized values
996 * and then start streaming.
997 */
998 ret = imx258_start_streaming(imx258);
999 if (ret)
1000 goto err_rpm_put;
1001 } else {
1002 imx258_stop_streaming(imx258);
1003 pm_runtime_put(&client->dev);
1004 }
1005
1006 imx258->streaming = enable;
1007 mutex_unlock(&imx258->mutex);
1008
1009 return ret;
1010
1011 err_rpm_put:
1012 pm_runtime_put(&client->dev);
1013 err_unlock:
1014 mutex_unlock(&imx258->mutex);
1015
1016 return ret;
1017 }
1018
1019 static int __maybe_unused imx258_suspend(struct device *dev)
1020 {
1021 struct i2c_client *client = to_i2c_client(dev);
1022 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1023 struct imx258 *imx258 = to_imx258(sd);
1024
1025 if (imx258->streaming)
1026 imx258_stop_streaming(imx258);
1027
1028 return 0;
1029 }
1030
1031 static int __maybe_unused imx258_resume(struct device *dev)
1032 {
1033 struct i2c_client *client = to_i2c_client(dev);
1034 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1035 struct imx258 *imx258 = to_imx258(sd);
1036 int ret;
1037
1038 if (imx258->streaming) {
1039 ret = imx258_start_streaming(imx258);
1040 if (ret)
1041 goto error;
1042 }
1043
1044 return 0;
1045
1046 error:
1047 imx258_stop_streaming(imx258);
1048 imx258->streaming = 0;
1049 return ret;
1050 }
1051
1052 /* Verify chip ID */
1053 static int imx258_identify_module(struct imx258 *imx258)
1054 {
1055 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1056 int ret;
1057 u32 val;
1058
1059 ret = imx258_read_reg(imx258, IMX258_REG_CHIP_ID,
1060 IMX258_REG_VALUE_16BIT, &val);
1061 if (ret) {
1062 dev_err(&client->dev, "failed to read chip id %x\n",
1063 IMX258_CHIP_ID);
1064 return ret;
1065 }
1066
1067 if (val != IMX258_CHIP_ID) {
1068 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1069 IMX258_CHIP_ID, val);
1070 return -EIO;
1071 }
1072
1073 return 0;
1074 }
1075
1076 static const struct v4l2_subdev_video_ops imx258_video_ops = {
1077 .s_stream = imx258_set_stream,
1078 };
1079
1080 static const struct v4l2_subdev_pad_ops imx258_pad_ops = {
1081 .enum_mbus_code = imx258_enum_mbus_code,
1082 .get_fmt = imx258_get_pad_format,
1083 .set_fmt = imx258_set_pad_format,
1084 .enum_frame_size = imx258_enum_frame_size,
1085 };
1086
1087 static const struct v4l2_subdev_ops imx258_subdev_ops = {
1088 .video = &imx258_video_ops,
1089 .pad = &imx258_pad_ops,
1090 };
1091
1092 static const struct v4l2_subdev_internal_ops imx258_internal_ops = {
1093 .open = imx258_open,
1094 };
1095
1096 /* Initialize control handlers */
1097 static int imx258_init_controls(struct imx258 *imx258)
1098 {
1099 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1100 struct v4l2_ctrl_handler *ctrl_hdlr;
1101 s64 vblank_def;
1102 s64 vblank_min;
1103 s64 pixel_rate_min;
1104 s64 pixel_rate_max;
1105 int ret;
1106
1107 ctrl_hdlr = &imx258->ctrl_handler;
1108 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
1109 if (ret)
1110 return ret;
1111
1112 mutex_init(&imx258->mutex);
1113 ctrl_hdlr->lock = &imx258->mutex;
1114 imx258->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
1115 &imx258_ctrl_ops,
1116 V4L2_CID_LINK_FREQ,
1117 ARRAY_SIZE(link_freq_menu_items) - 1,
1118 0,
1119 link_freq_menu_items);
1120
1121 if (imx258->link_freq)
1122 imx258->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1123
1124 pixel_rate_max = link_freq_to_pixel_rate(link_freq_menu_items[0]);
1125 pixel_rate_min = link_freq_to_pixel_rate(link_freq_menu_items[1]);
1126 /* By default, PIXEL_RATE is read only */
1127 imx258->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
1128 V4L2_CID_PIXEL_RATE,
1129 pixel_rate_min, pixel_rate_max,
1130 1, pixel_rate_max);
1131
1132
1133 vblank_def = imx258->cur_mode->vts_def - imx258->cur_mode->height;
1134 vblank_min = imx258->cur_mode->vts_min - imx258->cur_mode->height;
1135 imx258->vblank = v4l2_ctrl_new_std(
1136 ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_VBLANK,
1137 vblank_min,
1138 IMX258_VTS_MAX - imx258->cur_mode->height, 1,
1139 vblank_def);
1140
1141 if (imx258->vblank)
1142 imx258->vblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1143
1144 imx258->hblank = v4l2_ctrl_new_std(
1145 ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_HBLANK,
1146 IMX258_PPL_DEFAULT - imx258->cur_mode->width,
1147 IMX258_PPL_DEFAULT - imx258->cur_mode->width,
1148 1,
1149 IMX258_PPL_DEFAULT - imx258->cur_mode->width);
1150
1151 if (imx258->hblank)
1152 imx258->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1153
1154 imx258->exposure = v4l2_ctrl_new_std(
1155 ctrl_hdlr, &imx258_ctrl_ops,
1156 V4L2_CID_EXPOSURE, IMX258_EXPOSURE_MIN,
1157 IMX258_EXPOSURE_MAX, IMX258_EXPOSURE_STEP,
1158 IMX258_EXPOSURE_DEFAULT);
1159
1160 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1161 IMX258_ANA_GAIN_MIN, IMX258_ANA_GAIN_MAX,
1162 IMX258_ANA_GAIN_STEP, IMX258_ANA_GAIN_DEFAULT);
1163
1164 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1165 IMX258_DGTL_GAIN_MIN, IMX258_DGTL_GAIN_MAX,
1166 IMX258_DGTL_GAIN_STEP,
1167 IMX258_DGTL_GAIN_DEFAULT);
1168
1169 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx258_ctrl_ops,
1170 V4L2_CID_TEST_PATTERN,
1171 ARRAY_SIZE(imx258_test_pattern_menu) - 1,
1172 0, 0, imx258_test_pattern_menu);
1173
1174 if (ctrl_hdlr->error) {
1175 ret = ctrl_hdlr->error;
1176 dev_err(&client->dev, "%s control init failed (%d)\n",
1177 __func__, ret);
1178 goto error;
1179 }
1180
1181 imx258->sd.ctrl_handler = ctrl_hdlr;
1182
1183 return 0;
1184
1185 error:
1186 v4l2_ctrl_handler_free(ctrl_hdlr);
1187 mutex_destroy(&imx258->mutex);
1188
1189 return ret;
1190 }
1191
1192 static void imx258_free_controls(struct imx258 *imx258)
1193 {
1194 v4l2_ctrl_handler_free(imx258->sd.ctrl_handler);
1195 mutex_destroy(&imx258->mutex);
1196 }
1197
1198 static int imx258_probe(struct i2c_client *client)
1199 {
1200 struct imx258 *imx258;
1201 int ret;
1202 u32 val = 0;
1203
1204 device_property_read_u32(&client->dev, "clock-frequency", &val);
1205 if (val != 19200000)
1206 return -EINVAL;
1207
1208 /*
1209 * Check that the device is mounted upside down. The driver only
1210 * supports a single pixel order right now.
1211 */
1212 ret = device_property_read_u32(&client->dev, "rotation", &val);
1213 if (ret || val != 180)
1214 return -EINVAL;
1215
1216 imx258 = devm_kzalloc(&client->dev, sizeof(*imx258), GFP_KERNEL);
1217 if (!imx258)
1218 return -ENOMEM;
1219
1220 /* Initialize subdev */
1221 v4l2_i2c_subdev_init(&imx258->sd, client, &imx258_subdev_ops);
1222
1223 /* Check module identity */
1224 ret = imx258_identify_module(imx258);
1225 if (ret)
1226 return ret;
1227
1228 /* Set default mode to max resolution */
1229 imx258->cur_mode = &supported_modes[0];
1230
1231 ret = imx258_init_controls(imx258);
1232 if (ret)
1233 return ret;
1234
1235 /* Initialize subdev */
1236 imx258->sd.internal_ops = &imx258_internal_ops;
1237 imx258->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1238 imx258->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1239
1240 /* Initialize source pad */
1241 imx258->pad.flags = MEDIA_PAD_FL_SOURCE;
1242
1243 ret = media_entity_pads_init(&imx258->sd.entity, 1, &imx258->pad);
1244 if (ret)
1245 goto error_handler_free;
1246
1247 ret = v4l2_async_register_subdev_sensor_common(&imx258->sd);
1248 if (ret < 0)
1249 goto error_media_entity;
1250
1251 pm_runtime_set_active(&client->dev);
1252 pm_runtime_enable(&client->dev);
1253 pm_runtime_idle(&client->dev);
1254
1255 return 0;
1256
1257 error_media_entity:
1258 media_entity_cleanup(&imx258->sd.entity);
1259
1260 error_handler_free:
1261 imx258_free_controls(imx258);
1262
1263 return ret;
1264 }
1265
1266 static int imx258_remove(struct i2c_client *client)
1267 {
1268 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1269 struct imx258 *imx258 = to_imx258(sd);
1270
1271 v4l2_async_unregister_subdev(sd);
1272 media_entity_cleanup(&sd->entity);
1273 imx258_free_controls(imx258);
1274
1275 pm_runtime_disable(&client->dev);
1276 pm_runtime_set_suspended(&client->dev);
1277
1278 return 0;
1279 }
1280
1281 static const struct dev_pm_ops imx258_pm_ops = {
1282 SET_SYSTEM_SLEEP_PM_OPS(imx258_suspend, imx258_resume)
1283 };
1284
1285 #ifdef CONFIG_ACPI
1286 static const struct acpi_device_id imx258_acpi_ids[] = {
1287 { "SONY258A" },
1288 { /* sentinel */ }
1289 };
1290
1291 MODULE_DEVICE_TABLE(acpi, imx258_acpi_ids);
1292 #endif
1293
1294 static struct i2c_driver imx258_i2c_driver = {
1295 .driver = {
1296 .name = "imx258",
1297 .pm = &imx258_pm_ops,
1298 .acpi_match_table = ACPI_PTR(imx258_acpi_ids),
1299 },
1300 .probe_new = imx258_probe,
1301 .remove = imx258_remove,
1302 };
1303
1304 module_i2c_driver(imx258_i2c_driver);
1305
1306 MODULE_AUTHOR("Yeh, Andy <andy.yeh@intel.com>");
1307 MODULE_AUTHOR("Chiang, Alan <alanx.chiang@intel.com>");
1308 MODULE_AUTHOR("Chen, Jason <jasonx.z.chen@intel.com>");
1309 MODULE_DESCRIPTION("Sony IMX258 sensor driver");
1310 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support