treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / media / pci / dm1105 / dm1105.c
blob9dce31d2b525b70cf68635ac94d004a2ee98bb59
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
5 * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
6 */
8 #include <linux/i2c.h>
9 #include <linux/i2c-algo-bit.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/pci.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/slab.h>
17 #include <media/rc-core.h>
19 #include <media/demux.h>
20 #include <media/dmxdev.h>
21 #include <media/dvb_demux.h>
22 #include <media/dvb_frontend.h>
23 #include <media/dvb_net.h>
24 #include <media/dvbdev.h>
25 #include "dvb-pll.h"
27 #include "stv0299.h"
28 #include "stv0288.h"
29 #include "stb6000.h"
30 #include "si21xx.h"
31 #include "cx24116.h"
32 #include "z0194a.h"
33 #include "ts2020.h"
34 #include "ds3000.h"
36 #define MODULE_NAME "dm1105"
38 #define UNSET (-1U)
40 #define DM1105_BOARD_NOAUTO UNSET
41 #define DM1105_BOARD_UNKNOWN 0
42 #define DM1105_BOARD_DVBWORLD_2002 1
43 #define DM1105_BOARD_DVBWORLD_2004 2
44 #define DM1105_BOARD_AXESS_DM05 3
45 #define DM1105_BOARD_UNBRANDED_I2C_ON_GPIO 4
47 /* ----------------------------------------------- */
49 * PCI ID's
51 #ifndef PCI_VENDOR_ID_TRIGEM
52 #define PCI_VENDOR_ID_TRIGEM 0x109f
53 #endif
54 #ifndef PCI_VENDOR_ID_AXESS
55 #define PCI_VENDOR_ID_AXESS 0x195d
56 #endif
57 #ifndef PCI_DEVICE_ID_DM1105
58 #define PCI_DEVICE_ID_DM1105 0x036f
59 #endif
60 #ifndef PCI_DEVICE_ID_DW2002
61 #define PCI_DEVICE_ID_DW2002 0x2002
62 #endif
63 #ifndef PCI_DEVICE_ID_DW2004
64 #define PCI_DEVICE_ID_DW2004 0x2004
65 #endif
66 #ifndef PCI_DEVICE_ID_DM05
67 #define PCI_DEVICE_ID_DM05 0x1105
68 #endif
69 /* ----------------------------------------------- */
70 /* sdmc dm1105 registers */
72 /* TS Control */
73 #define DM1105_TSCTR 0x00
74 #define DM1105_DTALENTH 0x04
76 /* GPIO Interface */
77 #define DM1105_GPIOVAL 0x08
78 #define DM1105_GPIOCTR 0x0c
80 /* PID serial number */
81 #define DM1105_PIDN 0x10
83 /* Odd-even secret key select */
84 #define DM1105_CWSEL 0x14
86 /* Host Command Interface */
87 #define DM1105_HOST_CTR 0x18
88 #define DM1105_HOST_AD 0x1c
90 /* PCI Interface */
91 #define DM1105_CR 0x30
92 #define DM1105_RST 0x34
93 #define DM1105_STADR 0x38
94 #define DM1105_RLEN 0x3c
95 #define DM1105_WRP 0x40
96 #define DM1105_INTCNT 0x44
97 #define DM1105_INTMAK 0x48
98 #define DM1105_INTSTS 0x4c
100 /* CW Value */
101 #define DM1105_ODD 0x50
102 #define DM1105_EVEN 0x58
104 /* PID Value */
105 #define DM1105_PID 0x60
107 /* IR Control */
108 #define DM1105_IRCTR 0x64
109 #define DM1105_IRMODE 0x68
110 #define DM1105_SYSTEMCODE 0x6c
111 #define DM1105_IRCODE 0x70
113 /* Unknown Values */
114 #define DM1105_ENCRYPT 0x74
115 #define DM1105_VER 0x7c
117 /* I2C Interface */
118 #define DM1105_I2CCTR 0x80
119 #define DM1105_I2CSTS 0x81
120 #define DM1105_I2CDAT 0x82
121 #define DM1105_I2C_RA 0x83
122 /* ----------------------------------------------- */
123 /* Interrupt Mask Bits */
125 #define INTMAK_TSIRQM 0x01
126 #define INTMAK_HIRQM 0x04
127 #define INTMAK_IRM 0x08
128 #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
129 INTMAK_HIRQM | \
130 INTMAK_IRM)
131 #define INTMAK_NONEMASK 0x00
133 /* Interrupt Status Bits */
134 #define INTSTS_TSIRQ 0x01
135 #define INTSTS_HIRQ 0x04
136 #define INTSTS_IR 0x08
138 /* IR Control Bits */
139 #define DM1105_IR_EN 0x01
140 #define DM1105_SYS_CHK 0x02
141 #define DM1105_REP_FLG 0x08
143 /* EEPROM addr */
144 #define IIC_24C01_addr 0xa0
145 /* Max board count */
146 #define DM1105_MAX 0x04
148 #define DRIVER_NAME "dm1105"
149 #define DM1105_I2C_GPIO_NAME "dm1105-gpio"
151 #define DM1105_DMA_PACKETS 47
152 #define DM1105_DMA_PACKET_LENGTH (128*4)
153 #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
155 /* */
156 #define GPIO08 (1 << 8)
157 #define GPIO13 (1 << 13)
158 #define GPIO14 (1 << 14)
159 #define GPIO15 (1 << 15)
160 #define GPIO16 (1 << 16)
161 #define GPIO17 (1 << 17)
162 #define GPIO_ALL 0x03ffff
164 /* GPIO's for LNB power control */
165 #define DM1105_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13))
166 #define DM1105_LNB_OFF GPIO17
167 #define DM1105_LNB_13V (GPIO16 | GPIO08)
168 #define DM1105_LNB_18V GPIO08
170 /* GPIO's for LNB power control for Axess DM05 */
171 #define DM05_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13))
172 #define DM05_LNB_OFF GPIO17/* actually 13v */
173 #define DM05_LNB_13V GPIO17
174 #define DM05_LNB_18V (GPIO17 | GPIO16)
176 /* GPIO's for LNB power control for unbranded with I2C on GPIO */
177 #define UNBR_LNB_MASK (GPIO17 | GPIO16)
178 #define UNBR_LNB_OFF 0
179 #define UNBR_LNB_13V GPIO17
180 #define UNBR_LNB_18V (GPIO17 | GPIO16)
182 static unsigned int card[] = {[0 ... 3] = UNSET };
183 module_param_array(card, int, NULL, 0444);
184 MODULE_PARM_DESC(card, "card type");
186 static int ir_debug;
187 module_param(ir_debug, int, 0644);
188 MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
190 static unsigned int dm1105_devcount;
192 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
194 struct dm1105_board {
195 char *name;
196 struct {
197 u32 mask, off, v13, v18;
198 } lnb;
199 u32 gpio_scl, gpio_sda;
202 struct dm1105_subid {
203 u16 subvendor;
204 u16 subdevice;
205 u32 card;
208 static const struct dm1105_board dm1105_boards[] = {
209 [DM1105_BOARD_UNKNOWN] = {
210 .name = "UNKNOWN/GENERIC",
211 .lnb = {
212 .mask = DM1105_LNB_MASK,
213 .off = DM1105_LNB_OFF,
214 .v13 = DM1105_LNB_13V,
215 .v18 = DM1105_LNB_18V,
218 [DM1105_BOARD_DVBWORLD_2002] = {
219 .name = "DVBWorld PCI 2002",
220 .lnb = {
221 .mask = DM1105_LNB_MASK,
222 .off = DM1105_LNB_OFF,
223 .v13 = DM1105_LNB_13V,
224 .v18 = DM1105_LNB_18V,
227 [DM1105_BOARD_DVBWORLD_2004] = {
228 .name = "DVBWorld PCI 2004",
229 .lnb = {
230 .mask = DM1105_LNB_MASK,
231 .off = DM1105_LNB_OFF,
232 .v13 = DM1105_LNB_13V,
233 .v18 = DM1105_LNB_18V,
236 [DM1105_BOARD_AXESS_DM05] = {
237 .name = "Axess/EasyTv DM05",
238 .lnb = {
239 .mask = DM05_LNB_MASK,
240 .off = DM05_LNB_OFF,
241 .v13 = DM05_LNB_13V,
242 .v18 = DM05_LNB_18V,
245 [DM1105_BOARD_UNBRANDED_I2C_ON_GPIO] = {
246 .name = "Unbranded DM1105 with i2c on GPIOs",
247 .lnb = {
248 .mask = UNBR_LNB_MASK,
249 .off = UNBR_LNB_OFF,
250 .v13 = UNBR_LNB_13V,
251 .v18 = UNBR_LNB_18V,
253 .gpio_scl = GPIO14,
254 .gpio_sda = GPIO13,
258 static const struct dm1105_subid dm1105_subids[] = {
260 .subvendor = 0x0000,
261 .subdevice = 0x2002,
262 .card = DM1105_BOARD_DVBWORLD_2002,
263 }, {
264 .subvendor = 0x0001,
265 .subdevice = 0x2002,
266 .card = DM1105_BOARD_DVBWORLD_2002,
267 }, {
268 .subvendor = 0x0000,
269 .subdevice = 0x2004,
270 .card = DM1105_BOARD_DVBWORLD_2004,
271 }, {
272 .subvendor = 0x0001,
273 .subdevice = 0x2004,
274 .card = DM1105_BOARD_DVBWORLD_2004,
275 }, {
276 .subvendor = 0x195d,
277 .subdevice = 0x1105,
278 .card = DM1105_BOARD_AXESS_DM05,
282 static void dm1105_card_list(struct pci_dev *pci)
284 int i;
286 if (0 == pci->subsystem_vendor &&
287 0 == pci->subsystem_device) {
288 printk(KERN_ERR
289 "dm1105: Your board has no valid PCI Subsystem ID\n"
290 "dm1105: and thus can't be autodetected\n"
291 "dm1105: Please pass card=<n> insmod option to\n"
292 "dm1105: workaround that. Redirect complaints to\n"
293 "dm1105: the vendor of the TV card. Best regards,\n"
294 "dm1105: -- tux\n");
295 } else {
296 printk(KERN_ERR
297 "dm1105: Your board isn't known (yet) to the driver.\n"
298 "dm1105: You can try to pick one of the existing\n"
299 "dm1105: card configs via card=<n> insmod option.\n"
300 "dm1105: Updating to the latest version might help\n"
301 "dm1105: as well.\n");
303 printk(KERN_ERR "Here is a list of valid choices for the card=<n> insmod option:\n");
304 for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
305 printk(KERN_ERR "dm1105: card=%d -> %s\n",
306 i, dm1105_boards[i].name);
309 /* infrared remote control */
310 struct infrared {
311 struct rc_dev *dev;
312 char input_phys[32];
313 struct work_struct work;
314 u32 ir_command;
317 struct dm1105_dev {
318 /* pci */
319 struct pci_dev *pdev;
320 u8 __iomem *io_mem;
322 /* ir */
323 struct infrared ir;
325 /* dvb */
326 struct dmx_frontend hw_frontend;
327 struct dmx_frontend mem_frontend;
328 struct dmxdev dmxdev;
329 struct dvb_adapter dvb_adapter;
330 struct dvb_demux demux;
331 struct dvb_frontend *fe;
332 struct dvb_net dvbnet;
333 unsigned int full_ts_users;
334 unsigned int boardnr;
335 int nr;
337 /* i2c */
338 struct i2c_adapter i2c_adap;
339 struct i2c_adapter i2c_bb_adap;
340 struct i2c_algo_bit_data i2c_bit;
342 /* irq */
343 struct work_struct work;
344 struct workqueue_struct *wq;
345 char wqn[16];
347 /* dma */
348 dma_addr_t dma_addr;
349 unsigned char *ts_buf;
350 u32 wrp;
351 u32 nextwrp;
352 u32 buffer_size;
353 unsigned int PacketErrorCount;
354 unsigned int dmarst;
355 spinlock_t lock;
358 #define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
360 #define dm_readb(reg) inb(dm_io_mem(reg))
361 #define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
363 #define dm_readw(reg) inw(dm_io_mem(reg))
364 #define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
366 #define dm_readl(reg) inl(dm_io_mem(reg))
367 #define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
369 #define dm_andorl(reg, mask, value) \
370 outl((inl(dm_io_mem(reg)) & ~(mask)) |\
371 ((value) & (mask)), (dm_io_mem(reg)))
373 #define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
374 #define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
376 /* The chip has 18 GPIOs. In HOST mode GPIO's used as 15 bit address lines,
377 so we can use only 3 GPIO's from GPIO15 to GPIO17.
378 Here I don't check whether HOST is enebled as it is not implemented yet.
380 static void dm1105_gpio_set(struct dm1105_dev *dev, u32 mask)
382 if (mask & 0xfffc0000)
383 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
385 if (mask & 0x0003ffff)
386 dm_setl(DM1105_GPIOVAL, mask & 0x0003ffff);
390 static void dm1105_gpio_clear(struct dm1105_dev *dev, u32 mask)
392 if (mask & 0xfffc0000)
393 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
395 if (mask & 0x0003ffff)
396 dm_clearl(DM1105_GPIOVAL, mask & 0x0003ffff);
400 static void dm1105_gpio_andor(struct dm1105_dev *dev, u32 mask, u32 val)
402 if (mask & 0xfffc0000)
403 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
405 if (mask & 0x0003ffff)
406 dm_andorl(DM1105_GPIOVAL, mask & 0x0003ffff, val);
410 static u32 dm1105_gpio_get(struct dm1105_dev *dev, u32 mask)
412 if (mask & 0xfffc0000)
413 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
415 if (mask & 0x0003ffff)
416 return dm_readl(DM1105_GPIOVAL) & mask & 0x0003ffff;
418 return 0;
421 static void dm1105_gpio_enable(struct dm1105_dev *dev, u32 mask, int asoutput)
423 if (mask & 0xfffc0000)
424 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
426 if ((mask & 0x0003ffff) && asoutput)
427 dm_clearl(DM1105_GPIOCTR, mask & 0x0003ffff);
428 else if ((mask & 0x0003ffff) && !asoutput)
429 dm_setl(DM1105_GPIOCTR, mask & 0x0003ffff);
433 static void dm1105_setline(struct dm1105_dev *dev, u32 line, int state)
435 if (state)
436 dm1105_gpio_enable(dev, line, 0);
437 else {
438 dm1105_gpio_enable(dev, line, 1);
439 dm1105_gpio_clear(dev, line);
443 static void dm1105_setsda(void *data, int state)
445 struct dm1105_dev *dev = data;
447 dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_sda, state);
450 static void dm1105_setscl(void *data, int state)
452 struct dm1105_dev *dev = data;
454 dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_scl, state);
457 static int dm1105_getsda(void *data)
459 struct dm1105_dev *dev = data;
461 return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_sda)
462 ? 1 : 0;
465 static int dm1105_getscl(void *data)
467 struct dm1105_dev *dev = data;
469 return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_scl)
470 ? 1 : 0;
473 static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
474 struct i2c_msg *msgs, int num)
476 struct dm1105_dev *dev ;
478 int addr, rc, i, j, k, len, byte, data;
479 u8 status;
481 dev = i2c_adap->algo_data;
482 for (i = 0; i < num; i++) {
483 dm_writeb(DM1105_I2CCTR, 0x00);
484 if (msgs[i].flags & I2C_M_RD) {
485 /* read bytes */
486 addr = msgs[i].addr << 1;
487 addr |= 1;
488 dm_writeb(DM1105_I2CDAT, addr);
489 for (byte = 0; byte < msgs[i].len; byte++)
490 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
492 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
493 for (j = 0; j < 55; j++) {
494 mdelay(10);
495 status = dm_readb(DM1105_I2CSTS);
496 if ((status & 0xc0) == 0x40)
497 break;
499 if (j >= 55)
500 return -1;
502 for (byte = 0; byte < msgs[i].len; byte++) {
503 rc = dm_readb(DM1105_I2CDAT + byte + 1);
504 if (rc < 0)
505 goto err;
506 msgs[i].buf[byte] = rc;
508 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
509 /* prepared for cx24116 firmware */
510 /* Write in small blocks */
511 len = msgs[i].len - 1;
512 k = 1;
513 do {
514 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
515 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
516 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
517 data = msgs[i].buf[k + byte];
518 dm_writeb(DM1105_I2CDAT + byte + 2, data);
520 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
521 for (j = 0; j < 25; j++) {
522 mdelay(10);
523 status = dm_readb(DM1105_I2CSTS);
524 if ((status & 0xc0) == 0x40)
525 break;
528 if (j >= 25)
529 return -1;
531 k += 48;
532 len -= 48;
533 } while (len > 0);
534 } else {
535 /* write bytes */
536 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
537 for (byte = 0; byte < msgs[i].len; byte++) {
538 data = msgs[i].buf[byte];
539 dm_writeb(DM1105_I2CDAT + byte + 1, data);
541 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
542 for (j = 0; j < 25; j++) {
543 mdelay(10);
544 status = dm_readb(DM1105_I2CSTS);
545 if ((status & 0xc0) == 0x40)
546 break;
549 if (j >= 25)
550 return -1;
553 return num;
554 err:
555 return rc;
558 static u32 functionality(struct i2c_adapter *adap)
560 return I2C_FUNC_I2C;
563 static const struct i2c_algorithm dm1105_algo = {
564 .master_xfer = dm1105_i2c_xfer,
565 .functionality = functionality,
568 static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
570 return container_of(feed->demux, struct dm1105_dev, demux);
573 static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
575 return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
578 static int dm1105_set_voltage(struct dvb_frontend *fe,
579 enum fe_sec_voltage voltage)
581 struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
583 dm1105_gpio_enable(dev, dm1105_boards[dev->boardnr].lnb.mask, 1);
584 if (voltage == SEC_VOLTAGE_18)
585 dm1105_gpio_andor(dev,
586 dm1105_boards[dev->boardnr].lnb.mask,
587 dm1105_boards[dev->boardnr].lnb.v18);
588 else if (voltage == SEC_VOLTAGE_13)
589 dm1105_gpio_andor(dev,
590 dm1105_boards[dev->boardnr].lnb.mask,
591 dm1105_boards[dev->boardnr].lnb.v13);
592 else
593 dm1105_gpio_andor(dev,
594 dm1105_boards[dev->boardnr].lnb.mask,
595 dm1105_boards[dev->boardnr].lnb.off);
597 return 0;
600 static void dm1105_set_dma_addr(struct dm1105_dev *dev)
602 dm_writel(DM1105_STADR, (__force u32)cpu_to_le32(dev->dma_addr));
605 static int dm1105_dma_map(struct dm1105_dev *dev)
607 dev->ts_buf = pci_alloc_consistent(dev->pdev,
608 6 * DM1105_DMA_BYTES,
609 &dev->dma_addr);
611 return !dev->ts_buf;
614 static void dm1105_dma_unmap(struct dm1105_dev *dev)
616 pci_free_consistent(dev->pdev,
617 6 * DM1105_DMA_BYTES,
618 dev->ts_buf,
619 dev->dma_addr);
622 static void dm1105_enable_irqs(struct dm1105_dev *dev)
624 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
625 dm_writeb(DM1105_CR, 1);
628 static void dm1105_disable_irqs(struct dm1105_dev *dev)
630 dm_writeb(DM1105_INTMAK, INTMAK_IRM);
631 dm_writeb(DM1105_CR, 0);
634 static int dm1105_start_feed(struct dvb_demux_feed *f)
636 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
638 if (dev->full_ts_users++ == 0)
639 dm1105_enable_irqs(dev);
641 return 0;
644 static int dm1105_stop_feed(struct dvb_demux_feed *f)
646 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
648 if (--dev->full_ts_users == 0)
649 dm1105_disable_irqs(dev);
651 return 0;
654 /* ir work handler */
655 static void dm1105_emit_key(struct work_struct *work)
657 struct infrared *ir = container_of(work, struct infrared, work);
658 u32 ircom = ir->ir_command;
659 u8 data;
661 if (ir_debug)
662 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
664 data = (ircom >> 8) & 0x7f;
666 /* FIXME: UNKNOWN because we don't generate a full NEC scancode (yet?) */
667 rc_keydown(ir->dev, RC_PROTO_UNKNOWN, data, 0);
670 /* work handler */
671 static void dm1105_dmx_buffer(struct work_struct *work)
673 struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
674 unsigned int nbpackets;
675 u32 oldwrp = dev->wrp;
676 u32 nextwrp = dev->nextwrp;
678 if (!((dev->ts_buf[oldwrp] == 0x47) &&
679 (dev->ts_buf[oldwrp + 188] == 0x47) &&
680 (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
681 dev->PacketErrorCount++;
682 /* bad packet found */
683 if ((dev->PacketErrorCount >= 2) &&
684 (dev->dmarst == 0)) {
685 dm_writeb(DM1105_RST, 1);
686 dev->wrp = 0;
687 dev->PacketErrorCount = 0;
688 dev->dmarst = 0;
689 return;
693 if (nextwrp < oldwrp) {
694 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
695 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
696 } else
697 nbpackets = (nextwrp - oldwrp) / 188;
699 dev->wrp = nextwrp;
700 dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
703 static irqreturn_t dm1105_irq(int irq, void *dev_id)
705 struct dm1105_dev *dev = dev_id;
707 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
708 unsigned int intsts = dm_readb(DM1105_INTSTS);
709 dm_writeb(DM1105_INTSTS, intsts);
711 switch (intsts) {
712 case INTSTS_TSIRQ:
713 case (INTSTS_TSIRQ | INTSTS_IR):
714 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
715 queue_work(dev->wq, &dev->work);
716 break;
717 case INTSTS_IR:
718 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
719 schedule_work(&dev->ir.work);
720 break;
723 return IRQ_HANDLED;
726 static int dm1105_ir_init(struct dm1105_dev *dm1105)
728 struct rc_dev *dev;
729 int err = -ENOMEM;
731 dev = rc_allocate_device(RC_DRIVER_SCANCODE);
732 if (!dev)
733 return -ENOMEM;
735 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
736 "pci-%s/ir0", pci_name(dm1105->pdev));
738 dev->driver_name = MODULE_NAME;
739 dev->map_name = RC_MAP_DM1105_NEC;
740 dev->device_name = "DVB on-card IR receiver";
741 dev->input_phys = dm1105->ir.input_phys;
742 dev->input_id.bustype = BUS_PCI;
743 dev->input_id.version = 1;
744 if (dm1105->pdev->subsystem_vendor) {
745 dev->input_id.vendor = dm1105->pdev->subsystem_vendor;
746 dev->input_id.product = dm1105->pdev->subsystem_device;
747 } else {
748 dev->input_id.vendor = dm1105->pdev->vendor;
749 dev->input_id.product = dm1105->pdev->device;
751 dev->dev.parent = &dm1105->pdev->dev;
753 INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
755 err = rc_register_device(dev);
756 if (err < 0) {
757 rc_free_device(dev);
758 return err;
761 dm1105->ir.dev = dev;
762 return 0;
765 static void dm1105_ir_exit(struct dm1105_dev *dm1105)
767 rc_unregister_device(dm1105->ir.dev);
770 static int dm1105_hw_init(struct dm1105_dev *dev)
772 dm1105_disable_irqs(dev);
774 dm_writeb(DM1105_HOST_CTR, 0);
776 /*DATALEN 188,*/
777 dm_writeb(DM1105_DTALENTH, 188);
778 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
779 dm_writew(DM1105_TSCTR, 0xc10a);
781 /* map DMA and set address */
782 dm1105_dma_map(dev);
783 dm1105_set_dma_addr(dev);
784 /* big buffer */
785 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
786 dm_writeb(DM1105_INTCNT, 47);
788 /* IR NEC mode enable */
789 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
790 dm_writeb(DM1105_IRMODE, 0);
791 dm_writew(DM1105_SYSTEMCODE, 0);
793 return 0;
796 static void dm1105_hw_exit(struct dm1105_dev *dev)
798 dm1105_disable_irqs(dev);
800 /* IR disable */
801 dm_writeb(DM1105_IRCTR, 0);
802 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
804 dm1105_dma_unmap(dev);
807 static const struct stv0299_config sharp_z0194a_config = {
808 .demod_address = 0x68,
809 .inittab = sharp_z0194a_inittab,
810 .mclk = 88000000UL,
811 .invert = 1,
812 .skip_reinit = 0,
813 .lock_output = STV0299_LOCKOUTPUT_1,
814 .volt13_op0_op1 = STV0299_VOLT13_OP1,
815 .min_delay_ms = 100,
816 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
819 static struct stv0288_config earda_config = {
820 .demod_address = 0x68,
821 .min_delay_ms = 100,
824 static struct si21xx_config serit_config = {
825 .demod_address = 0x68,
826 .min_delay_ms = 100,
830 static struct cx24116_config serit_sp2633_config = {
831 .demod_address = 0x55,
834 static struct ds3000_config dvbworld_ds3000_config = {
835 .demod_address = 0x68,
838 static struct ts2020_config dvbworld_ts2020_config = {
839 .tuner_address = 0x60,
840 .clk_out_div = 1,
843 static int frontend_init(struct dm1105_dev *dev)
845 int ret;
847 switch (dev->boardnr) {
848 case DM1105_BOARD_UNBRANDED_I2C_ON_GPIO:
849 dm1105_gpio_enable(dev, GPIO15, 1);
850 dm1105_gpio_clear(dev, GPIO15);
851 msleep(100);
852 dm1105_gpio_set(dev, GPIO15);
853 msleep(200);
854 dev->fe = dvb_attach(
855 stv0299_attach, &sharp_z0194a_config,
856 &dev->i2c_bb_adap);
857 if (dev->fe) {
858 dev->fe->ops.set_voltage = dm1105_set_voltage;
859 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
860 &dev->i2c_bb_adap, DVB_PLL_OPERA1);
861 break;
864 dev->fe = dvb_attach(
865 stv0288_attach, &earda_config,
866 &dev->i2c_bb_adap);
867 if (dev->fe) {
868 dev->fe->ops.set_voltage = dm1105_set_voltage;
869 dvb_attach(stb6000_attach, dev->fe, 0x61,
870 &dev->i2c_bb_adap);
871 break;
874 dev->fe = dvb_attach(
875 si21xx_attach, &serit_config,
876 &dev->i2c_bb_adap);
877 if (dev->fe)
878 dev->fe->ops.set_voltage = dm1105_set_voltage;
879 break;
880 case DM1105_BOARD_DVBWORLD_2004:
881 dev->fe = dvb_attach(
882 cx24116_attach, &serit_sp2633_config,
883 &dev->i2c_adap);
884 if (dev->fe) {
885 dev->fe->ops.set_voltage = dm1105_set_voltage;
886 break;
889 dev->fe = dvb_attach(
890 ds3000_attach, &dvbworld_ds3000_config,
891 &dev->i2c_adap);
892 if (dev->fe) {
893 dvb_attach(ts2020_attach, dev->fe,
894 &dvbworld_ts2020_config, &dev->i2c_adap);
895 dev->fe->ops.set_voltage = dm1105_set_voltage;
898 break;
899 case DM1105_BOARD_DVBWORLD_2002:
900 case DM1105_BOARD_AXESS_DM05:
901 default:
902 dev->fe = dvb_attach(
903 stv0299_attach, &sharp_z0194a_config,
904 &dev->i2c_adap);
905 if (dev->fe) {
906 dev->fe->ops.set_voltage = dm1105_set_voltage;
907 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
908 &dev->i2c_adap, DVB_PLL_OPERA1);
909 break;
912 dev->fe = dvb_attach(
913 stv0288_attach, &earda_config,
914 &dev->i2c_adap);
915 if (dev->fe) {
916 dev->fe->ops.set_voltage = dm1105_set_voltage;
917 dvb_attach(stb6000_attach, dev->fe, 0x61,
918 &dev->i2c_adap);
919 break;
922 dev->fe = dvb_attach(
923 si21xx_attach, &serit_config,
924 &dev->i2c_adap);
925 if (dev->fe)
926 dev->fe->ops.set_voltage = dm1105_set_voltage;
930 if (!dev->fe) {
931 dev_err(&dev->pdev->dev, "could not attach frontend\n");
932 return -ENODEV;
935 ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
936 if (ret < 0) {
937 if (dev->fe->ops.release)
938 dev->fe->ops.release(dev->fe);
939 dev->fe = NULL;
940 return ret;
943 return 0;
946 static void dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
948 static u8 command[1] = { 0x28 };
950 struct i2c_msg msg[] = {
952 .addr = IIC_24C01_addr >> 1,
953 .flags = 0,
954 .buf = command,
955 .len = 1
956 }, {
957 .addr = IIC_24C01_addr >> 1,
958 .flags = I2C_M_RD,
959 .buf = mac,
960 .len = 6
964 dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
965 dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
968 static int dm1105_probe(struct pci_dev *pdev,
969 const struct pci_device_id *ent)
971 struct dm1105_dev *dev;
972 struct dvb_adapter *dvb_adapter;
973 struct dvb_demux *dvbdemux;
974 struct dmx_demux *dmx;
975 int ret = -ENOMEM;
976 int i;
978 if (dm1105_devcount >= ARRAY_SIZE(card))
979 return -ENODEV;
981 dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
982 if (!dev)
983 return -ENOMEM;
985 /* board config */
986 dev->nr = dm1105_devcount;
987 dev->boardnr = UNSET;
988 if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
989 dev->boardnr = card[dev->nr];
990 for (i = 0; UNSET == dev->boardnr &&
991 i < ARRAY_SIZE(dm1105_subids); i++)
992 if (pdev->subsystem_vendor ==
993 dm1105_subids[i].subvendor &&
994 pdev->subsystem_device ==
995 dm1105_subids[i].subdevice)
996 dev->boardnr = dm1105_subids[i].card;
998 if (UNSET == dev->boardnr) {
999 dev->boardnr = DM1105_BOARD_UNKNOWN;
1000 dm1105_card_list(pdev);
1003 dm1105_devcount++;
1004 dev->pdev = pdev;
1005 dev->buffer_size = 5 * DM1105_DMA_BYTES;
1006 dev->PacketErrorCount = 0;
1007 dev->dmarst = 0;
1009 ret = pci_enable_device(pdev);
1010 if (ret < 0)
1011 goto err_kfree;
1013 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1014 if (ret < 0)
1015 goto err_pci_disable_device;
1017 pci_set_master(pdev);
1019 ret = pci_request_regions(pdev, DRIVER_NAME);
1020 if (ret < 0)
1021 goto err_pci_disable_device;
1023 dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
1024 if (!dev->io_mem) {
1025 ret = -EIO;
1026 goto err_pci_release_regions;
1029 spin_lock_init(&dev->lock);
1030 pci_set_drvdata(pdev, dev);
1032 ret = dm1105_hw_init(dev);
1033 if (ret < 0)
1034 goto err_pci_iounmap;
1036 /* i2c */
1037 i2c_set_adapdata(&dev->i2c_adap, dev);
1038 strscpy(dev->i2c_adap.name, DRIVER_NAME, sizeof(dev->i2c_adap.name));
1039 dev->i2c_adap.owner = THIS_MODULE;
1040 dev->i2c_adap.dev.parent = &pdev->dev;
1041 dev->i2c_adap.algo = &dm1105_algo;
1042 dev->i2c_adap.algo_data = dev;
1043 ret = i2c_add_adapter(&dev->i2c_adap);
1045 if (ret < 0)
1046 goto err_dm1105_hw_exit;
1048 i2c_set_adapdata(&dev->i2c_bb_adap, dev);
1049 strscpy(dev->i2c_bb_adap.name, DM1105_I2C_GPIO_NAME,
1050 sizeof(dev->i2c_bb_adap.name));
1051 dev->i2c_bb_adap.owner = THIS_MODULE;
1052 dev->i2c_bb_adap.dev.parent = &pdev->dev;
1053 dev->i2c_bb_adap.algo_data = &dev->i2c_bit;
1054 dev->i2c_bit.data = dev;
1055 dev->i2c_bit.setsda = dm1105_setsda;
1056 dev->i2c_bit.setscl = dm1105_setscl;
1057 dev->i2c_bit.getsda = dm1105_getsda;
1058 dev->i2c_bit.getscl = dm1105_getscl;
1059 dev->i2c_bit.udelay = 10;
1060 dev->i2c_bit.timeout = 10;
1062 /* Raise SCL and SDA */
1063 dm1105_setsda(dev, 1);
1064 dm1105_setscl(dev, 1);
1066 ret = i2c_bit_add_bus(&dev->i2c_bb_adap);
1067 if (ret < 0)
1068 goto err_i2c_del_adapter;
1070 /* dvb */
1071 ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
1072 THIS_MODULE, &pdev->dev, adapter_nr);
1073 if (ret < 0)
1074 goto err_i2c_del_adapters;
1076 dvb_adapter = &dev->dvb_adapter;
1078 dm1105_read_mac(dev, dvb_adapter->proposed_mac);
1080 dvbdemux = &dev->demux;
1081 dvbdemux->filternum = 256;
1082 dvbdemux->feednum = 256;
1083 dvbdemux->start_feed = dm1105_start_feed;
1084 dvbdemux->stop_feed = dm1105_stop_feed;
1085 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
1086 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
1087 ret = dvb_dmx_init(dvbdemux);
1088 if (ret < 0)
1089 goto err_dvb_unregister_adapter;
1091 dmx = &dvbdemux->dmx;
1092 dev->dmxdev.filternum = 256;
1093 dev->dmxdev.demux = dmx;
1094 dev->dmxdev.capabilities = 0;
1096 ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
1097 if (ret < 0)
1098 goto err_dvb_dmx_release;
1100 dev->hw_frontend.source = DMX_FRONTEND_0;
1102 ret = dmx->add_frontend(dmx, &dev->hw_frontend);
1103 if (ret < 0)
1104 goto err_dvb_dmxdev_release;
1106 dev->mem_frontend.source = DMX_MEMORY_FE;
1108 ret = dmx->add_frontend(dmx, &dev->mem_frontend);
1109 if (ret < 0)
1110 goto err_remove_hw_frontend;
1112 ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
1113 if (ret < 0)
1114 goto err_remove_mem_frontend;
1116 ret = dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
1117 if (ret < 0)
1118 goto err_disconnect_frontend;
1120 ret = frontend_init(dev);
1121 if (ret < 0)
1122 goto err_dvb_net;
1124 dm1105_ir_init(dev);
1126 INIT_WORK(&dev->work, dm1105_dmx_buffer);
1127 sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
1128 dev->wq = create_singlethread_workqueue(dev->wqn);
1129 if (!dev->wq) {
1130 ret = -ENOMEM;
1131 goto err_dvb_net;
1134 ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
1135 DRIVER_NAME, dev);
1136 if (ret < 0)
1137 goto err_workqueue;
1139 return 0;
1141 err_workqueue:
1142 destroy_workqueue(dev->wq);
1143 err_dvb_net:
1144 dvb_net_release(&dev->dvbnet);
1145 err_disconnect_frontend:
1146 dmx->disconnect_frontend(dmx);
1147 err_remove_mem_frontend:
1148 dmx->remove_frontend(dmx, &dev->mem_frontend);
1149 err_remove_hw_frontend:
1150 dmx->remove_frontend(dmx, &dev->hw_frontend);
1151 err_dvb_dmxdev_release:
1152 dvb_dmxdev_release(&dev->dmxdev);
1153 err_dvb_dmx_release:
1154 dvb_dmx_release(dvbdemux);
1155 err_dvb_unregister_adapter:
1156 dvb_unregister_adapter(dvb_adapter);
1157 err_i2c_del_adapters:
1158 i2c_del_adapter(&dev->i2c_bb_adap);
1159 err_i2c_del_adapter:
1160 i2c_del_adapter(&dev->i2c_adap);
1161 err_dm1105_hw_exit:
1162 dm1105_hw_exit(dev);
1163 err_pci_iounmap:
1164 pci_iounmap(pdev, dev->io_mem);
1165 err_pci_release_regions:
1166 pci_release_regions(pdev);
1167 err_pci_disable_device:
1168 pci_disable_device(pdev);
1169 err_kfree:
1170 kfree(dev);
1171 return ret;
1174 static void dm1105_remove(struct pci_dev *pdev)
1176 struct dm1105_dev *dev = pci_get_drvdata(pdev);
1177 struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
1178 struct dvb_demux *dvbdemux = &dev->demux;
1179 struct dmx_demux *dmx = &dvbdemux->dmx;
1181 dm1105_ir_exit(dev);
1182 dmx->close(dmx);
1183 dvb_net_release(&dev->dvbnet);
1184 if (dev->fe)
1185 dvb_unregister_frontend(dev->fe);
1187 dmx->disconnect_frontend(dmx);
1188 dmx->remove_frontend(dmx, &dev->mem_frontend);
1189 dmx->remove_frontend(dmx, &dev->hw_frontend);
1190 dvb_dmxdev_release(&dev->dmxdev);
1191 dvb_dmx_release(dvbdemux);
1192 dvb_unregister_adapter(dvb_adapter);
1193 i2c_del_adapter(&dev->i2c_adap);
1195 dm1105_hw_exit(dev);
1196 free_irq(pdev->irq, dev);
1197 pci_iounmap(pdev, dev->io_mem);
1198 pci_release_regions(pdev);
1199 pci_disable_device(pdev);
1200 dm1105_devcount--;
1201 kfree(dev);
1204 static const struct pci_device_id dm1105_id_table[] = {
1206 .vendor = PCI_VENDOR_ID_TRIGEM,
1207 .device = PCI_DEVICE_ID_DM1105,
1208 .subvendor = PCI_ANY_ID,
1209 .subdevice = PCI_ANY_ID,
1210 }, {
1211 .vendor = PCI_VENDOR_ID_AXESS,
1212 .device = PCI_DEVICE_ID_DM05,
1213 .subvendor = PCI_ANY_ID,
1214 .subdevice = PCI_ANY_ID,
1215 }, {
1216 /* empty */
1220 MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1222 static struct pci_driver dm1105_driver = {
1223 .name = DRIVER_NAME,
1224 .id_table = dm1105_id_table,
1225 .probe = dm1105_probe,
1226 .remove = dm1105_remove,
1229 module_pci_driver(dm1105_driver);
1231 MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1232 MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1233 MODULE_LICENSE("GPL");