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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / media / platform / omap3isp / isp.c
bloba4ee6b86663e2dfb63d8e73bab68e95e07f4e67a
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * isp.c
4 *
5 * TI OMAP3 ISP - Core
6 *
7 * Copyright (C) 2006-2010 Nokia Corporation
8 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 *
10 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 * Sakari Ailus <sakari.ailus@iki.fi>
12 *
13 * Contributors:
14 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
15 * Sakari Ailus <sakari.ailus@iki.fi>
16 * David Cohen <dacohen@gmail.com>
17 * Stanimir Varbanov <svarbanov@mm-sol.com>
18 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
19 * Tuukka Toivonen <tuukkat76@gmail.com>
20 * Sergio Aguirre <saaguirre@ti.com>
21 * Antti Koskipaa <akoskipa@gmail.com>
22 * Ivan T. Ivanov <iivanov@mm-sol.com>
23 * RaniSuneela <r-m@ti.com>
24 * Atanas Filipov <afilipov@mm-sol.com>
25 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
26 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
27 * Nayden Kanchev <nkanchev@mm-sol.com>
28 * Phil Carmody <ext-phil.2.carmody@nokia.com>
29 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
30 * Dominic Curran <dcurran@ti.com>
31 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
32 * Pallavi Kulkarni <p-kulkarni@ti.com>
33 * Vaibhav Hiremath <hvaibhav@ti.com>
34 * Mohit Jalori <mjalori@ti.com>
35 * Sameer Venkatraman <sameerv@ti.com>
36 * Senthilvadivu Guruswamy <svadivu@ti.com>
37 * Thara Gopinath <thara@ti.com>
38 * Toni Leinonen <toni.leinonen@nokia.com>
39 * Troy Laramy <t-laramy@ti.com>
40 */
41
42 #include <asm/cacheflush.h>
43
44 #include <linux/clk.h>
45 #include <linux/clkdev.h>
46 #include <linux/delay.h>
47 #include <linux/device.h>
48 #include <linux/dma-mapping.h>
49 #include <linux/i2c.h>
50 #include <linux/interrupt.h>
51 #include <linux/mfd/syscon.h>
52 #include <linux/module.h>
53 #include <linux/omap-iommu.h>
54 #include <linux/platform_device.h>
55 #include <linux/property.h>
56 #include <linux/regulator/consumer.h>
57 #include <linux/slab.h>
58 #include <linux/sched.h>
59 #include <linux/vmalloc.h>
60
61 #ifdef CONFIG_ARM_DMA_USE_IOMMU
62 #include <asm/dma-iommu.h>
63 #endif
64
65 #include <media/v4l2-common.h>
66 #include <media/v4l2-fwnode.h>
67 #include <media/v4l2-device.h>
68 #include <media/v4l2-mc.h>
69
70 #include "isp.h"
71 #include "ispreg.h"
72 #include "ispccdc.h"
73 #include "isppreview.h"
74 #include "ispresizer.h"
75 #include "ispcsi2.h"
76 #include "ispccp2.h"
77 #include "isph3a.h"
78 #include "isphist.h"
79
80 static unsigned int autoidle;
81 module_param(autoidle, int, 0444);
82 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
83
84 static void isp_save_ctx(struct isp_device *isp);
85
86 static void isp_restore_ctx(struct isp_device *isp);
87
88 static const struct isp_res_mapping isp_res_maps[] = {
89 {
90 .isp_rev = ISP_REVISION_2_0,
91 .offset = {
92 /* first MMIO area */
93 0x0000, /* base, len 0x0070 */
94 0x0400, /* ccp2, len 0x01f0 */
95 0x0600, /* ccdc, len 0x00a8 */
96 0x0a00, /* hist, len 0x0048 */
97 0x0c00, /* h3a, len 0x0060 */
98 0x0e00, /* preview, len 0x00a0 */
99 0x1000, /* resizer, len 0x00ac */
100 0x1200, /* sbl, len 0x00fc */
101 /* second MMIO area */
102 0x0000, /* csi2a, len 0x0170 */
103 0x0170, /* csiphy2, len 0x000c */
104 },
105 .phy_type = ISP_PHY_TYPE_3430,
106 },
107 {
108 .isp_rev = ISP_REVISION_15_0,
109 .offset = {
110 /* first MMIO area */
111 0x0000, /* base, len 0x0070 */
112 0x0400, /* ccp2, len 0x01f0 */
113 0x0600, /* ccdc, len 0x00a8 */
114 0x0a00, /* hist, len 0x0048 */
115 0x0c00, /* h3a, len 0x0060 */
116 0x0e00, /* preview, len 0x00a0 */
117 0x1000, /* resizer, len 0x00ac */
118 0x1200, /* sbl, len 0x00fc */
119 /* second MMIO area */
120 0x0000, /* csi2a, len 0x0170 (1st area) */
121 0x0170, /* csiphy2, len 0x000c */
122 0x01c0, /* csi2a, len 0x0040 (2nd area) */
123 0x0400, /* csi2c, len 0x0170 (1st area) */
124 0x0570, /* csiphy1, len 0x000c */
125 0x05c0, /* csi2c, len 0x0040 (2nd area) */
126 },
127 .phy_type = ISP_PHY_TYPE_3630,
128 },
129 };
130
131 /* Structure for saving/restoring ISP module registers */
132 static struct isp_reg isp_reg_list[] = {
133 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
135 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
136 {0, ISP_TOK_TERM, 0}
137 };
138
139 /*
140 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
141 * @isp: OMAP3 ISP device
142 *
143 * In order to force posting of pending writes, we need to write and
144 * readback the same register, in this case the revision register.
145 *
146 * See this link for reference:
147 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
148 */
149 void omap3isp_flush(struct isp_device *isp)
150 {
151 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
153 }
154
155 /* -----------------------------------------------------------------------------
156 * XCLK
157 */
158
159 #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
160
161 static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
162 {
163 switch (xclk->id) {
164 case ISP_XCLK_A:
165 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
166 ISPTCTRL_CTRL_DIVA_MASK,
167 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
168 break;
169 case ISP_XCLK_B:
170 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
171 ISPTCTRL_CTRL_DIVB_MASK,
172 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
173 break;
174 }
175 }
176
177 static int isp_xclk_prepare(struct clk_hw *hw)
178 {
179 struct isp_xclk *xclk = to_isp_xclk(hw);
180
181 omap3isp_get(xclk->isp);
182
183 return 0;
184 }
185
186 static void isp_xclk_unprepare(struct clk_hw *hw)
187 {
188 struct isp_xclk *xclk = to_isp_xclk(hw);
189
190 omap3isp_put(xclk->isp);
191 }
192
193 static int isp_xclk_enable(struct clk_hw *hw)
194 {
195 struct isp_xclk *xclk = to_isp_xclk(hw);
196 unsigned long flags;
197
198 spin_lock_irqsave(&xclk->lock, flags);
199 isp_xclk_update(xclk, xclk->divider);
200 xclk->enabled = true;
201 spin_unlock_irqrestore(&xclk->lock, flags);
202
203 return 0;
204 }
205
206 static void isp_xclk_disable(struct clk_hw *hw)
207 {
208 struct isp_xclk *xclk = to_isp_xclk(hw);
209 unsigned long flags;
210
211 spin_lock_irqsave(&xclk->lock, flags);
212 isp_xclk_update(xclk, 0);
213 xclk->enabled = false;
214 spin_unlock_irqrestore(&xclk->lock, flags);
215 }
216
217 static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
218 unsigned long parent_rate)
219 {
220 struct isp_xclk *xclk = to_isp_xclk(hw);
221
222 return parent_rate / xclk->divider;
223 }
224
225 static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
226 {
227 u32 divider;
228
229 if (*rate >= parent_rate) {
230 *rate = parent_rate;
231 return ISPTCTRL_CTRL_DIV_BYPASS;
232 }
233
234 if (*rate == 0)
235 *rate = 1;
236
237 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
238 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
239 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
240
241 *rate = parent_rate / divider;
242 return divider;
243 }
244
245 static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
246 unsigned long *parent_rate)
247 {
248 isp_xclk_calc_divider(&rate, *parent_rate);
249 return rate;
250 }
251
252 static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
253 unsigned long parent_rate)
254 {
255 struct isp_xclk *xclk = to_isp_xclk(hw);
256 unsigned long flags;
257 u32 divider;
258
259 divider = isp_xclk_calc_divider(&rate, parent_rate);
260
261 spin_lock_irqsave(&xclk->lock, flags);
262
263 xclk->divider = divider;
264 if (xclk->enabled)
265 isp_xclk_update(xclk, divider);
266
267 spin_unlock_irqrestore(&xclk->lock, flags);
268
269 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
270 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
271 return 0;
272 }
273
274 static const struct clk_ops isp_xclk_ops = {
275 .prepare = isp_xclk_prepare,
276 .unprepare = isp_xclk_unprepare,
277 .enable = isp_xclk_enable,
278 .disable = isp_xclk_disable,
279 .recalc_rate = isp_xclk_recalc_rate,
280 .round_rate = isp_xclk_round_rate,
281 .set_rate = isp_xclk_set_rate,
282 };
283
284 static const char *isp_xclk_parent_name = "cam_mclk";
285
286 static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
287 {
288 unsigned int idx = clkspec->args[0];
289 struct isp_device *isp = data;
290
291 if (idx >= ARRAY_SIZE(isp->xclks))
292 return ERR_PTR(-ENOENT);
293
294 return isp->xclks[idx].clk;
295 }
296
297 static int isp_xclk_init(struct isp_device *isp)
298 {
299 struct device_node *np = isp->dev->of_node;
300 struct clk_init_data init = {};
301 unsigned int i;
302
303 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
304 isp->xclks[i].clk = ERR_PTR(-EINVAL);
305
306 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
307 struct isp_xclk *xclk = &isp->xclks[i];
308
309 xclk->isp = isp;
310 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
311 xclk->divider = 1;
312 spin_lock_init(&xclk->lock);
313
314 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
315 init.ops = &isp_xclk_ops;
316 init.parent_names = &isp_xclk_parent_name;
317 init.num_parents = 1;
318
319 xclk->hw.init = &init;
320 /*
321 * The first argument is NULL in order to avoid circular
322 * reference, as this driver takes reference on the
323 * sensor subdevice modules and the sensors would take
324 * reference on this module through clk_get().
325 */
326 xclk->clk = clk_register(NULL, &xclk->hw);
327 if (IS_ERR(xclk->clk))
328 return PTR_ERR(xclk->clk);
329 }
330
331 if (np)
332 of_clk_add_provider(np, isp_xclk_src_get, isp);
333
334 return 0;
335 }
336
337 static void isp_xclk_cleanup(struct isp_device *isp)
338 {
339 struct device_node *np = isp->dev->of_node;
340 unsigned int i;
341
342 if (np)
343 of_clk_del_provider(np);
344
345 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
346 struct isp_xclk *xclk = &isp->xclks[i];
347
348 if (!IS_ERR(xclk->clk))
349 clk_unregister(xclk->clk);
350 }
351 }
352
353 /* -----------------------------------------------------------------------------
354 * Interrupts
355 */
356
357 /*
358 * isp_enable_interrupts - Enable ISP interrupts.
359 * @isp: OMAP3 ISP device
360 */
361 static void isp_enable_interrupts(struct isp_device *isp)
362 {
363 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
364 | IRQ0ENABLE_CSIB_IRQ
365 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
366 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
367 | IRQ0ENABLE_CCDC_VD0_IRQ
368 | IRQ0ENABLE_CCDC_VD1_IRQ
369 | IRQ0ENABLE_HS_VS_IRQ
370 | IRQ0ENABLE_HIST_DONE_IRQ
371 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
372 | IRQ0ENABLE_H3A_AF_DONE_IRQ
373 | IRQ0ENABLE_PRV_DONE_IRQ
374 | IRQ0ENABLE_RSZ_DONE_IRQ;
375
376 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
377 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
378 }
379
380 /*
381 * isp_disable_interrupts - Disable ISP interrupts.
382 * @isp: OMAP3 ISP device
383 */
384 static void isp_disable_interrupts(struct isp_device *isp)
385 {
386 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
387 }
388
389 /*
390 * isp_core_init - ISP core settings
391 * @isp: OMAP3 ISP device
392 * @idle: Consider idle state.
393 *
394 * Set the power settings for the ISP and SBL bus and configure the HS/VS
395 * interrupt source.
396 *
397 * We need to configure the HS/VS interrupt source before interrupts get
398 * enabled, as the sensor might be free-running and the ISP default setting
399 * (HS edge) would put an unnecessary burden on the CPU.
400 */
401 static void isp_core_init(struct isp_device *isp, int idle)
402 {
403 isp_reg_writel(isp,
404 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
405 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
406 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
407 ((isp->revision == ISP_REVISION_15_0) ?
408 ISP_SYSCONFIG_AUTOIDLE : 0),
409 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
410
411 isp_reg_writel(isp,
412 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
413 ISPCTRL_SYNC_DETECT_VSRISE,
414 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
415 }
416
417 /*
418 * Configure the bridge and lane shifter. Valid inputs are
419 *
420 * CCDC_INPUT_PARALLEL: Parallel interface
421 * CCDC_INPUT_CSI2A: CSI2a receiver
422 * CCDC_INPUT_CCP2B: CCP2b receiver
423 * CCDC_INPUT_CSI2C: CSI2c receiver
424 *
425 * The bridge and lane shifter are configured according to the selected input
426 * and the ISP platform data.
427 */
428 void omap3isp_configure_bridge(struct isp_device *isp,
429 enum ccdc_input_entity input,
430 const struct isp_parallel_cfg *parcfg,
431 unsigned int shift, unsigned int bridge)
432 {
433 u32 ispctrl_val;
434
435 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
436 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
437 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
438 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
439 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
440 ispctrl_val |= bridge;
441
442 switch (input) {
443 case CCDC_INPUT_PARALLEL:
444 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
445 ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
446 shift += parcfg->data_lane_shift;
447 break;
448
449 case CCDC_INPUT_CSI2A:
450 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
451 break;
452
453 case CCDC_INPUT_CCP2B:
454 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
455 break;
456
457 case CCDC_INPUT_CSI2C:
458 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
459 break;
460
461 default:
462 return;
463 }
464
465 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
466
467 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
468 }
469
470 void omap3isp_hist_dma_done(struct isp_device *isp)
471 {
472 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
473 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
474 /* Histogram cannot be enabled in this frame anymore */
475 atomic_set(&isp->isp_hist.buf_err, 1);
476 dev_dbg(isp->dev,
477 "hist: Out of synchronization with CCDC. Ignoring next buffer.\n");
478 }
479 }
480
481 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
482 {
483 static const char *name[] = {
484 "CSIA_IRQ",
485 "res1",
486 "res2",
487 "CSIB_LCM_IRQ",
488 "CSIB_IRQ",
489 "res5",
490 "res6",
491 "res7",
492 "CCDC_VD0_IRQ",
493 "CCDC_VD1_IRQ",
494 "CCDC_VD2_IRQ",
495 "CCDC_ERR_IRQ",
496 "H3A_AF_DONE_IRQ",
497 "H3A_AWB_DONE_IRQ",
498 "res14",
499 "res15",
500 "HIST_DONE_IRQ",
501 "CCDC_LSC_DONE",
502 "CCDC_LSC_PREFETCH_COMPLETED",
503 "CCDC_LSC_PREFETCH_ERROR",
504 "PRV_DONE_IRQ",
505 "CBUFF_IRQ",
506 "res22",
507 "res23",
508 "RSZ_DONE_IRQ",
509 "OVF_IRQ",
510 "res26",
511 "res27",
512 "MMU_ERR_IRQ",
513 "OCP_ERR_IRQ",
514 "SEC_ERR_IRQ",
515 "HS_VS_IRQ",
516 };
517 int i;
518
519 dev_dbg(isp->dev, "ISP IRQ: ");
520
521 for (i = 0; i < ARRAY_SIZE(name); i++) {
522 if ((1 << i) & irqstatus)
523 printk(KERN_CONT "%s ", name[i]);
524 }
525 printk(KERN_CONT "\n");
526 }
527
528 static void isp_isr_sbl(struct isp_device *isp)
529 {
530 struct device *dev = isp->dev;
531 struct isp_pipeline *pipe;
532 u32 sbl_pcr;
533
534 /*
535 * Handle shared buffer logic overflows for video buffers.
536 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
537 */
538 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
539 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
540 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
541
542 if (sbl_pcr)
543 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
544
545 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
546 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
547 if (pipe != NULL)
548 pipe->error = true;
549 }
550
551 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
552 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
553 if (pipe != NULL)
554 pipe->error = true;
555 }
556
557 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
558 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
559 if (pipe != NULL)
560 pipe->error = true;
561 }
562
563 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
564 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
565 if (pipe != NULL)
566 pipe->error = true;
567 }
568
569 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
570 | ISPSBL_PCR_RSZ2_WBL_OVF
571 | ISPSBL_PCR_RSZ3_WBL_OVF
572 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
573 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
574 if (pipe != NULL)
575 pipe->error = true;
576 }
577
578 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
579 omap3isp_stat_sbl_overflow(&isp->isp_af);
580
581 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
582 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
583 }
584
585 /*
586 * isp_isr - Interrupt Service Routine for Camera ISP module.
587 * @irq: Not used currently.
588 * @_isp: Pointer to the OMAP3 ISP device
589 *
590 * Handles the corresponding callback if plugged in.
591 */
592 static irqreturn_t isp_isr(int irq, void *_isp)
593 {
594 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
595 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
596 IRQ0STATUS_CCDC_VD0_IRQ |
597 IRQ0STATUS_CCDC_VD1_IRQ |
598 IRQ0STATUS_HS_VS_IRQ;
599 struct isp_device *isp = _isp;
600 u32 irqstatus;
601
602 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
603 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
604
605 isp_isr_sbl(isp);
606
607 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
608 omap3isp_csi2_isr(&isp->isp_csi2a);
609
610 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
611 omap3isp_ccp2_isr(&isp->isp_ccp2);
612
613 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
614 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
615 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
616 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
617 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
618 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
619 omap3isp_stat_isr_frame_sync(&isp->isp_af);
620 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
621 }
622
623 if (irqstatus & ccdc_events)
624 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
625
626 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
627 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
628 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
629 omap3isp_preview_isr(&isp->isp_prev);
630 }
631
632 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
633 omap3isp_resizer_isr(&isp->isp_res);
634
635 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
636 omap3isp_stat_isr(&isp->isp_aewb);
637
638 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
639 omap3isp_stat_isr(&isp->isp_af);
640
641 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
642 omap3isp_stat_isr(&isp->isp_hist);
643
644 omap3isp_flush(isp);
645
646 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
647 isp_isr_dbg(isp, irqstatus);
648 #endif
649
650 return IRQ_HANDLED;
651 }
652
653 static const struct media_device_ops isp_media_ops = {
654 .link_notify = v4l2_pipeline_link_notify,
655 };
656
657 /* -----------------------------------------------------------------------------
658 * Pipeline stream management
659 */
660
661 /*
662 * isp_pipeline_enable - Enable streaming on a pipeline
663 * @pipe: ISP pipeline
664 * @mode: Stream mode (single shot or continuous)
665 *
666 * Walk the entities chain starting at the pipeline output video node and start
667 * all modules in the chain in the given mode.
668 *
669 * Return 0 if successful, or the return value of the failed video::s_stream
670 * operation otherwise.
671 */
672 static int isp_pipeline_enable(struct isp_pipeline *pipe,
673 enum isp_pipeline_stream_state mode)
674 {
675 struct isp_device *isp = pipe->output->isp;
676 struct media_entity *entity;
677 struct media_pad *pad;
678 struct v4l2_subdev *subdev;
679 unsigned long flags;
680 int ret;
681
682 /* Refuse to start streaming if an entity included in the pipeline has
683 * crashed. This check must be performed before the loop below to avoid
684 * starting entities if the pipeline won't start anyway (those entities
685 * would then likely fail to stop, making the problem worse).
686 */
687 if (media_entity_enum_intersects(&pipe->ent_enum, &isp->crashed))
688 return -EIO;
689
690 spin_lock_irqsave(&pipe->lock, flags);
691 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
692 spin_unlock_irqrestore(&pipe->lock, flags);
693
694 pipe->do_propagation = false;
695
696 entity = &pipe->output->video.entity;
697 while (1) {
698 pad = &entity->pads[0];
699 if (!(pad->flags & MEDIA_PAD_FL_SINK))
700 break;
701
702 pad = media_entity_remote_pad(pad);
703 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
704 break;
705
706 entity = pad->entity;
707 subdev = media_entity_to_v4l2_subdev(entity);
708
709 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
710 if (ret < 0 && ret != -ENOIOCTLCMD)
711 return ret;
712
713 if (subdev == &isp->isp_ccdc.subdev) {
714 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
715 s_stream, mode);
716 v4l2_subdev_call(&isp->isp_af.subdev, video,
717 s_stream, mode);
718 v4l2_subdev_call(&isp->isp_hist.subdev, video,
719 s_stream, mode);
720 pipe->do_propagation = true;
721 }
722
723 /* Stop at the first external sub-device. */
724 if (subdev->dev != isp->dev)
725 break;
726 }
727
728 return 0;
729 }
730
731 static int isp_pipeline_wait_resizer(struct isp_device *isp)
732 {
733 return omap3isp_resizer_busy(&isp->isp_res);
734 }
735
736 static int isp_pipeline_wait_preview(struct isp_device *isp)
737 {
738 return omap3isp_preview_busy(&isp->isp_prev);
739 }
740
741 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
742 {
743 return omap3isp_stat_busy(&isp->isp_af)
744 || omap3isp_stat_busy(&isp->isp_aewb)
745 || omap3isp_stat_busy(&isp->isp_hist)
746 || omap3isp_ccdc_busy(&isp->isp_ccdc);
747 }
748
749 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
750
751 static int isp_pipeline_wait(struct isp_device *isp,
752 int(*busy)(struct isp_device *isp))
753 {
754 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
755
756 while (!time_after(jiffies, timeout)) {
757 if (!busy(isp))
758 return 0;
759 }
760
761 return 1;
762 }
763
764 /*
765 * isp_pipeline_disable - Disable streaming on a pipeline
766 * @pipe: ISP pipeline
767 *
768 * Walk the entities chain starting at the pipeline output video node and stop
769 * all modules in the chain. Wait synchronously for the modules to be stopped if
770 * necessary.
771 *
772 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
773 * can't be stopped (in which case a software reset of the ISP is probably
774 * necessary).
775 */
776 static int isp_pipeline_disable(struct isp_pipeline *pipe)
777 {
778 struct isp_device *isp = pipe->output->isp;
779 struct media_entity *entity;
780 struct media_pad *pad;
781 struct v4l2_subdev *subdev;
782 int failure = 0;
783 int ret;
784
785 /*
786 * We need to stop all the modules after CCDC first or they'll
787 * never stop since they may not get a full frame from CCDC.
788 */
789 entity = &pipe->output->video.entity;
790 while (1) {
791 pad = &entity->pads[0];
792 if (!(pad->flags & MEDIA_PAD_FL_SINK))
793 break;
794
795 pad = media_entity_remote_pad(pad);
796 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
797 break;
798
799 entity = pad->entity;
800 subdev = media_entity_to_v4l2_subdev(entity);
801
802 if (subdev == &isp->isp_ccdc.subdev) {
803 v4l2_subdev_call(&isp->isp_aewb.subdev,
804 video, s_stream, 0);
805 v4l2_subdev_call(&isp->isp_af.subdev,
806 video, s_stream, 0);
807 v4l2_subdev_call(&isp->isp_hist.subdev,
808 video, s_stream, 0);
809 }
810
811 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
812
813 /* Stop at the first external sub-device. */
814 if (subdev->dev != isp->dev)
815 break;
816
817 if (subdev == &isp->isp_res.subdev)
818 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
819 else if (subdev == &isp->isp_prev.subdev)
820 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
821 else if (subdev == &isp->isp_ccdc.subdev)
822 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
823
824 /* Handle stop failures. An entity that fails to stop can
825 * usually just be restarted. Flag the stop failure nonetheless
826 * to trigger an ISP reset the next time the device is released,
827 * just in case.
828 *
829 * The preview engine is a special case. A failure to stop can
830 * mean a hardware crash. When that happens the preview engine
831 * won't respond to read/write operations on the L4 bus anymore,
832 * resulting in a bus fault and a kernel oops next time it gets
833 * accessed. Mark it as crashed to prevent pipelines including
834 * it from being started.
835 */
836 if (ret) {
837 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
838 isp->stop_failure = true;
839 if (subdev == &isp->isp_prev.subdev)
840 media_entity_enum_set(&isp->crashed,
841 &subdev->entity);
842 failure = -ETIMEDOUT;
843 }
844 }
845
846 return failure;
847 }
848
849 /*
850 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
851 * @pipe: ISP pipeline
852 * @state: Stream state (stopped, single shot or continuous)
853 *
854 * Set the pipeline to the given stream state. Pipelines can be started in
855 * single-shot or continuous mode.
856 *
857 * Return 0 if successful, or the return value of the failed video::s_stream
858 * operation otherwise. The pipeline state is not updated when the operation
859 * fails, except when stopping the pipeline.
860 */
861 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
862 enum isp_pipeline_stream_state state)
863 {
864 int ret;
865
866 if (state == ISP_PIPELINE_STREAM_STOPPED)
867 ret = isp_pipeline_disable(pipe);
868 else
869 ret = isp_pipeline_enable(pipe, state);
870
871 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
872 pipe->stream_state = state;
873
874 return ret;
875 }
876
877 /*
878 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
879 * @pipe: ISP pipeline
880 *
881 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
882 * erroneous and makes sure no new buffer can be queued. This function is called
883 * when a fatal error that prevents any further operation on the pipeline
884 * occurs.
885 */
886 void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
887 {
888 if (pipe->input)
889 omap3isp_video_cancel_stream(pipe->input);
890 if (pipe->output)
891 omap3isp_video_cancel_stream(pipe->output);
892 }
893
894 /*
895 * isp_pipeline_resume - Resume streaming on a pipeline
896 * @pipe: ISP pipeline
897 *
898 * Resume video output and input and re-enable pipeline.
899 */
900 static void isp_pipeline_resume(struct isp_pipeline *pipe)
901 {
902 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
903
904 omap3isp_video_resume(pipe->output, !singleshot);
905 if (singleshot)
906 omap3isp_video_resume(pipe->input, 0);
907 isp_pipeline_enable(pipe, pipe->stream_state);
908 }
909
910 /*
911 * isp_pipeline_suspend - Suspend streaming on a pipeline
912 * @pipe: ISP pipeline
913 *
914 * Suspend pipeline.
915 */
916 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
917 {
918 isp_pipeline_disable(pipe);
919 }
920
921 /*
922 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
923 * video node
924 * @me: ISP module's media entity
925 *
926 * Returns 1 if the entity has an enabled link to the output video node or 0
927 * otherwise. It's true only while pipeline can have no more than one output
928 * node.
929 */
930 static int isp_pipeline_is_last(struct media_entity *me)
931 {
932 struct isp_pipeline *pipe;
933 struct media_pad *pad;
934
935 if (!me->pipe)
936 return 0;
937 pipe = to_isp_pipeline(me);
938 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
939 return 0;
940 pad = media_entity_remote_pad(&pipe->output->pad);
941 return pad->entity == me;
942 }
943
944 /*
945 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
946 * @me: ISP module's media entity
947 *
948 * Suspend the whole pipeline if module's entity has an enabled link to the
949 * output video node. It works only while pipeline can have no more than one
950 * output node.
951 */
952 static void isp_suspend_module_pipeline(struct media_entity *me)
953 {
954 if (isp_pipeline_is_last(me))
955 isp_pipeline_suspend(to_isp_pipeline(me));
956 }
957
958 /*
959 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
960 * @me: ISP module's media entity
961 *
962 * Resume the whole pipeline if module's entity has an enabled link to the
963 * output video node. It works only while pipeline can have no more than one
964 * output node.
965 */
966 static void isp_resume_module_pipeline(struct media_entity *me)
967 {
968 if (isp_pipeline_is_last(me))
969 isp_pipeline_resume(to_isp_pipeline(me));
970 }
971
972 /*
973 * isp_suspend_modules - Suspend ISP submodules.
974 * @isp: OMAP3 ISP device
975 *
976 * Returns 0 if suspend left in idle state all the submodules properly,
977 * or returns 1 if a general Reset is required to suspend the submodules.
978 */
979 static int __maybe_unused isp_suspend_modules(struct isp_device *isp)
980 {
981 unsigned long timeout;
982
983 omap3isp_stat_suspend(&isp->isp_aewb);
984 omap3isp_stat_suspend(&isp->isp_af);
985 omap3isp_stat_suspend(&isp->isp_hist);
986 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
987 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
988 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
989 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
990 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
991
992 timeout = jiffies + ISP_STOP_TIMEOUT;
993 while (omap3isp_stat_busy(&isp->isp_af)
994 || omap3isp_stat_busy(&isp->isp_aewb)
995 || omap3isp_stat_busy(&isp->isp_hist)
996 || omap3isp_preview_busy(&isp->isp_prev)
997 || omap3isp_resizer_busy(&isp->isp_res)
998 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
999 if (time_after(jiffies, timeout)) {
1000 dev_info(isp->dev, "can't stop modules.\n");
1001 return 1;
1002 }
1003 msleep(1);
1004 }
1005
1006 return 0;
1007 }
1008
1009 /*
1010 * isp_resume_modules - Resume ISP submodules.
1011 * @isp: OMAP3 ISP device
1012 */
1013 static void __maybe_unused isp_resume_modules(struct isp_device *isp)
1014 {
1015 omap3isp_stat_resume(&isp->isp_aewb);
1016 omap3isp_stat_resume(&isp->isp_af);
1017 omap3isp_stat_resume(&isp->isp_hist);
1018 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1019 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1020 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1021 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1022 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1023 }
1024
1025 /*
1026 * isp_reset - Reset ISP with a timeout wait for idle.
1027 * @isp: OMAP3 ISP device
1028 */
1029 static int isp_reset(struct isp_device *isp)
1030 {
1031 unsigned long timeout = 0;
1032
1033 isp_reg_writel(isp,
1034 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1035 | ISP_SYSCONFIG_SOFTRESET,
1036 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1037 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1038 ISP_SYSSTATUS) & 0x1)) {
1039 if (timeout++ > 10000) {
1040 dev_alert(isp->dev, "cannot reset ISP\n");
1041 return -ETIMEDOUT;
1042 }
1043 udelay(1);
1044 }
1045
1046 isp->stop_failure = false;
1047 media_entity_enum_zero(&isp->crashed);
1048 return 0;
1049 }
1050
1051 /*
1052 * isp_save_context - Saves the values of the ISP module registers.
1053 * @isp: OMAP3 ISP device
1054 * @reg_list: Structure containing pairs of register address and value to
1055 * modify on OMAP.
1056 */
1057 static void
1058 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1059 {
1060 struct isp_reg *next = reg_list;
1061
1062 for (; next->reg != ISP_TOK_TERM; next++)
1063 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1064 }
1065
1066 /*
1067 * isp_restore_context - Restores the values of the ISP module registers.
1068 * @isp: OMAP3 ISP device
1069 * @reg_list: Structure containing pairs of register address and value to
1070 * modify on OMAP.
1071 */
1072 static void
1073 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1074 {
1075 struct isp_reg *next = reg_list;
1076
1077 for (; next->reg != ISP_TOK_TERM; next++)
1078 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1079 }
1080
1081 /*
1082 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1083 * @isp: OMAP3 ISP device
1084 *
1085 * Routine for saving the context of each module in the ISP.
1086 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1087 */
1088 static void isp_save_ctx(struct isp_device *isp)
1089 {
1090 isp_save_context(isp, isp_reg_list);
1091 omap_iommu_save_ctx(isp->dev);
1092 }
1093
1094 /*
1095 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1096 * @isp: OMAP3 ISP device
1097 *
1098 * Routine for restoring the context of each module in the ISP.
1099 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1100 */
1101 static void isp_restore_ctx(struct isp_device *isp)
1102 {
1103 isp_restore_context(isp, isp_reg_list);
1104 omap_iommu_restore_ctx(isp->dev);
1105 omap3isp_ccdc_restore_context(isp);
1106 omap3isp_preview_restore_context(isp);
1107 }
1108
1109 /* -----------------------------------------------------------------------------
1110 * SBL resources management
1111 */
1112 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1113 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1114 OMAP3_ISP_SBL_PREVIEW_READ | \
1115 OMAP3_ISP_SBL_RESIZER_READ)
1116 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1117 OMAP3_ISP_SBL_CSI2A_WRITE | \
1118 OMAP3_ISP_SBL_CSI2C_WRITE | \
1119 OMAP3_ISP_SBL_CCDC_WRITE | \
1120 OMAP3_ISP_SBL_PREVIEW_WRITE)
1121
1122 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1123 {
1124 u32 sbl = 0;
1125
1126 isp->sbl_resources |= res;
1127
1128 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1129 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1130
1131 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1132 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1133
1134 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1135 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1136
1137 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1138 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1139
1140 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1141 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1142
1143 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1144 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1145
1146 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1147 }
1148
1149 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1150 {
1151 u32 sbl = 0;
1152
1153 isp->sbl_resources &= ~res;
1154
1155 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1156 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1157
1158 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1159 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1160
1161 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1162 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1163
1164 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1165 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1166
1167 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1168 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1169
1170 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1171 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1172
1173 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1174 }
1175
1176 /*
1177 * isp_module_sync_idle - Helper to sync module with its idle state
1178 * @me: ISP submodule's media entity
1179 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1180 * @stopping: flag which tells module wants to stop
1181 *
1182 * This function checks if ISP submodule needs to wait for next interrupt. If
1183 * yes, makes the caller to sleep while waiting for such event.
1184 */
1185 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1186 atomic_t *stopping)
1187 {
1188 struct isp_pipeline *pipe = to_isp_pipeline(me);
1189
1190 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1191 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1192 !isp_pipeline_ready(pipe)))
1193 return 0;
1194
1195 /*
1196 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1197 * scenario. We'll call it here to avoid race conditions.
1198 */
1199 atomic_set(stopping, 1);
1200 smp_mb();
1201
1202 /*
1203 * If module is the last one, it's writing to memory. In this case,
1204 * it's necessary to check if the module is already paused due to
1205 * DMA queue underrun or if it has to wait for next interrupt to be
1206 * idle.
1207 * If it isn't the last one, the function won't sleep but *stopping
1208 * will still be set to warn next submodule caller's interrupt the
1209 * module wants to be idle.
1210 */
1211 if (isp_pipeline_is_last(me)) {
1212 struct isp_video *video = pipe->output;
1213 unsigned long flags;
1214 spin_lock_irqsave(&video->irqlock, flags);
1215 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1216 spin_unlock_irqrestore(&video->irqlock, flags);
1217 atomic_set(stopping, 0);
1218 smp_mb();
1219 return 0;
1220 }
1221 spin_unlock_irqrestore(&video->irqlock, flags);
1222 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1223 msecs_to_jiffies(1000))) {
1224 atomic_set(stopping, 0);
1225 smp_mb();
1226 return -ETIMEDOUT;
1227 }
1228 }
1229
1230 return 0;
1231 }
1232
1233 /*
1234 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
1235 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1236 * @stopping: flag which tells module wants to stop
1237 *
1238 * This function checks if ISP submodule was stopping. In case of yes, it
1239 * notices the caller by setting stopping to 0 and waking up the wait queue.
1240 * Returns 1 if it was stopping or 0 otherwise.
1241 */
1242 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1243 atomic_t *stopping)
1244 {
1245 if (atomic_cmpxchg(stopping, 1, 0)) {
1246 wake_up(wait);
1247 return 1;
1248 }
1249
1250 return 0;
1251 }
1252
1253 /* --------------------------------------------------------------------------
1254 * Clock management
1255 */
1256
1257 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1258 ISPCTRL_HIST_CLK_EN | \
1259 ISPCTRL_RSZ_CLK_EN | \
1260 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1261 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1262
1263 static void __isp_subclk_update(struct isp_device *isp)
1264 {
1265 u32 clk = 0;
1266
1267 /* AEWB and AF share the same clock. */
1268 if (isp->subclk_resources &
1269 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1270 clk |= ISPCTRL_H3A_CLK_EN;
1271
1272 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1273 clk |= ISPCTRL_HIST_CLK_EN;
1274
1275 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1276 clk |= ISPCTRL_RSZ_CLK_EN;
1277
1278 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1279 * RAM as well.
1280 */
1281 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1282 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1283
1284 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1285 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1286
1287 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1288 ISPCTRL_CLKS_MASK, clk);
1289 }
1290
1291 void omap3isp_subclk_enable(struct isp_device *isp,
1292 enum isp_subclk_resource res)
1293 {
1294 isp->subclk_resources |= res;
1295
1296 __isp_subclk_update(isp);
1297 }
1298
1299 void omap3isp_subclk_disable(struct isp_device *isp,
1300 enum isp_subclk_resource res)
1301 {
1302 isp->subclk_resources &= ~res;
1303
1304 __isp_subclk_update(isp);
1305 }
1306
1307 /*
1308 * isp_enable_clocks - Enable ISP clocks
1309 * @isp: OMAP3 ISP device
1310 *
1311 * Return 0 if successful, or clk_prepare_enable return value if any of them
1312 * fails.
1313 */
1314 static int isp_enable_clocks(struct isp_device *isp)
1315 {
1316 int r;
1317 unsigned long rate;
1318
1319 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1320 if (r) {
1321 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1322 goto out_clk_enable_ick;
1323 }
1324 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1325 if (r) {
1326 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1327 goto out_clk_enable_mclk;
1328 }
1329 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1330 if (r) {
1331 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1332 goto out_clk_enable_mclk;
1333 }
1334 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1335 if (rate != CM_CAM_MCLK_HZ)
1336 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1337 " expected : %d\n"
1338 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1339 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1340 if (r) {
1341 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1342 goto out_clk_enable_csi2_fclk;
1343 }
1344 return 0;
1345
1346 out_clk_enable_csi2_fclk:
1347 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1348 out_clk_enable_mclk:
1349 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1350 out_clk_enable_ick:
1351 return r;
1352 }
1353
1354 /*
1355 * isp_disable_clocks - Disable ISP clocks
1356 * @isp: OMAP3 ISP device
1357 */
1358 static void isp_disable_clocks(struct isp_device *isp)
1359 {
1360 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1361 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1362 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1363 }
1364
1365 static const char *isp_clocks[] = {
1366 "cam_ick",
1367 "cam_mclk",
1368 "csi2_96m_fck",
1369 "l3_ick",
1370 };
1371
1372 static int isp_get_clocks(struct isp_device *isp)
1373 {
1374 struct clk *clk;
1375 unsigned int i;
1376
1377 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1378 clk = devm_clk_get(isp->dev, isp_clocks[i]);
1379 if (IS_ERR(clk)) {
1380 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1381 return PTR_ERR(clk);
1382 }
1383
1384 isp->clock[i] = clk;
1385 }
1386
1387 return 0;
1388 }
1389
1390 /*
1391 * omap3isp_get - Acquire the ISP resource.
1392 *
1393 * Initializes the clocks for the first acquire.
1394 *
1395 * Increment the reference count on the ISP. If the first reference is taken,
1396 * enable clocks and power-up all submodules.
1397 *
1398 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1399 */
1400 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1401 {
1402 struct isp_device *__isp = isp;
1403
1404 if (isp == NULL)
1405 return NULL;
1406
1407 mutex_lock(&isp->isp_mutex);
1408 if (isp->ref_count > 0)
1409 goto out;
1410
1411 if (isp_enable_clocks(isp) < 0) {
1412 __isp = NULL;
1413 goto out;
1414 }
1415
1416 /* We don't want to restore context before saving it! */
1417 if (isp->has_context)
1418 isp_restore_ctx(isp);
1419
1420 if (irq)
1421 isp_enable_interrupts(isp);
1422
1423 out:
1424 if (__isp != NULL)
1425 isp->ref_count++;
1426 mutex_unlock(&isp->isp_mutex);
1427
1428 return __isp;
1429 }
1430
1431 struct isp_device *omap3isp_get(struct isp_device *isp)
1432 {
1433 return __omap3isp_get(isp, true);
1434 }
1435
1436 /*
1437 * omap3isp_put - Release the ISP
1438 *
1439 * Decrement the reference count on the ISP. If the last reference is released,
1440 * power-down all submodules, disable clocks and free temporary buffers.
1441 */
1442 static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
1443 {
1444 if (isp == NULL)
1445 return;
1446
1447 mutex_lock(&isp->isp_mutex);
1448 BUG_ON(isp->ref_count == 0);
1449 if (--isp->ref_count == 0) {
1450 isp_disable_interrupts(isp);
1451 if (save_ctx) {
1452 isp_save_ctx(isp);
1453 isp->has_context = 1;
1454 }
1455 /* Reset the ISP if an entity has failed to stop. This is the
1456 * only way to recover from such conditions.
1457 */
1458 if (!media_entity_enum_empty(&isp->crashed) ||
1459 isp->stop_failure)
1460 isp_reset(isp);
1461 isp_disable_clocks(isp);
1462 }
1463 mutex_unlock(&isp->isp_mutex);
1464 }
1465
1466 void omap3isp_put(struct isp_device *isp)
1467 {
1468 __omap3isp_put(isp, true);
1469 }
1470
1471 /* --------------------------------------------------------------------------
1472 * Platform device driver
1473 */
1474
1475 /*
1476 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1477 * @isp: OMAP3 ISP device
1478 */
1479 #define ISP_PRINT_REGISTER(isp, name)\
1480 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1481 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1482 #define SBL_PRINT_REGISTER(isp, name)\
1483 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1484 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1485
1486 void omap3isp_print_status(struct isp_device *isp)
1487 {
1488 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1489
1490 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1491 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1492 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1493 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1494 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1495 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1496 ISP_PRINT_REGISTER(isp, CTRL);
1497 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1498 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1499 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1500 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1501 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1502 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1503 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1504 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1505
1506 SBL_PRINT_REGISTER(isp, PCR);
1507 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1508
1509 dev_dbg(isp->dev, "--------------------------------------------\n");
1510 }
1511
1512 #ifdef CONFIG_PM
1513
1514 /*
1515 * Power management support.
1516 *
1517 * As the ISP can't properly handle an input video stream interruption on a non
1518 * frame boundary, the ISP pipelines need to be stopped before sensors get
1519 * suspended. However, as suspending the sensors can require a running clock,
1520 * which can be provided by the ISP, the ISP can't be completely suspended
1521 * before the sensor.
1522 *
1523 * To solve this problem power management support is split into prepare/complete
1524 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1525 * ISP clocks get disabled in suspend(). Similarly, the clocks are re-enabled in
1526 * resume(), and the the pipelines are restarted in complete().
1527 *
1528 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
1529 * yet.
1530 */
1531 static int isp_pm_prepare(struct device *dev)
1532 {
1533 struct isp_device *isp = dev_get_drvdata(dev);
1534 int reset;
1535
1536 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1537
1538 if (isp->ref_count == 0)
1539 return 0;
1540
1541 reset = isp_suspend_modules(isp);
1542 isp_disable_interrupts(isp);
1543 isp_save_ctx(isp);
1544 if (reset)
1545 isp_reset(isp);
1546
1547 return 0;
1548 }
1549
1550 static int isp_pm_suspend(struct device *dev)
1551 {
1552 struct isp_device *isp = dev_get_drvdata(dev);
1553
1554 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1555
1556 if (isp->ref_count)
1557 isp_disable_clocks(isp);
1558
1559 return 0;
1560 }
1561
1562 static int isp_pm_resume(struct device *dev)
1563 {
1564 struct isp_device *isp = dev_get_drvdata(dev);
1565
1566 if (isp->ref_count == 0)
1567 return 0;
1568
1569 return isp_enable_clocks(isp);
1570 }
1571
1572 static void isp_pm_complete(struct device *dev)
1573 {
1574 struct isp_device *isp = dev_get_drvdata(dev);
1575
1576 if (isp->ref_count == 0)
1577 return;
1578
1579 isp_restore_ctx(isp);
1580 isp_enable_interrupts(isp);
1581 isp_resume_modules(isp);
1582 }
1583
1584 #else
1585
1586 #define isp_pm_prepare NULL
1587 #define isp_pm_suspend NULL
1588 #define isp_pm_resume NULL
1589 #define isp_pm_complete NULL
1590
1591 #endif /* CONFIG_PM */
1592
1593 static void isp_unregister_entities(struct isp_device *isp)
1594 {
1595 media_device_unregister(&isp->media_dev);
1596
1597 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1598 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1599 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1600 omap3isp_preview_unregister_entities(&isp->isp_prev);
1601 omap3isp_resizer_unregister_entities(&isp->isp_res);
1602 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1603 omap3isp_stat_unregister_entities(&isp->isp_af);
1604 omap3isp_stat_unregister_entities(&isp->isp_hist);
1605
1606 v4l2_device_unregister(&isp->v4l2_dev);
1607 media_device_cleanup(&isp->media_dev);
1608 }
1609
1610 static int isp_link_entity(
1611 struct isp_device *isp, struct media_entity *entity,
1612 enum isp_interface_type interface)
1613 {
1614 struct media_entity *input;
1615 unsigned int flags;
1616 unsigned int pad;
1617 unsigned int i;
1618
1619 /* Connect the sensor to the correct interface module.
1620 * Parallel sensors are connected directly to the CCDC, while
1621 * serial sensors are connected to the CSI2a, CCP2b or CSI2c
1622 * receiver through CSIPHY1 or CSIPHY2.
1623 */
1624 switch (interface) {
1625 case ISP_INTERFACE_PARALLEL:
1626 input = &isp->isp_ccdc.subdev.entity;
1627 pad = CCDC_PAD_SINK;
1628 flags = 0;
1629 break;
1630
1631 case ISP_INTERFACE_CSI2A_PHY2:
1632 input = &isp->isp_csi2a.subdev.entity;
1633 pad = CSI2_PAD_SINK;
1634 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1635 break;
1636
1637 case ISP_INTERFACE_CCP2B_PHY1:
1638 case ISP_INTERFACE_CCP2B_PHY2:
1639 input = &isp->isp_ccp2.subdev.entity;
1640 pad = CCP2_PAD_SINK;
1641 flags = 0;
1642 break;
1643
1644 case ISP_INTERFACE_CSI2C_PHY1:
1645 input = &isp->isp_csi2c.subdev.entity;
1646 pad = CSI2_PAD_SINK;
1647 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1648 break;
1649
1650 default:
1651 dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
1652 interface);
1653 return -EINVAL;
1654 }
1655
1656 /*
1657 * Not all interfaces are available on all revisions of the
1658 * ISP. The sub-devices of those interfaces aren't initialised
1659 * in such a case. Check this by ensuring the num_pads is
1660 * non-zero.
1661 */
1662 if (!input->num_pads) {
1663 dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
1664 interface);
1665 return -EINVAL;
1666 }
1667
1668 for (i = 0; i < entity->num_pads; i++) {
1669 if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
1670 break;
1671 }
1672 if (i == entity->num_pads) {
1673 dev_err(isp->dev, "%s: no source pad in external entity %s\n",
1674 __func__, entity->name);
1675 return -EINVAL;
1676 }
1677
1678 return media_create_pad_link(entity, i, input, pad, flags);
1679 }
1680
1681 static int isp_register_entities(struct isp_device *isp)
1682 {
1683 int ret;
1684
1685 isp->media_dev.dev = isp->dev;
1686 strscpy(isp->media_dev.model, "TI OMAP3 ISP",
1687 sizeof(isp->media_dev.model));
1688 isp->media_dev.hw_revision = isp->revision;
1689 isp->media_dev.ops = &isp_media_ops;
1690 media_device_init(&isp->media_dev);
1691
1692 isp->v4l2_dev.mdev = &isp->media_dev;
1693 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1694 if (ret < 0) {
1695 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1696 __func__, ret);
1697 goto done;
1698 }
1699
1700 /* Register internal entities */
1701 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1702 if (ret < 0)
1703 goto done;
1704
1705 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1706 if (ret < 0)
1707 goto done;
1708
1709 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1710 if (ret < 0)
1711 goto done;
1712
1713 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1714 &isp->v4l2_dev);
1715 if (ret < 0)
1716 goto done;
1717
1718 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1719 if (ret < 0)
1720 goto done;
1721
1722 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1723 if (ret < 0)
1724 goto done;
1725
1726 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1727 if (ret < 0)
1728 goto done;
1729
1730 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1731 if (ret < 0)
1732 goto done;
1733
1734 done:
1735 if (ret < 0)
1736 isp_unregister_entities(isp);
1737
1738 return ret;
1739 }
1740
1741 /*
1742 * isp_create_links() - Create links for internal and external ISP entities
1743 * @isp : Pointer to ISP device
1744 *
1745 * This function creates all links between ISP internal and external entities.
1746 *
1747 * Return: A negative error code on failure or zero on success. Possible error
1748 * codes are those returned by media_create_pad_link().
1749 */
1750 static int isp_create_links(struct isp_device *isp)
1751 {
1752 int ret;
1753
1754 /* Create links between entities and video nodes. */
1755 ret = media_create_pad_link(
1756 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1757 &isp->isp_csi2a.video_out.video.entity, 0, 0);
1758 if (ret < 0)
1759 return ret;
1760
1761 ret = media_create_pad_link(
1762 &isp->isp_ccp2.video_in.video.entity, 0,
1763 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SINK, 0);
1764 if (ret < 0)
1765 return ret;
1766
1767 ret = media_create_pad_link(
1768 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1769 &isp->isp_ccdc.video_out.video.entity, 0, 0);
1770 if (ret < 0)
1771 return ret;
1772
1773 ret = media_create_pad_link(
1774 &isp->isp_prev.video_in.video.entity, 0,
1775 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1776 if (ret < 0)
1777 return ret;
1778
1779 ret = media_create_pad_link(
1780 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1781 &isp->isp_prev.video_out.video.entity, 0, 0);
1782 if (ret < 0)
1783 return ret;
1784
1785 ret = media_create_pad_link(
1786 &isp->isp_res.video_in.video.entity, 0,
1787 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1788 if (ret < 0)
1789 return ret;
1790
1791 ret = media_create_pad_link(
1792 &isp->isp_res.subdev.entity, RESZ_PAD_SOURCE,
1793 &isp->isp_res.video_out.video.entity, 0, 0);
1794
1795 if (ret < 0)
1796 return ret;
1797
1798 /* Create links between entities. */
1799 ret = media_create_pad_link(
1800 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1801 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1802 if (ret < 0)
1803 return ret;
1804
1805 ret = media_create_pad_link(
1806 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1807 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1808 if (ret < 0)
1809 return ret;
1810
1811 ret = media_create_pad_link(
1812 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1813 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1814 if (ret < 0)
1815 return ret;
1816
1817 ret = media_create_pad_link(
1818 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1819 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1820 if (ret < 0)
1821 return ret;
1822
1823 ret = media_create_pad_link(
1824 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1825 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1826 if (ret < 0)
1827 return ret;
1828
1829 ret = media_create_pad_link(
1830 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1831 &isp->isp_aewb.subdev.entity, 0,
1832 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1833 if (ret < 0)
1834 return ret;
1835
1836 ret = media_create_pad_link(
1837 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1838 &isp->isp_af.subdev.entity, 0,
1839 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1840 if (ret < 0)
1841 return ret;
1842
1843 ret = media_create_pad_link(
1844 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1845 &isp->isp_hist.subdev.entity, 0,
1846 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1847 if (ret < 0)
1848 return ret;
1849
1850 return 0;
1851 }
1852
1853 static void isp_cleanup_modules(struct isp_device *isp)
1854 {
1855 omap3isp_h3a_aewb_cleanup(isp);
1856 omap3isp_h3a_af_cleanup(isp);
1857 omap3isp_hist_cleanup(isp);
1858 omap3isp_resizer_cleanup(isp);
1859 omap3isp_preview_cleanup(isp);
1860 omap3isp_ccdc_cleanup(isp);
1861 omap3isp_ccp2_cleanup(isp);
1862 omap3isp_csi2_cleanup(isp);
1863 omap3isp_csiphy_cleanup(isp);
1864 }
1865
1866 static int isp_initialize_modules(struct isp_device *isp)
1867 {
1868 int ret;
1869
1870 ret = omap3isp_csiphy_init(isp);
1871 if (ret < 0) {
1872 dev_err(isp->dev, "CSI PHY initialization failed\n");
1873 return ret;
1874 }
1875
1876 ret = omap3isp_csi2_init(isp);
1877 if (ret < 0) {
1878 dev_err(isp->dev, "CSI2 initialization failed\n");
1879 goto error_csi2;
1880 }
1881
1882 ret = omap3isp_ccp2_init(isp);
1883 if (ret < 0) {
1884 if (ret != -EPROBE_DEFER)
1885 dev_err(isp->dev, "CCP2 initialization failed\n");
1886 goto error_ccp2;
1887 }
1888
1889 ret = omap3isp_ccdc_init(isp);
1890 if (ret < 0) {
1891 dev_err(isp->dev, "CCDC initialization failed\n");
1892 goto error_ccdc;
1893 }
1894
1895 ret = omap3isp_preview_init(isp);
1896 if (ret < 0) {
1897 dev_err(isp->dev, "Preview initialization failed\n");
1898 goto error_preview;
1899 }
1900
1901 ret = omap3isp_resizer_init(isp);
1902 if (ret < 0) {
1903 dev_err(isp->dev, "Resizer initialization failed\n");
1904 goto error_resizer;
1905 }
1906
1907 ret = omap3isp_hist_init(isp);
1908 if (ret < 0) {
1909 dev_err(isp->dev, "Histogram initialization failed\n");
1910 goto error_hist;
1911 }
1912
1913 ret = omap3isp_h3a_aewb_init(isp);
1914 if (ret < 0) {
1915 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1916 goto error_h3a_aewb;
1917 }
1918
1919 ret = omap3isp_h3a_af_init(isp);
1920 if (ret < 0) {
1921 dev_err(isp->dev, "H3A AF initialization failed\n");
1922 goto error_h3a_af;
1923 }
1924
1925 return 0;
1926
1927 error_h3a_af:
1928 omap3isp_h3a_aewb_cleanup(isp);
1929 error_h3a_aewb:
1930 omap3isp_hist_cleanup(isp);
1931 error_hist:
1932 omap3isp_resizer_cleanup(isp);
1933 error_resizer:
1934 omap3isp_preview_cleanup(isp);
1935 error_preview:
1936 omap3isp_ccdc_cleanup(isp);
1937 error_ccdc:
1938 omap3isp_ccp2_cleanup(isp);
1939 error_ccp2:
1940 omap3isp_csi2_cleanup(isp);
1941 error_csi2:
1942 omap3isp_csiphy_cleanup(isp);
1943
1944 return ret;
1945 }
1946
1947 static void isp_detach_iommu(struct isp_device *isp)
1948 {
1949 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1950 arm_iommu_detach_device(isp->dev);
1951 arm_iommu_release_mapping(isp->mapping);
1952 isp->mapping = NULL;
1953 #endif
1954 }
1955
1956 static int isp_attach_iommu(struct isp_device *isp)
1957 {
1958 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1959 struct dma_iommu_mapping *mapping;
1960 int ret;
1961
1962 /*
1963 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
1964 * VAs. This will allocate a corresponding IOMMU domain.
1965 */
1966 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
1967 if (IS_ERR(mapping)) {
1968 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
1969 return PTR_ERR(mapping);
1970 }
1971
1972 isp->mapping = mapping;
1973
1974 /* Attach the ARM VA mapping to the device. */
1975 ret = arm_iommu_attach_device(isp->dev, mapping);
1976 if (ret < 0) {
1977 dev_err(isp->dev, "failed to attach device to VA mapping\n");
1978 goto error;
1979 }
1980
1981 return 0;
1982
1983 error:
1984 arm_iommu_release_mapping(isp->mapping);
1985 isp->mapping = NULL;
1986 return ret;
1987 #else
1988 return -ENODEV;
1989 #endif
1990 }
1991
1992 /*
1993 * isp_remove - Remove ISP platform device
1994 * @pdev: Pointer to ISP platform device
1995 *
1996 * Always returns 0.
1997 */
1998 static int isp_remove(struct platform_device *pdev)
1999 {
2000 struct isp_device *isp = platform_get_drvdata(pdev);
2001
2002 v4l2_async_notifier_unregister(&isp->notifier);
2003 isp_unregister_entities(isp);
2004 isp_cleanup_modules(isp);
2005 isp_xclk_cleanup(isp);
2006
2007 __omap3isp_get(isp, false);
2008 isp_detach_iommu(isp);
2009 __omap3isp_put(isp, false);
2010
2011 media_entity_enum_cleanup(&isp->crashed);
2012 v4l2_async_notifier_cleanup(&isp->notifier);
2013
2014 kfree(isp);
2015
2016 return 0;
2017 }
2018
2019 enum isp_of_phy {
2020 ISP_OF_PHY_PARALLEL = 0,
2021 ISP_OF_PHY_CSIPHY1,
2022 ISP_OF_PHY_CSIPHY2,
2023 };
2024
2025 static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
2026 {
2027 struct isp_device *isp = container_of(async, struct isp_device,
2028 notifier);
2029 struct v4l2_device *v4l2_dev = &isp->v4l2_dev;
2030 struct v4l2_subdev *sd;
2031 int ret;
2032
2033 ret = media_entity_enum_init(&isp->crashed, &isp->media_dev);
2034 if (ret)
2035 return ret;
2036
2037 list_for_each_entry(sd, &v4l2_dev->subdevs, list) {
2038 if (sd->notifier != &isp->notifier)
2039 continue;
2040
2041 ret = isp_link_entity(isp, &sd->entity,
2042 v4l2_subdev_to_bus_cfg(sd)->interface);
2043 if (ret < 0)
2044 return ret;
2045 }
2046
2047 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2048 if (ret < 0)
2049 return ret;
2050
2051 return media_device_register(&isp->media_dev);
2052 }
2053
2054 static void isp_parse_of_parallel_endpoint(struct device *dev,
2055 struct v4l2_fwnode_endpoint *vep,
2056 struct isp_bus_cfg *buscfg)
2057 {
2058 buscfg->interface = ISP_INTERFACE_PARALLEL;
2059 buscfg->bus.parallel.data_lane_shift = vep->bus.parallel.data_shift;
2060 buscfg->bus.parallel.clk_pol =
2061 !!(vep->bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_FALLING);
2062 buscfg->bus.parallel.hs_pol =
2063 !!(vep->bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
2064 buscfg->bus.parallel.vs_pol =
2065 !!(vep->bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
2066 buscfg->bus.parallel.fld_pol =
2067 !!(vep->bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
2068 buscfg->bus.parallel.data_pol =
2069 !!(vep->bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
2070 buscfg->bus.parallel.bt656 = vep->bus_type == V4L2_MBUS_BT656;
2071 }
2072
2073 static void isp_parse_of_csi2_endpoint(struct device *dev,
2074 struct v4l2_fwnode_endpoint *vep,
2075 struct isp_bus_cfg *buscfg)
2076 {
2077 unsigned int i;
2078
2079 buscfg->bus.csi2.lanecfg.clk.pos = vep->bus.mipi_csi2.clock_lane;
2080 buscfg->bus.csi2.lanecfg.clk.pol =
2081 vep->bus.mipi_csi2.lane_polarities[0];
2082 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2083 buscfg->bus.csi2.lanecfg.clk.pol,
2084 buscfg->bus.csi2.lanecfg.clk.pos);
2085
2086 buscfg->bus.csi2.num_data_lanes = vep->bus.mipi_csi2.num_data_lanes;
2087
2088 for (i = 0; i < buscfg->bus.csi2.num_data_lanes; i++) {
2089 buscfg->bus.csi2.lanecfg.data[i].pos =
2090 vep->bus.mipi_csi2.data_lanes[i];
2091 buscfg->bus.csi2.lanecfg.data[i].pol =
2092 vep->bus.mipi_csi2.lane_polarities[i + 1];
2093 dev_dbg(dev,
2094 "data lane %u polarity %u, pos %u\n", i,
2095 buscfg->bus.csi2.lanecfg.data[i].pol,
2096 buscfg->bus.csi2.lanecfg.data[i].pos);
2097 }
2098 /*
2099 * FIXME: now we assume the CRC is always there. Implement a way to
2100 * obtain this information from the sensor. Frame descriptors, perhaps?
2101 */
2102 buscfg->bus.csi2.crc = 1;
2103 }
2104
2105 static void isp_parse_of_csi1_endpoint(struct device *dev,
2106 struct v4l2_fwnode_endpoint *vep,
2107 struct isp_bus_cfg *buscfg)
2108 {
2109 buscfg->bus.ccp2.lanecfg.clk.pos = vep->bus.mipi_csi1.clock_lane;
2110 buscfg->bus.ccp2.lanecfg.clk.pol = vep->bus.mipi_csi1.lane_polarity[0];
2111 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2112 buscfg->bus.ccp2.lanecfg.clk.pol,
2113 buscfg->bus.ccp2.lanecfg.clk.pos);
2114
2115 buscfg->bus.ccp2.lanecfg.data[0].pos = vep->bus.mipi_csi1.data_lane;
2116 buscfg->bus.ccp2.lanecfg.data[0].pol =
2117 vep->bus.mipi_csi1.lane_polarity[1];
2118
2119 dev_dbg(dev, "data lane polarity %u, pos %u\n",
2120 buscfg->bus.ccp2.lanecfg.data[0].pol,
2121 buscfg->bus.ccp2.lanecfg.data[0].pos);
2122
2123 buscfg->bus.ccp2.strobe_clk_pol = vep->bus.mipi_csi1.clock_inv;
2124 buscfg->bus.ccp2.phy_layer = vep->bus.mipi_csi1.strobe;
2125 buscfg->bus.ccp2.ccp2_mode = vep->bus_type == V4L2_MBUS_CCP2;
2126 buscfg->bus.ccp2.vp_clk_pol = 1;
2127
2128 buscfg->bus.ccp2.crc = 1;
2129 }
2130
2131 static int isp_alloc_isd(struct isp_async_subdev **isd,
2132 struct isp_bus_cfg **buscfg)
2133 {
2134 struct isp_async_subdev *__isd;
2135
2136 __isd = kzalloc(sizeof(*__isd), GFP_KERNEL);
2137 if (!__isd)
2138 return -ENOMEM;
2139
2140 *isd = __isd;
2141 *buscfg = &__isd->bus;
2142
2143 return 0;
2144 }
2145
2146 static struct {
2147 u32 phy;
2148 u32 csi2_if;
2149 u32 csi1_if;
2150 } isp_bus_interfaces[2] = {
2151 { ISP_OF_PHY_CSIPHY1,
2152 ISP_INTERFACE_CSI2C_PHY1, ISP_INTERFACE_CCP2B_PHY1 },
2153 { ISP_OF_PHY_CSIPHY2,
2154 ISP_INTERFACE_CSI2A_PHY2, ISP_INTERFACE_CCP2B_PHY2 },
2155 };
2156
2157 static int isp_parse_of_endpoints(struct isp_device *isp)
2158 {
2159 struct fwnode_handle *ep;
2160 struct isp_async_subdev *isd = NULL;
2161 struct isp_bus_cfg *buscfg;
2162 unsigned int i;
2163
2164 ep = fwnode_graph_get_endpoint_by_id(
2165 dev_fwnode(isp->dev), ISP_OF_PHY_PARALLEL, 0,
2166 FWNODE_GRAPH_ENDPOINT_NEXT);
2167
2168 if (ep) {
2169 struct v4l2_fwnode_endpoint vep = {
2170 .bus_type = V4L2_MBUS_PARALLEL
2171 };
2172 int ret;
2173
2174 dev_dbg(isp->dev, "parsing parallel interface\n");
2175
2176 ret = v4l2_fwnode_endpoint_parse(ep, &vep);
2177
2178 if (!ret) {
2179 ret = isp_alloc_isd(&isd, &buscfg);
2180 if (ret)
2181 return ret;
2182 }
2183
2184 if (!ret) {
2185 isp_parse_of_parallel_endpoint(isp->dev, &vep, buscfg);
2186 ret = v4l2_async_notifier_add_fwnode_remote_subdev(
2187 &isp->notifier, ep, &isd->asd);
2188 }
2189
2190 fwnode_handle_put(ep);
2191 if (ret)
2192 kfree(isd);
2193 }
2194
2195 for (i = 0; i < ARRAY_SIZE(isp_bus_interfaces); i++) {
2196 struct v4l2_fwnode_endpoint vep = {
2197 .bus_type = V4L2_MBUS_CSI2_DPHY
2198 };
2199 int ret;
2200
2201 ep = fwnode_graph_get_endpoint_by_id(
2202 dev_fwnode(isp->dev), isp_bus_interfaces[i].phy, 0,
2203 FWNODE_GRAPH_ENDPOINT_NEXT);
2204
2205 if (!ep)
2206 continue;
2207
2208 dev_dbg(isp->dev, "parsing serial interface %u, node %pOF\n", i,
2209 to_of_node(ep));
2210
2211 ret = isp_alloc_isd(&isd, &buscfg);
2212 if (ret)
2213 return ret;
2214
2215 ret = v4l2_fwnode_endpoint_parse(ep, &vep);
2216 if (!ret) {
2217 buscfg->interface = isp_bus_interfaces[i].csi2_if;
2218 isp_parse_of_csi2_endpoint(isp->dev, &vep, buscfg);
2219 } else if (ret == -ENXIO) {
2220 vep = (struct v4l2_fwnode_endpoint)
2221 { .bus_type = V4L2_MBUS_CSI1 };
2222 ret = v4l2_fwnode_endpoint_parse(ep, &vep);
2223
2224 if (ret == -ENXIO) {
2225 vep = (struct v4l2_fwnode_endpoint)
2226 { .bus_type = V4L2_MBUS_CCP2 };
2227 ret = v4l2_fwnode_endpoint_parse(ep, &vep);
2228 }
2229 if (!ret) {
2230 buscfg->interface =
2231 isp_bus_interfaces[i].csi1_if;
2232 isp_parse_of_csi1_endpoint(isp->dev, &vep,
2233 buscfg);
2234 }
2235 }
2236
2237 if (!ret)
2238 ret = v4l2_async_notifier_add_fwnode_remote_subdev(
2239 &isp->notifier, ep, &isd->asd);
2240
2241 fwnode_handle_put(ep);
2242 if (ret)
2243 kfree(isd);
2244 }
2245
2246 return 0;
2247 }
2248
2249 static const struct v4l2_async_notifier_operations isp_subdev_notifier_ops = {
2250 .complete = isp_subdev_notifier_complete,
2251 };
2252
2253 /*
2254 * isp_probe - Probe ISP platform device
2255 * @pdev: Pointer to ISP platform device
2256 *
2257 * Returns 0 if successful,
2258 * -ENOMEM if no memory available,
2259 * -ENODEV if no platform device resources found
2260 * or no space for remapping registers,
2261 * -EINVAL if couldn't install ISR,
2262 * or clk_get return error value.
2263 */
2264 static int isp_probe(struct platform_device *pdev)
2265 {
2266 struct isp_device *isp;
2267 struct resource *mem;
2268 int ret;
2269 int i, m;
2270
2271 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2272 if (!isp) {
2273 dev_err(&pdev->dev, "could not allocate memory\n");
2274 return -ENOMEM;
2275 }
2276
2277 ret = fwnode_property_read_u32(of_fwnode_handle(pdev->dev.of_node),
2278 "ti,phy-type", &isp->phy_type);
2279 if (ret)
2280 goto error_release_isp;
2281
2282 isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
2283 "syscon");
2284 if (IS_ERR(isp->syscon)) {
2285 ret = PTR_ERR(isp->syscon);
2286 goto error_release_isp;
2287 }
2288
2289 ret = of_property_read_u32_index(pdev->dev.of_node,
2290 "syscon", 1, &isp->syscon_offset);
2291 if (ret)
2292 goto error_release_isp;
2293
2294 isp->autoidle = autoidle;
2295
2296 mutex_init(&isp->isp_mutex);
2297 spin_lock_init(&isp->stat_lock);
2298 v4l2_async_notifier_init(&isp->notifier);
2299 isp->dev = &pdev->dev;
2300
2301 ret = isp_parse_of_endpoints(isp);
2302 if (ret < 0)
2303 goto error;
2304
2305 isp->ref_count = 0;
2306
2307 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2308 if (ret)
2309 goto error;
2310
2311 platform_set_drvdata(pdev, isp);
2312
2313 /* Regulators */
2314 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
2315 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
2316
2317 /* Clocks
2318 *
2319 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2320 * manually to read the revision before calling __omap3isp_get().
2321 *
2322 * Start by mapping the ISP MMIO area, which is in two pieces.
2323 * The ISP IOMMU is in between. Map both now, and fill in the
2324 * ISP revision specific portions a little later in the
2325 * function.
2326 */
2327 for (i = 0; i < 2; i++) {
2328 unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
2329
2330 mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
2331 isp->mmio_base[map_idx] =
2332 devm_ioremap_resource(isp->dev, mem);
2333 if (IS_ERR(isp->mmio_base[map_idx]))
2334 return PTR_ERR(isp->mmio_base[map_idx]);
2335 }
2336
2337 ret = isp_get_clocks(isp);
2338 if (ret < 0)
2339 goto error;
2340
2341 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2342 if (ret < 0)
2343 goto error;
2344
2345 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2346 dev_info(isp->dev, "Revision %d.%d found\n",
2347 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2348
2349 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2350
2351 if (__omap3isp_get(isp, false) == NULL) {
2352 ret = -ENODEV;
2353 goto error;
2354 }
2355
2356 ret = isp_reset(isp);
2357 if (ret < 0)
2358 goto error_isp;
2359
2360 ret = isp_xclk_init(isp);
2361 if (ret < 0)
2362 goto error_isp;
2363
2364 /* Memory resources */
2365 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2366 if (isp->revision == isp_res_maps[m].isp_rev)
2367 break;
2368
2369 if (m == ARRAY_SIZE(isp_res_maps)) {
2370 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2371 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2372 ret = -ENODEV;
2373 goto error_isp;
2374 }
2375
2376 for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
2377 isp->mmio_base[i] =
2378 isp->mmio_base[0] + isp_res_maps[m].offset[i];
2379
2380 for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
2381 isp->mmio_base[i] =
2382 isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
2383 + isp_res_maps[m].offset[i];
2384
2385 isp->mmio_hist_base_phys =
2386 mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
2387
2388 /* IOMMU */
2389 ret = isp_attach_iommu(isp);
2390 if (ret < 0) {
2391 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
2392 goto error_isp;
2393 }
2394
2395 /* Interrupt */
2396 ret = platform_get_irq(pdev, 0);
2397 if (ret <= 0) {
2398 ret = -ENODEV;
2399 goto error_iommu;
2400 }
2401 isp->irq_num = ret;
2402
2403 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2404 "OMAP3 ISP", isp)) {
2405 dev_err(isp->dev, "Unable to request IRQ\n");
2406 ret = -EINVAL;
2407 goto error_iommu;
2408 }
2409
2410 /* Entities */
2411 ret = isp_initialize_modules(isp);
2412 if (ret < 0)
2413 goto error_iommu;
2414
2415 ret = isp_register_entities(isp);
2416 if (ret < 0)
2417 goto error_modules;
2418
2419 ret = isp_create_links(isp);
2420 if (ret < 0)
2421 goto error_register_entities;
2422
2423 isp->notifier.ops = &isp_subdev_notifier_ops;
2424
2425 ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
2426 if (ret)
2427 goto error_register_entities;
2428
2429 isp_core_init(isp, 1);
2430 omap3isp_put(isp);
2431
2432 return 0;
2433
2434 error_register_entities:
2435 isp_unregister_entities(isp);
2436 error_modules:
2437 isp_cleanup_modules(isp);
2438 error_iommu:
2439 isp_detach_iommu(isp);
2440 error_isp:
2441 isp_xclk_cleanup(isp);
2442 __omap3isp_put(isp, false);
2443 error:
2444 v4l2_async_notifier_cleanup(&isp->notifier);
2445 mutex_destroy(&isp->isp_mutex);
2446 error_release_isp:
2447 kfree(isp);
2448
2449 return ret;
2450 }
2451
2452 static const struct dev_pm_ops omap3isp_pm_ops = {
2453 .prepare = isp_pm_prepare,
2454 .suspend = isp_pm_suspend,
2455 .resume = isp_pm_resume,
2456 .complete = isp_pm_complete,
2457 };
2458
2459 static const struct platform_device_id omap3isp_id_table[] = {
2460 { "omap3isp", 0 },
2461 { },
2462 };
2463 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2464
2465 static const struct of_device_id omap3isp_of_table[] = {
2466 { .compatible = "ti,omap3-isp" },
2467 { },
2468 };
2469 MODULE_DEVICE_TABLE(of, omap3isp_of_table);
2470
2471 static struct platform_driver omap3isp_driver = {
2472 .probe = isp_probe,
2473 .remove = isp_remove,
2474 .id_table = omap3isp_id_table,
2475 .driver = {
2476 .name = "omap3isp",
2477 .pm = &omap3isp_pm_ops,
2478 .of_match_table = omap3isp_of_table,
2479 },
2480 };
2481
2482 module_platform_driver(omap3isp_driver);
2483
2484 MODULE_AUTHOR("Nokia Corporation");
2485 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2486 MODULE_LICENSE("GPL");
2487 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Linux with added FPC-III support