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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / media / platform / omap3isp / ispccdc.c
blob471ae7cdb8133c3d3c754fcf44c6fe6d5725d74c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * ispccdc.c
4 *
5 * TI OMAP3 ISP - CCDC module
6 *
7 * Copyright (C) 2009-2010 Nokia Corporation
8 * Copyright (C) 2009 Texas Instruments, Inc.
9 *
10 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 * Sakari Ailus <sakari.ailus@iki.fi>
12 */
13
14 #include <linux/module.h>
15 #include <linux/uaccess.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/mm.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <media/v4l2-event.h>
23
24 #include "isp.h"
25 #include "ispreg.h"
26 #include "ispccdc.h"
27
28 #define CCDC_MIN_WIDTH 32
29 #define CCDC_MIN_HEIGHT 32
30
31 static struct v4l2_mbus_framefmt *
32 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
33 unsigned int pad, enum v4l2_subdev_format_whence which);
34
35 static const unsigned int ccdc_fmts[] = {
36 MEDIA_BUS_FMT_Y8_1X8,
37 MEDIA_BUS_FMT_Y10_1X10,
38 MEDIA_BUS_FMT_Y12_1X12,
39 MEDIA_BUS_FMT_SGRBG8_1X8,
40 MEDIA_BUS_FMT_SRGGB8_1X8,
41 MEDIA_BUS_FMT_SBGGR8_1X8,
42 MEDIA_BUS_FMT_SGBRG8_1X8,
43 MEDIA_BUS_FMT_SGRBG10_1X10,
44 MEDIA_BUS_FMT_SRGGB10_1X10,
45 MEDIA_BUS_FMT_SBGGR10_1X10,
46 MEDIA_BUS_FMT_SGBRG10_1X10,
47 MEDIA_BUS_FMT_SGRBG12_1X12,
48 MEDIA_BUS_FMT_SRGGB12_1X12,
49 MEDIA_BUS_FMT_SBGGR12_1X12,
50 MEDIA_BUS_FMT_SGBRG12_1X12,
51 MEDIA_BUS_FMT_YUYV8_2X8,
52 MEDIA_BUS_FMT_UYVY8_2X8,
53 };
54
55 /*
56 * ccdc_print_status - Print current CCDC Module register values.
57 * @ccdc: Pointer to ISP CCDC device.
58 *
59 * Also prints other debug information stored in the CCDC module.
60 */
61 #define CCDC_PRINT_REGISTER(isp, name)\
62 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
63 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
64
65 static void ccdc_print_status(struct isp_ccdc_device *ccdc)
66 {
67 struct isp_device *isp = to_isp_device(ccdc);
68
69 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
70
71 CCDC_PRINT_REGISTER(isp, PCR);
72 CCDC_PRINT_REGISTER(isp, SYN_MODE);
73 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
74 CCDC_PRINT_REGISTER(isp, PIX_LINES);
75 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
76 CCDC_PRINT_REGISTER(isp, VERT_START);
77 CCDC_PRINT_REGISTER(isp, VERT_LINES);
78 CCDC_PRINT_REGISTER(isp, CULLING);
79 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
80 CCDC_PRINT_REGISTER(isp, SDOFST);
81 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
82 CCDC_PRINT_REGISTER(isp, CLAMP);
83 CCDC_PRINT_REGISTER(isp, DCSUB);
84 CCDC_PRINT_REGISTER(isp, COLPTN);
85 CCDC_PRINT_REGISTER(isp, BLKCMP);
86 CCDC_PRINT_REGISTER(isp, FPC);
87 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
88 CCDC_PRINT_REGISTER(isp, VDINT);
89 CCDC_PRINT_REGISTER(isp, ALAW);
90 CCDC_PRINT_REGISTER(isp, REC656IF);
91 CCDC_PRINT_REGISTER(isp, CFG);
92 CCDC_PRINT_REGISTER(isp, FMTCFG);
93 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
94 CCDC_PRINT_REGISTER(isp, FMT_VERT);
95 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
96 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
97 CCDC_PRINT_REGISTER(isp, PRGODD0);
98 CCDC_PRINT_REGISTER(isp, PRGODD1);
99 CCDC_PRINT_REGISTER(isp, VP_OUT);
100 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
101 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
102 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
103 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
104
105 dev_dbg(isp->dev, "--------------------------------------------\n");
106 }
107
108 /*
109 * omap3isp_ccdc_busy - Get busy state of the CCDC.
110 * @ccdc: Pointer to ISP CCDC device.
111 */
112 int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
113 {
114 struct isp_device *isp = to_isp_device(ccdc);
115
116 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
117 ISPCCDC_PCR_BUSY;
118 }
119
120 /* -----------------------------------------------------------------------------
121 * Lens Shading Compensation
122 */
123
124 /*
125 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
126 * @ccdc: Pointer to ISP CCDC device.
127 * @lsc_cfg: the LSC configuration to check.
128 *
129 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
130 */
131 static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
132 struct omap3isp_ccdc_lsc_config *lsc_cfg)
133 {
134 struct isp_device *isp = to_isp_device(ccdc);
135 struct v4l2_mbus_framefmt *format;
136 unsigned int paxel_width, paxel_height;
137 unsigned int paxel_shift_x, paxel_shift_y;
138 unsigned int min_width, min_height, min_size;
139 unsigned int input_width, input_height;
140
141 paxel_shift_x = lsc_cfg->gain_mode_m;
142 paxel_shift_y = lsc_cfg->gain_mode_n;
143
144 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
145 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
146 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
147 return -EINVAL;
148 }
149
150 if (lsc_cfg->offset & 3) {
151 dev_dbg(isp->dev,
152 "CCDC: LSC: Offset must be a multiple of 4\n");
153 return -EINVAL;
154 }
155
156 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
157 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
158 return -EINVAL;
159 }
160
161 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
162 V4L2_SUBDEV_FORMAT_ACTIVE);
163 input_width = format->width;
164 input_height = format->height;
165
166 /* Calculate minimum bytesize for validation */
167 paxel_width = 1 << paxel_shift_x;
168 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
169 >> paxel_shift_x) + 1;
170
171 paxel_height = 1 << paxel_shift_y;
172 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
173 >> paxel_shift_y) + 1;
174
175 min_size = 4 * min_width * min_height;
176 if (min_size > lsc_cfg->size) {
177 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
178 return -EINVAL;
179 }
180 if (lsc_cfg->offset < (min_width * 4)) {
181 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
182 return -EINVAL;
183 }
184 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
185 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
186 return -EINVAL;
187 }
188 return 0;
189 }
190
191 /*
192 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
193 * @ccdc: Pointer to ISP CCDC device.
194 */
195 static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
196 dma_addr_t addr)
197 {
198 isp_reg_writel(to_isp_device(ccdc), addr,
199 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
200 }
201
202 /*
203 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
204 * @ccdc: Pointer to ISP CCDC device.
205 */
206 static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
207 struct omap3isp_ccdc_lsc_config *cfg)
208 {
209 struct isp_device *isp = to_isp_device(ccdc);
210 int reg;
211
212 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
213 ISPCCDC_LSC_TABLE_OFFSET);
214
215 reg = 0;
216 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
217 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
218 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
219 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
220
221 reg = 0;
222 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
223 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
224 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
225 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
226 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
227 ISPCCDC_LSC_INITIAL);
228 }
229
230 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
231 {
232 struct isp_device *isp = to_isp_device(ccdc);
233 unsigned int wait;
234
235 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
236 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
237
238 /* timeout 1 ms */
239 for (wait = 0; wait < 1000; wait++) {
240 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
241 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
242 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
243 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
244 return 0;
245 }
246
247 rmb();
248 udelay(1);
249 }
250
251 return -ETIMEDOUT;
252 }
253
254 /*
255 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
256 * @ccdc: Pointer to ISP CCDC device.
257 * @enable: 0 Disables LSC, 1 Enables LSC.
258 */
259 static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
260 {
261 struct isp_device *isp = to_isp_device(ccdc);
262 const struct v4l2_mbus_framefmt *format =
263 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
264 V4L2_SUBDEV_FORMAT_ACTIVE);
265
266 if ((format->code != MEDIA_BUS_FMT_SGRBG10_1X10) &&
267 (format->code != MEDIA_BUS_FMT_SRGGB10_1X10) &&
268 (format->code != MEDIA_BUS_FMT_SBGGR10_1X10) &&
269 (format->code != MEDIA_BUS_FMT_SGBRG10_1X10))
270 return -EINVAL;
271
272 if (enable)
273 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
274
275 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
276 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
277
278 if (enable) {
279 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
280 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
281 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
282 ccdc->lsc.state = LSC_STATE_STOPPED;
283 dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
284 return -ETIMEDOUT;
285 }
286 ccdc->lsc.state = LSC_STATE_RUNNING;
287 } else {
288 ccdc->lsc.state = LSC_STATE_STOPPING;
289 }
290
291 return 0;
292 }
293
294 static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
295 {
296 struct isp_device *isp = to_isp_device(ccdc);
297
298 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
299 ISPCCDC_LSC_BUSY;
300 }
301
302 /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
303 * @ccdc: Pointer to ISP CCDC device
304 * @req: New configuration request
305 *
306 * context: in_interrupt()
307 */
308 static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
309 struct ispccdc_lsc_config_req *req)
310 {
311 if (!req->enable)
312 return -EINVAL;
313
314 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
315 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
316 return -EINVAL;
317 }
318
319 if (ccdc_lsc_busy(ccdc))
320 return -EBUSY;
321
322 ccdc_lsc_setup_regs(ccdc, &req->config);
323 ccdc_lsc_program_table(ccdc, req->table.dma);
324 return 0;
325 }
326
327 /*
328 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
329 * @ccdc: Pointer to ISP CCDC device.
330 *
331 * Disables LSC, and defers enablement to shadow registers update time.
332 */
333 static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
334 {
335 struct isp_device *isp = to_isp_device(ccdc);
336 /*
337 * From OMAP3 TRM: When this event is pending, the module
338 * goes into transparent mode (output =input). Normal
339 * operation can be resumed at the start of the next frame
340 * after:
341 * 1) Clearing this event
342 * 2) Disabling the LSC module
343 * 3) Enabling it
344 */
345 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
346 ISPCCDC_LSC_ENABLE);
347 ccdc->lsc.state = LSC_STATE_STOPPED;
348 }
349
350 static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
351 struct ispccdc_lsc_config_req *req)
352 {
353 struct isp_device *isp = to_isp_device(ccdc);
354
355 if (req == NULL)
356 return;
357
358 if (req->table.addr) {
359 sg_free_table(&req->table.sgt);
360 dma_free_coherent(isp->dev, req->config.size, req->table.addr,
361 req->table.dma);
362 }
363
364 kfree(req);
365 }
366
367 static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
368 struct list_head *queue)
369 {
370 struct ispccdc_lsc_config_req *req, *n;
371 unsigned long flags;
372
373 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
374 list_for_each_entry_safe(req, n, queue, list) {
375 list_del(&req->list);
376 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
377 ccdc_lsc_free_request(ccdc, req);
378 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
379 }
380 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
381 }
382
383 static void ccdc_lsc_free_table_work(struct work_struct *work)
384 {
385 struct isp_ccdc_device *ccdc;
386 struct ispccdc_lsc *lsc;
387
388 lsc = container_of(work, struct ispccdc_lsc, table_work);
389 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
390
391 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
392 }
393
394 /*
395 * ccdc_lsc_config - Configure the LSC module from a userspace request
396 *
397 * Store the request LSC configuration in the LSC engine request pointer. The
398 * configuration will be applied to the hardware when the CCDC will be enabled,
399 * or at the next LSC interrupt if the CCDC is already running.
400 */
401 static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
402 struct omap3isp_ccdc_update_config *config)
403 {
404 struct isp_device *isp = to_isp_device(ccdc);
405 struct ispccdc_lsc_config_req *req;
406 unsigned long flags;
407 u16 update;
408 int ret;
409
410 update = config->update &
411 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
412 if (!update)
413 return 0;
414
415 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
416 dev_dbg(to_device(ccdc),
417 "%s: Both LSC configuration and table need to be supplied\n",
418 __func__);
419 return -EINVAL;
420 }
421
422 req = kzalloc(sizeof(*req), GFP_KERNEL);
423 if (req == NULL)
424 return -ENOMEM;
425
426 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
427 if (copy_from_user(&req->config, config->lsc_cfg,
428 sizeof(req->config))) {
429 ret = -EFAULT;
430 goto done;
431 }
432
433 req->enable = 1;
434
435 req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
436 &req->table.dma,
437 GFP_KERNEL);
438 if (req->table.addr == NULL) {
439 ret = -ENOMEM;
440 goto done;
441 }
442
443 ret = dma_get_sgtable(isp->dev, &req->table.sgt,
444 req->table.addr, req->table.dma,
445 req->config.size);
446 if (ret < 0)
447 goto done;
448
449 dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
450 req->table.sgt.nents, DMA_TO_DEVICE);
451
452 if (copy_from_user(req->table.addr, config->lsc,
453 req->config.size)) {
454 ret = -EFAULT;
455 goto done;
456 }
457
458 dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
459 req->table.sgt.nents, DMA_TO_DEVICE);
460 }
461
462 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
463 if (ccdc->lsc.request) {
464 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
465 schedule_work(&ccdc->lsc.table_work);
466 }
467 ccdc->lsc.request = req;
468 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
469
470 ret = 0;
471
472 done:
473 if (ret < 0)
474 ccdc_lsc_free_request(ccdc, req);
475
476 return ret;
477 }
478
479 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
480 {
481 unsigned long flags;
482 int ret;
483
484 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
485 ret = ccdc->lsc.active != NULL;
486 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
487
488 return ret;
489 }
490
491 static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
492 {
493 struct ispccdc_lsc *lsc = &ccdc->lsc;
494
495 if (lsc->state != LSC_STATE_STOPPED)
496 return -EINVAL;
497
498 if (lsc->active) {
499 list_add_tail(&lsc->active->list, &lsc->free_queue);
500 lsc->active = NULL;
501 }
502
503 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
504 omap3isp_sbl_disable(to_isp_device(ccdc),
505 OMAP3_ISP_SBL_CCDC_LSC_READ);
506 list_add_tail(&lsc->request->list, &lsc->free_queue);
507 lsc->request = NULL;
508 goto done;
509 }
510
511 lsc->active = lsc->request;
512 lsc->request = NULL;
513 __ccdc_lsc_enable(ccdc, 1);
514
515 done:
516 if (!list_empty(&lsc->free_queue))
517 schedule_work(&lsc->table_work);
518
519 return 0;
520 }
521
522 /* -----------------------------------------------------------------------------
523 * Parameters configuration
524 */
525
526 /*
527 * ccdc_configure_clamp - Configure optical-black or digital clamping
528 * @ccdc: Pointer to ISP CCDC device.
529 *
530 * The CCDC performs either optical-black or digital clamp. Configure and enable
531 * the selected clamp method.
532 */
533 static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
534 {
535 struct isp_device *isp = to_isp_device(ccdc);
536 u32 clamp;
537
538 if (ccdc->obclamp) {
539 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
540 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
541 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
542 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
543 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
544 } else {
545 isp_reg_writel(isp, ccdc->clamp.dcsubval,
546 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
547 }
548
549 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
550 ISPCCDC_CLAMP_CLAMPEN,
551 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
552 }
553
554 /*
555 * ccdc_configure_fpc - Configure Faulty Pixel Correction
556 * @ccdc: Pointer to ISP CCDC device.
557 */
558 static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
559 {
560 struct isp_device *isp = to_isp_device(ccdc);
561
562 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
563
564 if (!ccdc->fpc_en)
565 return;
566
567 isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
568 ISPCCDC_FPC_ADDR);
569 /* The FPNUM field must be set before enabling FPC. */
570 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
571 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
572 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
573 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
574 }
575
576 /*
577 * ccdc_configure_black_comp - Configure Black Level Compensation.
578 * @ccdc: Pointer to ISP CCDC device.
579 */
580 static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
581 {
582 struct isp_device *isp = to_isp_device(ccdc);
583 u32 blcomp;
584
585 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
586 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
587 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
588 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
589
590 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
591 }
592
593 /*
594 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
595 * @ccdc: Pointer to ISP CCDC device.
596 */
597 static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
598 {
599 struct isp_device *isp = to_isp_device(ccdc);
600
601 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
602 ISPCCDC_SYN_MODE_LPF,
603 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
604 }
605
606 /*
607 * ccdc_configure_alaw - Configure A-law compression.
608 * @ccdc: Pointer to ISP CCDC device.
609 */
610 static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
611 {
612 struct isp_device *isp = to_isp_device(ccdc);
613 const struct isp_format_info *info;
614 u32 alaw = 0;
615
616 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
617
618 switch (info->width) {
619 case 8:
620 return;
621
622 case 10:
623 alaw = ISPCCDC_ALAW_GWDI_9_0;
624 break;
625 case 11:
626 alaw = ISPCCDC_ALAW_GWDI_10_1;
627 break;
628 case 12:
629 alaw = ISPCCDC_ALAW_GWDI_11_2;
630 break;
631 case 13:
632 alaw = ISPCCDC_ALAW_GWDI_12_3;
633 break;
634 }
635
636 if (ccdc->alaw)
637 alaw |= ISPCCDC_ALAW_CCDTBL;
638
639 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
640 }
641
642 /*
643 * ccdc_config_imgattr - Configure sensor image specific attributes.
644 * @ccdc: Pointer to ISP CCDC device.
645 * @colptn: Color pattern of the sensor.
646 */
647 static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
648 {
649 struct isp_device *isp = to_isp_device(ccdc);
650
651 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
652 }
653
654 /*
655 * ccdc_config - Set CCDC configuration from userspace
656 * @ccdc: Pointer to ISP CCDC device.
657 * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
658 *
659 * Returns 0 if successful, -EINVAL if the pointer to the configuration
660 * structure is null, or the copy_from_user function fails to copy user space
661 * memory to kernel space memory.
662 */
663 static int ccdc_config(struct isp_ccdc_device *ccdc,
664 struct omap3isp_ccdc_update_config *ccdc_struct)
665 {
666 struct isp_device *isp = to_isp_device(ccdc);
667 unsigned long flags;
668
669 spin_lock_irqsave(&ccdc->lock, flags);
670 ccdc->shadow_update = 1;
671 spin_unlock_irqrestore(&ccdc->lock, flags);
672
673 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
674 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
675 ccdc->update |= OMAP3ISP_CCDC_ALAW;
676 }
677
678 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
679 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
680 ccdc->update |= OMAP3ISP_CCDC_LPF;
681 }
682
683 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
684 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
685 sizeof(ccdc->clamp))) {
686 ccdc->shadow_update = 0;
687 return -EFAULT;
688 }
689
690 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
691 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
692 }
693
694 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
695 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
696 sizeof(ccdc->blcomp))) {
697 ccdc->shadow_update = 0;
698 return -EFAULT;
699 }
700
701 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
702 }
703
704 ccdc->shadow_update = 0;
705
706 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
707 struct omap3isp_ccdc_fpc fpc;
708 struct ispccdc_fpc fpc_old = { .addr = NULL, };
709 struct ispccdc_fpc fpc_new;
710 u32 size;
711
712 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
713 return -EBUSY;
714
715 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
716
717 if (ccdc->fpc_en) {
718 if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
719 return -EFAULT;
720
721 size = fpc.fpnum * 4;
722
723 /*
724 * The table address must be 64-bytes aligned, which is
725 * guaranteed by dma_alloc_coherent().
726 */
727 fpc_new.fpnum = fpc.fpnum;
728 fpc_new.addr = dma_alloc_coherent(isp->dev, size,
729 &fpc_new.dma,
730 GFP_KERNEL);
731 if (fpc_new.addr == NULL)
732 return -ENOMEM;
733
734 if (copy_from_user(fpc_new.addr,
735 (__force void __user *)(long)fpc.fpcaddr,
736 size)) {
737 dma_free_coherent(isp->dev, size, fpc_new.addr,
738 fpc_new.dma);
739 return -EFAULT;
740 }
741
742 fpc_old = ccdc->fpc;
743 ccdc->fpc = fpc_new;
744 }
745
746 ccdc_configure_fpc(ccdc);
747
748 if (fpc_old.addr != NULL)
749 dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
750 fpc_old.addr, fpc_old.dma);
751 }
752
753 return ccdc_lsc_config(ccdc, ccdc_struct);
754 }
755
756 static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
757 {
758 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
759 ccdc_configure_alaw(ccdc);
760 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
761 }
762
763 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
764 ccdc_configure_lpf(ccdc);
765 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
766 }
767
768 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
769 ccdc_configure_clamp(ccdc);
770 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
771 }
772
773 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
774 ccdc_configure_black_comp(ccdc);
775 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
776 }
777 }
778
779 /*
780 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
781 * @isp: Pointer to ISP device
782 */
783 void omap3isp_ccdc_restore_context(struct isp_device *isp)
784 {
785 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
786
787 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
788
789 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
790 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
791 ccdc_apply_controls(ccdc);
792 ccdc_configure_fpc(ccdc);
793 }
794
795 /* -----------------------------------------------------------------------------
796 * Format- and pipeline-related configuration helpers
797 */
798
799 /*
800 * ccdc_config_vp - Configure the Video Port.
801 * @ccdc: Pointer to ISP CCDC device.
802 */
803 static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
804 {
805 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
806 struct isp_device *isp = to_isp_device(ccdc);
807 const struct isp_format_info *info;
808 struct v4l2_mbus_framefmt *format;
809 unsigned long l3_ick = pipe->l3_ick;
810 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
811 unsigned int div = 0;
812 u32 fmtcfg = ISPCCDC_FMTCFG_VPEN;
813
814 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
815
816 if (!format->code) {
817 /* Disable the video port when the input format isn't supported.
818 * This is indicated by a pixel code set to 0.
819 */
820 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
821 return;
822 }
823
824 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
825 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
826 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
827 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
828 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
829 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
830
831 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
832 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
833 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
834
835 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
836
837 switch (info->width) {
838 case 8:
839 case 10:
840 fmtcfg |= ISPCCDC_FMTCFG_VPIN_9_0;
841 break;
842 case 11:
843 fmtcfg |= ISPCCDC_FMTCFG_VPIN_10_1;
844 break;
845 case 12:
846 fmtcfg |= ISPCCDC_FMTCFG_VPIN_11_2;
847 break;
848 case 13:
849 fmtcfg |= ISPCCDC_FMTCFG_VPIN_12_3;
850 break;
851 }
852
853 if (pipe->input)
854 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
855 else if (pipe->external_rate)
856 div = l3_ick / pipe->external_rate;
857
858 div = clamp(div, 2U, max_div);
859 fmtcfg |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
860
861 isp_reg_writel(isp, fmtcfg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
862 }
863
864 /*
865 * ccdc_config_outlineoffset - Configure memory saving output line offset
866 * @ccdc: Pointer to ISP CCDC device.
867 * @bpl: Number of bytes per line when stored in memory.
868 * @field: Field order when storing interlaced formats in memory.
869 *
870 * Configure the offsets for the line output control:
871 *
872 * - The horizontal line offset is defined as the number of bytes between the
873 * start of two consecutive lines in memory. Set it to the given bytes per
874 * line value.
875 *
876 * - The field offset value is defined as the number of lines to offset the
877 * start of the field identified by FID = 1. Set it to one.
878 *
879 * - The line offset values are defined as the number of lines (as defined by
880 * the horizontal line offset) between the start of two consecutive lines for
881 * all combinations of odd/even lines in odd/even fields. When interleaving
882 * fields set them all to two lines, and to one line otherwise.
883 */
884 static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
885 unsigned int bpl,
886 enum v4l2_field field)
887 {
888 struct isp_device *isp = to_isp_device(ccdc);
889 u32 sdofst = 0;
890
891 isp_reg_writel(isp, bpl & 0xffff, OMAP3_ISP_IOMEM_CCDC,
892 ISPCCDC_HSIZE_OFF);
893
894 switch (field) {
895 case V4L2_FIELD_INTERLACED_TB:
896 case V4L2_FIELD_INTERLACED_BT:
897 /* When interleaving fields in memory offset field one by one
898 * line and set the line offset to two lines.
899 */
900 sdofst |= (1 << ISPCCDC_SDOFST_LOFST0_SHIFT)
901 | (1 << ISPCCDC_SDOFST_LOFST1_SHIFT)
902 | (1 << ISPCCDC_SDOFST_LOFST2_SHIFT)
903 | (1 << ISPCCDC_SDOFST_LOFST3_SHIFT);
904 break;
905
906 default:
907 /* In all other cases set the line offsets to one line. */
908 break;
909 }
910
911 isp_reg_writel(isp, sdofst, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST);
912 }
913
914 /*
915 * ccdc_set_outaddr - Set memory address to save output image
916 * @ccdc: Pointer to ISP CCDC device.
917 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
918 *
919 * Sets the memory address where the output will be saved.
920 */
921 static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
922 {
923 struct isp_device *isp = to_isp_device(ccdc);
924
925 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
926 }
927
928 /*
929 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
930 * @ccdc: Pointer to ISP CCDC device.
931 * @max_rate: Maximum calculated data rate.
932 *
933 * Returns in *max_rate less value between calculated and passed
934 */
935 void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
936 unsigned int *max_rate)
937 {
938 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
939 unsigned int rate;
940
941 if (pipe == NULL)
942 return;
943
944 /*
945 * TRM says that for parallel sensors the maximum data rate
946 * should be 90% form L3/2 clock, otherwise just L3/2.
947 */
948 if (ccdc->input == CCDC_INPUT_PARALLEL)
949 rate = pipe->l3_ick / 2 * 9 / 10;
950 else
951 rate = pipe->l3_ick / 2;
952
953 *max_rate = min(*max_rate, rate);
954 }
955
956 /*
957 * ccdc_config_sync_if - Set CCDC sync interface configuration
958 * @ccdc: Pointer to ISP CCDC device.
959 * @parcfg: Parallel interface platform data (may be NULL)
960 * @data_size: Data size
961 */
962 static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
963 struct isp_parallel_cfg *parcfg,
964 unsigned int data_size)
965 {
966 struct isp_device *isp = to_isp_device(ccdc);
967 const struct v4l2_mbus_framefmt *format;
968 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
969
970 format = &ccdc->formats[CCDC_PAD_SINK];
971
972 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
973 format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
974 /* According to the OMAP3 TRM the input mode only affects SYNC
975 * mode, enabling BT.656 mode should take precedence. However,
976 * in practice setting the input mode to YCbCr data on 8 bits
977 * seems to be required in BT.656 mode. In SYNC mode set it to
978 * YCbCr on 16 bits as the bridge is enabled in that case.
979 */
980 if (ccdc->bt656)
981 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR8;
982 else
983 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
984 }
985
986 switch (data_size) {
987 case 8:
988 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
989 break;
990 case 10:
991 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
992 break;
993 case 11:
994 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
995 break;
996 case 12:
997 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
998 break;
999 }
1000
1001 if (parcfg && parcfg->data_pol)
1002 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
1003
1004 if (parcfg && parcfg->hs_pol)
1005 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1006
1007 /* The polarity of the vertical sync signal output by the BT.656
1008 * decoder is not documented and seems to be active low.
1009 */
1010 if ((parcfg && parcfg->vs_pol) || ccdc->bt656)
1011 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1012
1013 if (parcfg && parcfg->fld_pol)
1014 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1015
1016 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1017
1018 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1019 * hardware seems to ignore it in all other input modes.
1020 */
1021 if (format->code == MEDIA_BUS_FMT_UYVY8_2X8)
1022 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1023 ISPCCDC_CFG_Y8POS);
1024 else
1025 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1026 ISPCCDC_CFG_Y8POS);
1027
1028 /* Enable or disable BT.656 mode, including error correction for the
1029 * synchronization codes.
1030 */
1031 if (ccdc->bt656)
1032 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1033 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1034 else
1035 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1036 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1037
1038 }
1039
1040 /* CCDC formats descriptions */
1041 static const u32 ccdc_sgrbg_pattern =
1042 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1043 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1044 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1045 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1046 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1047 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1048 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1049 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1050 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1051 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1052 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1053 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1054 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1055 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1056 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1057 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1058
1059 static const u32 ccdc_srggb_pattern =
1060 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1061 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1062 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1063 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1064 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1065 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1066 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1067 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1068 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1069 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1070 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1071 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1072 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1073 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1074 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1075 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1076
1077 static const u32 ccdc_sbggr_pattern =
1078 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1079 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1080 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1081 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1082 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1083 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1084 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1085 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1086 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1087 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1088 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1089 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1090 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1091 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1092 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1093 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1094
1095 static const u32 ccdc_sgbrg_pattern =
1096 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1097 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1098 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1099 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1100 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1101 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1102 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1103 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1104 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1105 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1106 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1107 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1108 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1109 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1110 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1111 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1112
1113 static void ccdc_configure(struct isp_ccdc_device *ccdc)
1114 {
1115 struct isp_device *isp = to_isp_device(ccdc);
1116 struct isp_parallel_cfg *parcfg = NULL;
1117 struct v4l2_subdev *sensor;
1118 struct v4l2_mbus_framefmt *format;
1119 const struct v4l2_rect *crop;
1120 const struct isp_format_info *fmt_info;
1121 struct v4l2_subdev_format fmt_src;
1122 unsigned int depth_out;
1123 unsigned int depth_in = 0;
1124 struct media_pad *pad;
1125 unsigned long flags;
1126 unsigned int bridge;
1127 unsigned int shift;
1128 unsigned int nph;
1129 unsigned int sph;
1130 u32 syn_mode;
1131 u32 ccdc_pattern;
1132
1133 ccdc->bt656 = false;
1134 ccdc->fields = 0;
1135
1136 pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
1137 sensor = media_entity_to_v4l2_subdev(pad->entity);
1138 if (ccdc->input == CCDC_INPUT_PARALLEL) {
1139 struct v4l2_subdev *sd =
1140 to_isp_pipeline(&ccdc->subdev.entity)->external;
1141
1142 parcfg = &v4l2_subdev_to_bus_cfg(sd)->bus.parallel;
1143 ccdc->bt656 = parcfg->bt656;
1144 }
1145
1146 /* CCDC_PAD_SINK */
1147 format = &ccdc->formats[CCDC_PAD_SINK];
1148
1149 /* Compute the lane shifter shift value and enable the bridge when the
1150 * input format is a non-BT.656 YUV variant.
1151 */
1152 fmt_src.pad = pad->index;
1153 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1154 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1155 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1156 depth_in = fmt_info->width;
1157 }
1158
1159 fmt_info = omap3isp_video_format_info(format->code);
1160 depth_out = fmt_info->width;
1161 shift = depth_in - depth_out;
1162
1163 if (ccdc->bt656)
1164 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1165 else if (fmt_info->code == MEDIA_BUS_FMT_YUYV8_2X8)
1166 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1167 else if (fmt_info->code == MEDIA_BUS_FMT_UYVY8_2X8)
1168 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1169 else
1170 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1171
1172 omap3isp_configure_bridge(isp, ccdc->input, parcfg, shift, bridge);
1173
1174 /* Configure the sync interface. */
1175 ccdc_config_sync_if(ccdc, parcfg, depth_out);
1176
1177 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1178
1179 /* Use the raw, unprocessed data when writing to memory. The H3A and
1180 * histogram modules are still fed with lens shading corrected data.
1181 */
1182 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1183
1184 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1185 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1186 else
1187 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1188
1189 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1190 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1191 else
1192 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1193
1194 /* Mosaic filter */
1195 switch (format->code) {
1196 case MEDIA_BUS_FMT_SRGGB10_1X10:
1197 case MEDIA_BUS_FMT_SRGGB12_1X12:
1198 ccdc_pattern = ccdc_srggb_pattern;
1199 break;
1200 case MEDIA_BUS_FMT_SBGGR10_1X10:
1201 case MEDIA_BUS_FMT_SBGGR12_1X12:
1202 ccdc_pattern = ccdc_sbggr_pattern;
1203 break;
1204 case MEDIA_BUS_FMT_SGBRG10_1X10:
1205 case MEDIA_BUS_FMT_SGBRG12_1X12:
1206 ccdc_pattern = ccdc_sgbrg_pattern;
1207 break;
1208 default:
1209 /* Use GRBG */
1210 ccdc_pattern = ccdc_sgrbg_pattern;
1211 break;
1212 }
1213 ccdc_config_imgattr(ccdc, ccdc_pattern);
1214
1215 /* Generate VD0 on the last line of the image and VD1 on the
1216 * 2/3 height line.
1217 */
1218 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1219 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1220 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1221
1222 /* CCDC_PAD_SOURCE_OF */
1223 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1224 crop = &ccdc->crop;
1225
1226 /* The horizontal coordinates are expressed in pixel clock cycles. We
1227 * need two cycles per pixel in BT.656 mode, and one cycle per pixel in
1228 * SYNC mode regardless of the format as the bridge is enabled for YUV
1229 * formats in that case.
1230 */
1231 if (ccdc->bt656) {
1232 sph = crop->left * 2;
1233 nph = crop->width * 2 - 1;
1234 } else {
1235 sph = crop->left;
1236 nph = crop->width - 1;
1237 }
1238
1239 isp_reg_writel(isp, (sph << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1240 (nph << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1241 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1242 isp_reg_writel(isp, (crop->top << ISPCCDC_VERT_START_SLV0_SHIFT) |
1243 (crop->top << ISPCCDC_VERT_START_SLV1_SHIFT),
1244 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1245 isp_reg_writel(isp, (crop->height - 1)
1246 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1247 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1248
1249 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value,
1250 format->field);
1251
1252 /* When interleaving fields enable processing of the field input signal.
1253 * This will cause the line output control module to apply the field
1254 * offset to field 1.
1255 */
1256 if (ccdc->formats[CCDC_PAD_SINK].field == V4L2_FIELD_ALTERNATE &&
1257 (format->field == V4L2_FIELD_INTERLACED_TB ||
1258 format->field == V4L2_FIELD_INTERLACED_BT))
1259 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
1260
1261 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1262 * YUYV.
1263 */
1264 if (format->code == MEDIA_BUS_FMT_YUYV8_1X16)
1265 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1266 ISPCCDC_CFG_BSWD);
1267 else
1268 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1269 ISPCCDC_CFG_BSWD);
1270
1271 /* Use PACK8 mode for 1byte per pixel formats. Check for BT.656 mode
1272 * explicitly as the driver reports 1X16 instead of 2X8 at the OF pad
1273 * for simplicity.
1274 */
1275 if (omap3isp_video_format_info(format->code)->width <= 8 || ccdc->bt656)
1276 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1277 else
1278 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1279
1280 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1281
1282 /* CCDC_PAD_SOURCE_VP */
1283 ccdc_config_vp(ccdc);
1284
1285 /* Lens shading correction. */
1286 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1287 if (ccdc->lsc.request == NULL)
1288 goto unlock;
1289
1290 WARN_ON(ccdc->lsc.active);
1291
1292 /* Get last good LSC configuration. If it is not supported for
1293 * the current active resolution discard it.
1294 */
1295 if (ccdc->lsc.active == NULL &&
1296 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1297 ccdc->lsc.active = ccdc->lsc.request;
1298 } else {
1299 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1300 schedule_work(&ccdc->lsc.table_work);
1301 }
1302
1303 ccdc->lsc.request = NULL;
1304
1305 unlock:
1306 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1307
1308 ccdc_apply_controls(ccdc);
1309 }
1310
1311 static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1312 {
1313 struct isp_device *isp = to_isp_device(ccdc);
1314
1315 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1316 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1317
1318 ccdc->running = enable;
1319 }
1320
1321 static int ccdc_disable(struct isp_ccdc_device *ccdc)
1322 {
1323 unsigned long flags;
1324 int ret = 0;
1325
1326 spin_lock_irqsave(&ccdc->lock, flags);
1327 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1328 ccdc->stopping = CCDC_STOP_REQUEST;
1329 if (!ccdc->running)
1330 ccdc->stopping = CCDC_STOP_FINISHED;
1331 spin_unlock_irqrestore(&ccdc->lock, flags);
1332
1333 ret = wait_event_timeout(ccdc->wait,
1334 ccdc->stopping == CCDC_STOP_FINISHED,
1335 msecs_to_jiffies(2000));
1336 if (ret == 0) {
1337 ret = -ETIMEDOUT;
1338 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1339 }
1340
1341 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1342
1343 mutex_lock(&ccdc->ioctl_lock);
1344 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1345 ccdc->lsc.request = ccdc->lsc.active;
1346 ccdc->lsc.active = NULL;
1347 cancel_work_sync(&ccdc->lsc.table_work);
1348 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1349 mutex_unlock(&ccdc->ioctl_lock);
1350
1351 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1352
1353 return ret > 0 ? 0 : ret;
1354 }
1355
1356 static void ccdc_enable(struct isp_ccdc_device *ccdc)
1357 {
1358 if (ccdc_lsc_is_configured(ccdc))
1359 __ccdc_lsc_enable(ccdc, 1);
1360 __ccdc_enable(ccdc, 1);
1361 }
1362
1363 /* -----------------------------------------------------------------------------
1364 * Interrupt handling
1365 */
1366
1367 /*
1368 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1369 * @ccdc: Pointer to ISP CCDC device.
1370 *
1371 * Returns zero if the CCDC is idle and the image has been written to
1372 * memory, too.
1373 */
1374 static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1375 {
1376 struct isp_device *isp = to_isp_device(ccdc);
1377
1378 return omap3isp_ccdc_busy(ccdc)
1379 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1380 ISPSBL_CCDC_WR_0_DATA_READY)
1381 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1382 ISPSBL_CCDC_WR_0_DATA_READY)
1383 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1384 ISPSBL_CCDC_WR_0_DATA_READY)
1385 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1386 ISPSBL_CCDC_WR_0_DATA_READY);
1387 }
1388
1389 /*
1390 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1391 * @ccdc: Pointer to ISP CCDC device.
1392 * @max_wait: Max retry count in us for wait for idle/busy transition.
1393 */
1394 static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1395 unsigned int max_wait)
1396 {
1397 unsigned int wait = 0;
1398
1399 if (max_wait == 0)
1400 max_wait = 10000; /* 10 ms */
1401
1402 for (wait = 0; wait <= max_wait; wait++) {
1403 if (!ccdc_sbl_busy(ccdc))
1404 return 0;
1405
1406 rmb();
1407 udelay(1);
1408 }
1409
1410 return -EBUSY;
1411 }
1412
1413 /* ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1414 * @ccdc: Pointer to ISP CCDC device.
1415 * @event: Pointing which event trigger handler
1416 *
1417 * Return 1 when the event and stopping request combination is satisfied,
1418 * zero otherwise.
1419 */
1420 static int ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1421 {
1422 int rval = 0;
1423
1424 switch ((ccdc->stopping & 3) | event) {
1425 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1426 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1427 __ccdc_lsc_enable(ccdc, 0);
1428 __ccdc_enable(ccdc, 0);
1429 ccdc->stopping = CCDC_STOP_EXECUTED;
1430 return 1;
1431
1432 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1433 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1434 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1435 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1436 rval = 1;
1437 break;
1438
1439 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1440 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1441 rval = 1;
1442 break;
1443
1444 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1445 return 1;
1446 }
1447
1448 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1449 wake_up(&ccdc->wait);
1450 rval = 1;
1451 }
1452
1453 return rval;
1454 }
1455
1456 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1457 {
1458 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1459 struct video_device *vdev = ccdc->subdev.devnode;
1460 struct v4l2_event event;
1461
1462 /* Frame number propagation */
1463 atomic_inc(&pipe->frame_number);
1464
1465 memset(&event, 0, sizeof(event));
1466 event.type = V4L2_EVENT_FRAME_SYNC;
1467 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
1468
1469 v4l2_event_queue(vdev, &event);
1470 }
1471
1472 /*
1473 * ccdc_lsc_isr - Handle LSC events
1474 * @ccdc: Pointer to ISP CCDC device.
1475 * @events: LSC events
1476 */
1477 static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1478 {
1479 unsigned long flags;
1480
1481 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1482 struct isp_pipeline *pipe =
1483 to_isp_pipeline(&ccdc->subdev.entity);
1484
1485 ccdc_lsc_error_handler(ccdc);
1486 pipe->error = true;
1487 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1488 }
1489
1490 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1491 return;
1492
1493 /* LSC_DONE interrupt occur, there are two cases
1494 * 1. stopping for reconfiguration
1495 * 2. stopping because of STREAM OFF command
1496 */
1497 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1498
1499 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1500 ccdc->lsc.state = LSC_STATE_STOPPED;
1501
1502 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1503 goto done;
1504
1505 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1506 goto done;
1507
1508 /* LSC is in STOPPING state, change to the new state */
1509 ccdc->lsc.state = LSC_STATE_STOPPED;
1510
1511 /* This is an exception. Start of frame and LSC_DONE interrupt
1512 * have been received on the same time. Skip this event and wait
1513 * for better times.
1514 */
1515 if (events & IRQ0STATUS_HS_VS_IRQ)
1516 goto done;
1517
1518 /* The LSC engine is stopped at this point. Enable it if there's a
1519 * pending request.
1520 */
1521 if (ccdc->lsc.request == NULL)
1522 goto done;
1523
1524 ccdc_lsc_enable(ccdc);
1525
1526 done:
1527 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1528 }
1529
1530 /*
1531 * Check whether the CCDC has captured all fields necessary to complete the
1532 * buffer.
1533 */
1534 static bool ccdc_has_all_fields(struct isp_ccdc_device *ccdc)
1535 {
1536 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1537 struct isp_device *isp = to_isp_device(ccdc);
1538 enum v4l2_field of_field = ccdc->formats[CCDC_PAD_SOURCE_OF].field;
1539 enum v4l2_field field;
1540
1541 /* When the input is progressive fields don't matter. */
1542 if (of_field == V4L2_FIELD_NONE)
1543 return true;
1544
1545 /* Read the current field identifier. */
1546 field = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE)
1547 & ISPCCDC_SYN_MODE_FLDSTAT
1548 ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
1549
1550 /* When capturing fields in alternate order just store the current field
1551 * identifier in the pipeline.
1552 */
1553 if (of_field == V4L2_FIELD_ALTERNATE) {
1554 pipe->field = field;
1555 return true;
1556 }
1557
1558 /* The format is interlaced. Make sure we've captured both fields. */
1559 ccdc->fields |= field == V4L2_FIELD_BOTTOM
1560 ? CCDC_FIELD_BOTTOM : CCDC_FIELD_TOP;
1561
1562 if (ccdc->fields != CCDC_FIELD_BOTH)
1563 return false;
1564
1565 /* Verify that the field just captured corresponds to the last field
1566 * needed based on the desired field order.
1567 */
1568 if ((of_field == V4L2_FIELD_INTERLACED_TB && field == V4L2_FIELD_TOP) ||
1569 (of_field == V4L2_FIELD_INTERLACED_BT && field == V4L2_FIELD_BOTTOM))
1570 return false;
1571
1572 /* The buffer can be completed, reset the fields for the next buffer. */
1573 ccdc->fields = 0;
1574
1575 return true;
1576 }
1577
1578 static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1579 {
1580 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1581 struct isp_device *isp = to_isp_device(ccdc);
1582 struct isp_buffer *buffer;
1583
1584 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1585 * doesn't explicitly state if that's supposed to happen or not, so it
1586 * can be considered as a hardware bug or as a feature, but we have to
1587 * deal with it anyway). Disabling the CCDC when no buffer is available
1588 * would thus not be enough, we need to handle the situation explicitly.
1589 */
1590 if (list_empty(&ccdc->video_out.dmaqueue))
1591 return 0;
1592
1593 /* We're in continuous mode, and memory writes were disabled due to a
1594 * buffer underrun. Re-enable them now that we have a buffer. The buffer
1595 * address has been set in ccdc_video_queue.
1596 */
1597 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1598 ccdc->underrun = 0;
1599 return 1;
1600 }
1601
1602 /* Wait for the CCDC to become idle. */
1603 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1604 dev_info(isp->dev, "CCDC won't become idle!\n");
1605 media_entity_enum_set(&isp->crashed, &ccdc->subdev.entity);
1606 omap3isp_pipeline_cancel_stream(pipe);
1607 return 0;
1608 }
1609
1610 /* Don't restart CCDC if we're just about to stop streaming. */
1611 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1612 ccdc->stopping & CCDC_STOP_REQUEST)
1613 return 0;
1614
1615 if (!ccdc_has_all_fields(ccdc))
1616 return 1;
1617
1618 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
1619 if (buffer != NULL)
1620 ccdc_set_outaddr(ccdc, buffer->dma);
1621
1622 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1623
1624 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1625 isp_pipeline_ready(pipe))
1626 omap3isp_pipeline_set_stream(pipe,
1627 ISP_PIPELINE_STREAM_SINGLESHOT);
1628
1629 return buffer != NULL;
1630 }
1631
1632 /*
1633 * ccdc_vd0_isr - Handle VD0 event
1634 * @ccdc: Pointer to ISP CCDC device.
1635 *
1636 * Executes LSC deferred enablement before next frame starts.
1637 */
1638 static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1639 {
1640 unsigned long flags;
1641 int restart = 0;
1642
1643 /* In BT.656 mode the CCDC doesn't generate an HS/VS interrupt. We thus
1644 * need to increment the frame counter here.
1645 */
1646 if (ccdc->bt656) {
1647 struct isp_pipeline *pipe =
1648 to_isp_pipeline(&ccdc->subdev.entity);
1649
1650 atomic_inc(&pipe->frame_number);
1651 }
1652
1653 /* Emulate a VD1 interrupt for BT.656 mode, as we can't stop the CCDC in
1654 * the VD1 interrupt handler in that mode without risking a CCDC stall
1655 * if a short frame is received.
1656 */
1657 if (ccdc->bt656) {
1658 spin_lock_irqsave(&ccdc->lock, flags);
1659 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1660 ccdc->output & CCDC_OUTPUT_MEMORY) {
1661 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1662 __ccdc_lsc_enable(ccdc, 0);
1663 __ccdc_enable(ccdc, 0);
1664 }
1665 ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1);
1666 spin_unlock_irqrestore(&ccdc->lock, flags);
1667 }
1668
1669 spin_lock_irqsave(&ccdc->lock, flags);
1670 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1671 spin_unlock_irqrestore(&ccdc->lock, flags);
1672 return;
1673 }
1674
1675 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1676 restart = ccdc_isr_buffer(ccdc);
1677
1678 if (!ccdc->shadow_update)
1679 ccdc_apply_controls(ccdc);
1680 spin_unlock_irqrestore(&ccdc->lock, flags);
1681
1682 if (restart)
1683 ccdc_enable(ccdc);
1684 }
1685
1686 /*
1687 * ccdc_vd1_isr - Handle VD1 event
1688 * @ccdc: Pointer to ISP CCDC device.
1689 */
1690 static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1691 {
1692 unsigned long flags;
1693
1694 /* In BT.656 mode the synchronization signals are generated by the CCDC
1695 * from the embedded sync codes. The VD0 and VD1 interrupts are thus
1696 * only triggered when the CCDC is enabled, unlike external sync mode
1697 * where the line counter runs even when the CCDC is stopped. We can't
1698 * disable the CCDC at VD1 time, as no VD0 interrupt would be generated
1699 * for a short frame, which would result in the CCDC being stopped and
1700 * no VD interrupt generated anymore. The CCDC is stopped from the VD0
1701 * interrupt handler instead for BT.656.
1702 */
1703 if (ccdc->bt656)
1704 return;
1705
1706 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1707
1708 /*
1709 * Depending on the CCDC pipeline state, CCDC stopping should be
1710 * handled differently. In SINGLESHOT we emulate an internal CCDC
1711 * stopping because the CCDC hw works only in continuous mode.
1712 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1713 * data to memory the CCDC and LSC are stopped immediately but
1714 * without change the CCDC stopping state machine. The CCDC
1715 * stopping state machine should be used only when user request
1716 * for stopping is received (SINGLESHOT is an exception).
1717 */
1718 switch (ccdc->state) {
1719 case ISP_PIPELINE_STREAM_SINGLESHOT:
1720 ccdc->stopping = CCDC_STOP_REQUEST;
1721 break;
1722
1723 case ISP_PIPELINE_STREAM_CONTINUOUS:
1724 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1725 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1726 __ccdc_lsc_enable(ccdc, 0);
1727 __ccdc_enable(ccdc, 0);
1728 }
1729 break;
1730
1731 case ISP_PIPELINE_STREAM_STOPPED:
1732 break;
1733 }
1734
1735 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1736 goto done;
1737
1738 if (ccdc->lsc.request == NULL)
1739 goto done;
1740
1741 /*
1742 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1743 * do the appropriate changes in registers
1744 */
1745 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1746 __ccdc_lsc_enable(ccdc, 0);
1747 ccdc->lsc.state = LSC_STATE_RECONFIG;
1748 goto done;
1749 }
1750
1751 /* LSC has been in STOPPED state, enable it */
1752 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1753 ccdc_lsc_enable(ccdc);
1754
1755 done:
1756 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1757 }
1758
1759 /*
1760 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1761 * @ccdc: Pointer to ISP CCDC device.
1762 * @events: CCDC events
1763 */
1764 int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1765 {
1766 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1767 return 0;
1768
1769 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1770 ccdc_vd1_isr(ccdc);
1771
1772 ccdc_lsc_isr(ccdc, events);
1773
1774 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1775 ccdc_vd0_isr(ccdc);
1776
1777 if (events & IRQ0STATUS_HS_VS_IRQ)
1778 ccdc_hs_vs_isr(ccdc);
1779
1780 return 0;
1781 }
1782
1783 /* -----------------------------------------------------------------------------
1784 * ISP video operations
1785 */
1786
1787 static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1788 {
1789 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1790 unsigned long flags;
1791 bool restart = false;
1792
1793 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1794 return -ENODEV;
1795
1796 ccdc_set_outaddr(ccdc, buffer->dma);
1797
1798 /* We now have a buffer queued on the output, restart the pipeline
1799 * on the next CCDC interrupt if running in continuous mode (or when
1800 * starting the stream) in external sync mode, or immediately in BT.656
1801 * sync mode as no CCDC interrupt is generated when the CCDC is stopped
1802 * in that case.
1803 */
1804 spin_lock_irqsave(&ccdc->lock, flags);
1805 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && !ccdc->running &&
1806 ccdc->bt656)
1807 restart = true;
1808 else
1809 ccdc->underrun = 1;
1810 spin_unlock_irqrestore(&ccdc->lock, flags);
1811
1812 if (restart)
1813 ccdc_enable(ccdc);
1814
1815 return 0;
1816 }
1817
1818 static const struct isp_video_operations ccdc_video_ops = {
1819 .queue = ccdc_video_queue,
1820 };
1821
1822 /* -----------------------------------------------------------------------------
1823 * V4L2 subdev operations
1824 */
1825
1826 /*
1827 * ccdc_ioctl - CCDC module private ioctl's
1828 * @sd: ISP CCDC V4L2 subdevice
1829 * @cmd: ioctl command
1830 * @arg: ioctl argument
1831 *
1832 * Return 0 on success or a negative error code otherwise.
1833 */
1834 static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1835 {
1836 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1837 int ret;
1838
1839 switch (cmd) {
1840 case VIDIOC_OMAP3ISP_CCDC_CFG:
1841 mutex_lock(&ccdc->ioctl_lock);
1842 ret = ccdc_config(ccdc, arg);
1843 mutex_unlock(&ccdc->ioctl_lock);
1844 break;
1845
1846 default:
1847 return -ENOIOCTLCMD;
1848 }
1849
1850 return ret;
1851 }
1852
1853 static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1854 struct v4l2_event_subscription *sub)
1855 {
1856 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1857 return -EINVAL;
1858
1859 /* line number is zero at frame start */
1860 if (sub->id != 0)
1861 return -EINVAL;
1862
1863 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
1864 }
1865
1866 static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1867 struct v4l2_event_subscription *sub)
1868 {
1869 return v4l2_event_unsubscribe(fh, sub);
1870 }
1871
1872 /*
1873 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1874 * @sd: ISP CCDC V4L2 subdevice
1875 * @enable: Enable/disable stream
1876 *
1877 * When writing to memory, the CCDC hardware can't be enabled without a memory
1878 * buffer to write to. As the s_stream operation is called in response to a
1879 * STREAMON call without any buffer queued yet, just update the enabled field
1880 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1881 *
1882 * When not writing to memory enable the CCDC immediately.
1883 */
1884 static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1885 {
1886 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1887 struct isp_device *isp = to_isp_device(ccdc);
1888 int ret = 0;
1889
1890 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1891 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1892 return 0;
1893
1894 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1895 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1896 ISPCCDC_CFG_VDLC);
1897
1898 ccdc_configure(ccdc);
1899
1900 ccdc_print_status(ccdc);
1901 }
1902
1903 switch (enable) {
1904 case ISP_PIPELINE_STREAM_CONTINUOUS:
1905 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1906 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1907
1908 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1909 ccdc_enable(ccdc);
1910
1911 ccdc->underrun = 0;
1912 break;
1913
1914 case ISP_PIPELINE_STREAM_SINGLESHOT:
1915 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1916 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1917 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1918
1919 ccdc_enable(ccdc);
1920 break;
1921
1922 case ISP_PIPELINE_STREAM_STOPPED:
1923 ret = ccdc_disable(ccdc);
1924 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1925 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1926 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1927 ccdc->underrun = 0;
1928 break;
1929 }
1930
1931 ccdc->state = enable;
1932 return ret;
1933 }
1934
1935 static struct v4l2_mbus_framefmt *
1936 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1937 unsigned int pad, enum v4l2_subdev_format_whence which)
1938 {
1939 if (which == V4L2_SUBDEV_FORMAT_TRY)
1940 return v4l2_subdev_get_try_format(&ccdc->subdev, cfg, pad);
1941 else
1942 return &ccdc->formats[pad];
1943 }
1944
1945 static struct v4l2_rect *
1946 __ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1947 enum v4l2_subdev_format_whence which)
1948 {
1949 if (which == V4L2_SUBDEV_FORMAT_TRY)
1950 return v4l2_subdev_get_try_crop(&ccdc->subdev, cfg, CCDC_PAD_SOURCE_OF);
1951 else
1952 return &ccdc->crop;
1953 }
1954
1955 /*
1956 * ccdc_try_format - Try video format on a pad
1957 * @ccdc: ISP CCDC device
1958 * @cfg : V4L2 subdev pad configuration
1959 * @pad: Pad number
1960 * @fmt: Format
1961 */
1962 static void
1963 ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1964 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1965 enum v4l2_subdev_format_whence which)
1966 {
1967 const struct isp_format_info *info;
1968 u32 pixelcode;
1969 unsigned int width = fmt->width;
1970 unsigned int height = fmt->height;
1971 struct v4l2_rect *crop;
1972 enum v4l2_field field;
1973 unsigned int i;
1974
1975 switch (pad) {
1976 case CCDC_PAD_SINK:
1977 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1978 if (fmt->code == ccdc_fmts[i])
1979 break;
1980 }
1981
1982 /* If not found, use SGRBG10 as default */
1983 if (i >= ARRAY_SIZE(ccdc_fmts))
1984 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1985
1986 /* Clamp the input size. */
1987 fmt->width = clamp_t(u32, width, 32, 4096);
1988 fmt->height = clamp_t(u32, height, 32, 4096);
1989
1990 /* Default to progressive field order. */
1991 if (fmt->field == V4L2_FIELD_ANY)
1992 fmt->field = V4L2_FIELD_NONE;
1993
1994 break;
1995
1996 case CCDC_PAD_SOURCE_OF:
1997 pixelcode = fmt->code;
1998 field = fmt->field;
1999 *fmt = *__ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, which);
2000
2001 /* In SYNC mode the bridge converts YUV formats from 2X8 to
2002 * 1X16. In BT.656 no such conversion occurs. As we don't know
2003 * at this point whether the source will use SYNC or BT.656 mode
2004 * let's pretend the conversion always occurs. The CCDC will be
2005 * configured to pack bytes in BT.656, hiding the inaccuracy.
2006 * In all cases bytes can be swapped.
2007 */
2008 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2009 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2010 /* Use the user requested format if YUV. */
2011 if (pixelcode == MEDIA_BUS_FMT_YUYV8_2X8 ||
2012 pixelcode == MEDIA_BUS_FMT_UYVY8_2X8 ||
2013 pixelcode == MEDIA_BUS_FMT_YUYV8_1X16 ||
2014 pixelcode == MEDIA_BUS_FMT_UYVY8_1X16)
2015 fmt->code = pixelcode;
2016
2017 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8)
2018 fmt->code = MEDIA_BUS_FMT_YUYV8_1X16;
2019 else if (fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2020 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
2021 }
2022
2023 /* Hardcode the output size to the crop rectangle size. */
2024 crop = __ccdc_get_crop(ccdc, cfg, which);
2025 fmt->width = crop->width;
2026 fmt->height = crop->height;
2027
2028 /* When input format is interlaced with alternating fields the
2029 * CCDC can interleave the fields.
2030 */
2031 if (fmt->field == V4L2_FIELD_ALTERNATE &&
2032 (field == V4L2_FIELD_INTERLACED_TB ||
2033 field == V4L2_FIELD_INTERLACED_BT)) {
2034 fmt->field = field;
2035 fmt->height *= 2;
2036 }
2037
2038 break;
2039
2040 case CCDC_PAD_SOURCE_VP:
2041 *fmt = *__ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, which);
2042
2043 /* The video port interface truncates the data to 10 bits. */
2044 info = omap3isp_video_format_info(fmt->code);
2045 fmt->code = info->truncated;
2046
2047 /* YUV formats are not supported by the video port. */
2048 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2049 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2050 fmt->code = 0;
2051
2052 /* The number of lines that can be clocked out from the video
2053 * port output must be at least one line less than the number
2054 * of input lines.
2055 */
2056 fmt->width = clamp_t(u32, width, 32, fmt->width);
2057 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
2058 break;
2059 }
2060
2061 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
2062 * stored on 2 bytes.
2063 */
2064 fmt->colorspace = V4L2_COLORSPACE_SRGB;
2065 }
2066
2067 /*
2068 * ccdc_try_crop - Validate a crop rectangle
2069 * @ccdc: ISP CCDC device
2070 * @sink: format on the sink pad
2071 * @crop: crop rectangle to be validated
2072 */
2073 static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
2074 const struct v4l2_mbus_framefmt *sink,
2075 struct v4l2_rect *crop)
2076 {
2077 const struct isp_format_info *info;
2078 unsigned int max_width;
2079
2080 /* For Bayer formats, restrict left/top and width/height to even values
2081 * to keep the Bayer pattern.
2082 */
2083 info = omap3isp_video_format_info(sink->code);
2084 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2085 crop->left &= ~1;
2086 crop->top &= ~1;
2087 }
2088
2089 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
2090 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
2091
2092 /* The data formatter truncates the number of horizontal output pixels
2093 * to a multiple of 16. To avoid clipping data, allow callers to request
2094 * an output size bigger than the input size up to the nearest multiple
2095 * of 16.
2096 */
2097 max_width = (sink->width - crop->left + 15) & ~15;
2098 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
2099 & ~15;
2100 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
2101 sink->height - crop->top);
2102
2103 /* Odd width/height values don't make sense for Bayer formats. */
2104 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2105 crop->width &= ~1;
2106 crop->height &= ~1;
2107 }
2108 }
2109
2110 /*
2111 * ccdc_enum_mbus_code - Handle pixel format enumeration
2112 * @sd : pointer to v4l2 subdev structure
2113 * @cfg : V4L2 subdev pad configuration
2114 * @code : pointer to v4l2_subdev_mbus_code_enum structure
2115 * return -EINVAL or zero on success
2116 */
2117 static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
2118 struct v4l2_subdev_pad_config *cfg,
2119 struct v4l2_subdev_mbus_code_enum *code)
2120 {
2121 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2122 struct v4l2_mbus_framefmt *format;
2123
2124 switch (code->pad) {
2125 case CCDC_PAD_SINK:
2126 if (code->index >= ARRAY_SIZE(ccdc_fmts))
2127 return -EINVAL;
2128
2129 code->code = ccdc_fmts[code->index];
2130 break;
2131
2132 case CCDC_PAD_SOURCE_OF:
2133 format = __ccdc_get_format(ccdc, cfg, code->pad,
2134 code->which);
2135
2136 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2137 format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2138 /* In YUV mode the CCDC can swap bytes. */
2139 if (code->index == 0)
2140 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
2141 else if (code->index == 1)
2142 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
2143 else
2144 return -EINVAL;
2145 } else {
2146 /* In raw mode, no configurable format confversion is
2147 * available.
2148 */
2149 if (code->index == 0)
2150 code->code = format->code;
2151 else
2152 return -EINVAL;
2153 }
2154 break;
2155
2156 case CCDC_PAD_SOURCE_VP:
2157 /* The CCDC supports no configurable format conversion
2158 * compatible with the video port. Enumerate a single output
2159 * format code.
2160 */
2161 if (code->index != 0)
2162 return -EINVAL;
2163
2164 format = __ccdc_get_format(ccdc, cfg, code->pad,
2165 code->which);
2166
2167 /* A pixel code equal to 0 means that the video port doesn't
2168 * support the input format. Don't enumerate any pixel code.
2169 */
2170 if (format->code == 0)
2171 return -EINVAL;
2172
2173 code->code = format->code;
2174 break;
2175
2176 default:
2177 return -EINVAL;
2178 }
2179
2180 return 0;
2181 }
2182
2183 static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2184 struct v4l2_subdev_pad_config *cfg,
2185 struct v4l2_subdev_frame_size_enum *fse)
2186 {
2187 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2188 struct v4l2_mbus_framefmt format;
2189
2190 if (fse->index != 0)
2191 return -EINVAL;
2192
2193 format.code = fse->code;
2194 format.width = 1;
2195 format.height = 1;
2196 ccdc_try_format(ccdc, cfg, fse->pad, &format, fse->which);
2197 fse->min_width = format.width;
2198 fse->min_height = format.height;
2199
2200 if (format.code != fse->code)
2201 return -EINVAL;
2202
2203 format.code = fse->code;
2204 format.width = -1;
2205 format.height = -1;
2206 ccdc_try_format(ccdc, cfg, fse->pad, &format, fse->which);
2207 fse->max_width = format.width;
2208 fse->max_height = format.height;
2209
2210 return 0;
2211 }
2212
2213 /*
2214 * ccdc_get_selection - Retrieve a selection rectangle on a pad
2215 * @sd: ISP CCDC V4L2 subdevice
2216 * @cfg: V4L2 subdev pad configuration
2217 * @sel: Selection rectangle
2218 *
2219 * The only supported rectangles are the crop rectangles on the output formatter
2220 * source pad.
2221 *
2222 * Return 0 on success or a negative error code otherwise.
2223 */
2224 static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2225 struct v4l2_subdev_selection *sel)
2226 {
2227 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2228 struct v4l2_mbus_framefmt *format;
2229
2230 if (sel->pad != CCDC_PAD_SOURCE_OF)
2231 return -EINVAL;
2232
2233 switch (sel->target) {
2234 case V4L2_SEL_TGT_CROP_BOUNDS:
2235 sel->r.left = 0;
2236 sel->r.top = 0;
2237 sel->r.width = INT_MAX;
2238 sel->r.height = INT_MAX;
2239
2240 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, sel->which);
2241 ccdc_try_crop(ccdc, format, &sel->r);
2242 break;
2243
2244 case V4L2_SEL_TGT_CROP:
2245 sel->r = *__ccdc_get_crop(ccdc, cfg, sel->which);
2246 break;
2247
2248 default:
2249 return -EINVAL;
2250 }
2251
2252 return 0;
2253 }
2254
2255 /*
2256 * ccdc_set_selection - Set a selection rectangle on a pad
2257 * @sd: ISP CCDC V4L2 subdevice
2258 * @cfg: V4L2 subdev pad configuration
2259 * @sel: Selection rectangle
2260 *
2261 * The only supported rectangle is the actual crop rectangle on the output
2262 * formatter source pad.
2263 *
2264 * Return 0 on success or a negative error code otherwise.
2265 */
2266 static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2267 struct v4l2_subdev_selection *sel)
2268 {
2269 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2270 struct v4l2_mbus_framefmt *format;
2271
2272 if (sel->target != V4L2_SEL_TGT_CROP ||
2273 sel->pad != CCDC_PAD_SOURCE_OF)
2274 return -EINVAL;
2275
2276 /* The crop rectangle can't be changed while streaming. */
2277 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2278 return -EBUSY;
2279
2280 /* Modifying the crop rectangle always changes the format on the source
2281 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2282 * rectangle.
2283 */
2284 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
2285 sel->r = *__ccdc_get_crop(ccdc, cfg, sel->which);
2286 return 0;
2287 }
2288
2289 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, sel->which);
2290 ccdc_try_crop(ccdc, format, &sel->r);
2291 *__ccdc_get_crop(ccdc, cfg, sel->which) = sel->r;
2292
2293 /* Update the source format. */
2294 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, sel->which);
2295 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, format, sel->which);
2296
2297 return 0;
2298 }
2299
2300 /*
2301 * ccdc_get_format - Retrieve the video format on a pad
2302 * @sd : ISP CCDC V4L2 subdevice
2303 * @cfg: V4L2 subdev pad configuration
2304 * @fmt: Format
2305 *
2306 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2307 * to the format type.
2308 */
2309 static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2310 struct v4l2_subdev_format *fmt)
2311 {
2312 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2313 struct v4l2_mbus_framefmt *format;
2314
2315 format = __ccdc_get_format(ccdc, cfg, fmt->pad, fmt->which);
2316 if (format == NULL)
2317 return -EINVAL;
2318
2319 fmt->format = *format;
2320 return 0;
2321 }
2322
2323 /*
2324 * ccdc_set_format - Set the video format on a pad
2325 * @sd : ISP CCDC V4L2 subdevice
2326 * @cfg: V4L2 subdev pad configuration
2327 * @fmt: Format
2328 *
2329 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2330 * to the format type.
2331 */
2332 static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2333 struct v4l2_subdev_format *fmt)
2334 {
2335 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2336 struct v4l2_mbus_framefmt *format;
2337 struct v4l2_rect *crop;
2338
2339 format = __ccdc_get_format(ccdc, cfg, fmt->pad, fmt->which);
2340 if (format == NULL)
2341 return -EINVAL;
2342
2343 ccdc_try_format(ccdc, cfg, fmt->pad, &fmt->format, fmt->which);
2344 *format = fmt->format;
2345
2346 /* Propagate the format from sink to source */
2347 if (fmt->pad == CCDC_PAD_SINK) {
2348 /* Reset the crop rectangle. */
2349 crop = __ccdc_get_crop(ccdc, cfg, fmt->which);
2350 crop->left = 0;
2351 crop->top = 0;
2352 crop->width = fmt->format.width;
2353 crop->height = fmt->format.height;
2354
2355 ccdc_try_crop(ccdc, &fmt->format, crop);
2356
2357 /* Update the source formats. */
2358 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_OF,
2359 fmt->which);
2360 *format = fmt->format;
2361 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, format,
2362 fmt->which);
2363
2364 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_VP,
2365 fmt->which);
2366 *format = fmt->format;
2367 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_VP, format,
2368 fmt->which);
2369 }
2370
2371 return 0;
2372 }
2373
2374 /*
2375 * Decide whether desired output pixel code can be obtained with
2376 * the lane shifter by shifting the input pixel code.
2377 * @in: input pixelcode to shifter
2378 * @out: output pixelcode from shifter
2379 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2380 *
2381 * return true if the combination is possible
2382 * return false otherwise
2383 */
2384 static bool ccdc_is_shiftable(u32 in, u32 out, unsigned int additional_shift)
2385 {
2386 const struct isp_format_info *in_info, *out_info;
2387
2388 if (in == out)
2389 return true;
2390
2391 in_info = omap3isp_video_format_info(in);
2392 out_info = omap3isp_video_format_info(out);
2393
2394 if ((in_info->flavor == 0) || (out_info->flavor == 0))
2395 return false;
2396
2397 if (in_info->flavor != out_info->flavor)
2398 return false;
2399
2400 return in_info->width - out_info->width + additional_shift <= 6;
2401 }
2402
2403 static int ccdc_link_validate(struct v4l2_subdev *sd,
2404 struct media_link *link,
2405 struct v4l2_subdev_format *source_fmt,
2406 struct v4l2_subdev_format *sink_fmt)
2407 {
2408 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2409 unsigned long parallel_shift;
2410
2411 /* Check if the two ends match */
2412 if (source_fmt->format.width != sink_fmt->format.width ||
2413 source_fmt->format.height != sink_fmt->format.height)
2414 return -EPIPE;
2415
2416 /* We've got a parallel sensor here. */
2417 if (ccdc->input == CCDC_INPUT_PARALLEL) {
2418 struct v4l2_subdev *sd =
2419 media_entity_to_v4l2_subdev(link->source->entity);
2420 struct isp_bus_cfg *bus_cfg = v4l2_subdev_to_bus_cfg(sd);
2421
2422 parallel_shift = bus_cfg->bus.parallel.data_lane_shift;
2423 } else {
2424 parallel_shift = 0;
2425 }
2426
2427 /* Lane shifter may be used to drop bits on CCDC sink pad */
2428 if (!ccdc_is_shiftable(source_fmt->format.code,
2429 sink_fmt->format.code, parallel_shift))
2430 return -EPIPE;
2431
2432 return 0;
2433 }
2434
2435 /*
2436 * ccdc_init_formats - Initialize formats on all pads
2437 * @sd: ISP CCDC V4L2 subdevice
2438 * @fh: V4L2 subdev file handle
2439 *
2440 * Initialize all pad formats with default values. If fh is not NULL, try
2441 * formats are initialized on the file handle. Otherwise active formats are
2442 * initialized on the device.
2443 */
2444 static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2445 {
2446 struct v4l2_subdev_format format;
2447
2448 memset(&format, 0, sizeof(format));
2449 format.pad = CCDC_PAD_SINK;
2450 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2451 format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
2452 format.format.width = 4096;
2453 format.format.height = 4096;
2454 ccdc_set_format(sd, fh ? fh->pad : NULL, &format);
2455
2456 return 0;
2457 }
2458
2459 /* V4L2 subdev core operations */
2460 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2461 .ioctl = ccdc_ioctl,
2462 .subscribe_event = ccdc_subscribe_event,
2463 .unsubscribe_event = ccdc_unsubscribe_event,
2464 };
2465
2466 /* V4L2 subdev video operations */
2467 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2468 .s_stream = ccdc_set_stream,
2469 };
2470
2471 /* V4L2 subdev pad operations */
2472 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2473 .enum_mbus_code = ccdc_enum_mbus_code,
2474 .enum_frame_size = ccdc_enum_frame_size,
2475 .get_fmt = ccdc_get_format,
2476 .set_fmt = ccdc_set_format,
2477 .get_selection = ccdc_get_selection,
2478 .set_selection = ccdc_set_selection,
2479 .link_validate = ccdc_link_validate,
2480 };
2481
2482 /* V4L2 subdev operations */
2483 static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2484 .core = &ccdc_v4l2_core_ops,
2485 .video = &ccdc_v4l2_video_ops,
2486 .pad = &ccdc_v4l2_pad_ops,
2487 };
2488
2489 /* V4L2 subdev internal operations */
2490 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2491 .open = ccdc_init_formats,
2492 };
2493
2494 /* -----------------------------------------------------------------------------
2495 * Media entity operations
2496 */
2497
2498 /*
2499 * ccdc_link_setup - Setup CCDC connections
2500 * @entity: CCDC media entity
2501 * @local: Pad at the local end of the link
2502 * @remote: Pad at the remote end of the link
2503 * @flags: Link flags
2504 *
2505 * return -EINVAL or zero on success
2506 */
2507 static int ccdc_link_setup(struct media_entity *entity,
2508 const struct media_pad *local,
2509 const struct media_pad *remote, u32 flags)
2510 {
2511 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2512 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2513 struct isp_device *isp = to_isp_device(ccdc);
2514 unsigned int index = local->index;
2515
2516 /* FIXME: this is actually a hack! */
2517 if (is_media_entity_v4l2_subdev(remote->entity))
2518 index |= 2 << 16;
2519
2520 switch (index) {
2521 case CCDC_PAD_SINK | 2 << 16:
2522 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2523 * CSI2c.
2524 */
2525 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2526 ccdc->input = CCDC_INPUT_NONE;
2527 break;
2528 }
2529
2530 if (ccdc->input != CCDC_INPUT_NONE)
2531 return -EBUSY;
2532
2533 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2534 ccdc->input = CCDC_INPUT_CCP2B;
2535 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2536 ccdc->input = CCDC_INPUT_CSI2A;
2537 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2538 ccdc->input = CCDC_INPUT_CSI2C;
2539 else
2540 ccdc->input = CCDC_INPUT_PARALLEL;
2541
2542 break;
2543
2544 /*
2545 * The ISP core doesn't support pipelines with multiple video outputs.
2546 * Revisit this when it will be implemented, and return -EBUSY for now.
2547 */
2548
2549 case CCDC_PAD_SOURCE_VP | 2 << 16:
2550 /* Write to preview engine, histogram and H3A. When none of
2551 * those links are active, the video port can be disabled.
2552 */
2553 if (flags & MEDIA_LNK_FL_ENABLED) {
2554 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2555 return -EBUSY;
2556 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2557 } else {
2558 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2559 }
2560 break;
2561
2562 case CCDC_PAD_SOURCE_OF:
2563 /* Write to memory */
2564 if (flags & MEDIA_LNK_FL_ENABLED) {
2565 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2566 return -EBUSY;
2567 ccdc->output |= CCDC_OUTPUT_MEMORY;
2568 } else {
2569 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2570 }
2571 break;
2572
2573 case CCDC_PAD_SOURCE_OF | 2 << 16:
2574 /* Write to resizer */
2575 if (flags & MEDIA_LNK_FL_ENABLED) {
2576 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2577 return -EBUSY;
2578 ccdc->output |= CCDC_OUTPUT_RESIZER;
2579 } else {
2580 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2581 }
2582 break;
2583
2584 default:
2585 return -EINVAL;
2586 }
2587
2588 return 0;
2589 }
2590
2591 /* media operations */
2592 static const struct media_entity_operations ccdc_media_ops = {
2593 .link_setup = ccdc_link_setup,
2594 .link_validate = v4l2_subdev_link_validate,
2595 };
2596
2597 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2598 {
2599 v4l2_device_unregister_subdev(&ccdc->subdev);
2600 omap3isp_video_unregister(&ccdc->video_out);
2601 }
2602
2603 int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2604 struct v4l2_device *vdev)
2605 {
2606 int ret;
2607
2608 /* Register the subdev and video node. */
2609 ccdc->subdev.dev = vdev->mdev->dev;
2610 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2611 if (ret < 0)
2612 goto error;
2613
2614 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2615 if (ret < 0)
2616 goto error;
2617
2618 return 0;
2619
2620 error:
2621 omap3isp_ccdc_unregister_entities(ccdc);
2622 return ret;
2623 }
2624
2625 /* -----------------------------------------------------------------------------
2626 * ISP CCDC initialisation and cleanup
2627 */
2628
2629 /*
2630 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2631 * @ccdc: ISP CCDC module
2632 *
2633 * Return 0 on success and a negative error code on failure.
2634 */
2635 static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2636 {
2637 struct v4l2_subdev *sd = &ccdc->subdev;
2638 struct media_pad *pads = ccdc->pads;
2639 struct media_entity *me = &sd->entity;
2640 int ret;
2641
2642 ccdc->input = CCDC_INPUT_NONE;
2643
2644 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2645 sd->internal_ops = &ccdc_v4l2_internal_ops;
2646 strscpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2647 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2648 v4l2_set_subdevdata(sd, ccdc);
2649 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
2650
2651 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2652 | MEDIA_PAD_FL_MUST_CONNECT;
2653 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2654 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2655
2656 me->ops = &ccdc_media_ops;
2657 ret = media_entity_pads_init(me, CCDC_PADS_NUM, pads);
2658 if (ret < 0)
2659 return ret;
2660
2661 ccdc_init_formats(sd, NULL);
2662
2663 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2664 ccdc->video_out.ops = &ccdc_video_ops;
2665 ccdc->video_out.isp = to_isp_device(ccdc);
2666 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2667 ccdc->video_out.bpl_alignment = 32;
2668
2669 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2670 if (ret < 0)
2671 goto error;
2672
2673 return 0;
2674
2675 error:
2676 media_entity_cleanup(me);
2677 return ret;
2678 }
2679
2680 /*
2681 * omap3isp_ccdc_init - CCDC module initialization.
2682 * @isp: Device pointer specific to the OMAP3 ISP.
2683 *
2684 * TODO: Get the initialisation values from platform data.
2685 *
2686 * Return 0 on success or a negative error code otherwise.
2687 */
2688 int omap3isp_ccdc_init(struct isp_device *isp)
2689 {
2690 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2691 int ret;
2692
2693 spin_lock_init(&ccdc->lock);
2694 init_waitqueue_head(&ccdc->wait);
2695 mutex_init(&ccdc->ioctl_lock);
2696
2697 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2698
2699 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2700 ccdc->lsc.state = LSC_STATE_STOPPED;
2701 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2702 spin_lock_init(&ccdc->lsc.req_lock);
2703
2704 ccdc->clamp.oblen = 0;
2705 ccdc->clamp.dcsubval = 0;
2706
2707 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2708 ccdc_apply_controls(ccdc);
2709
2710 ret = ccdc_init_entities(ccdc);
2711 if (ret < 0) {
2712 mutex_destroy(&ccdc->ioctl_lock);
2713 return ret;
2714 }
2715
2716 return 0;
2717 }
2718
2719 /*
2720 * omap3isp_ccdc_cleanup - CCDC module cleanup.
2721 * @isp: Device pointer specific to the OMAP3 ISP.
2722 */
2723 void omap3isp_ccdc_cleanup(struct isp_device *isp)
2724 {
2725 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2726
2727 omap3isp_video_cleanup(&ccdc->video_out);
2728 media_entity_cleanup(&ccdc->subdev.entity);
2729
2730 /* Free LSC requests. As the CCDC is stopped there's no active request,
2731 * so only the pending request and the free queue need to be handled.
2732 */
2733 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2734 cancel_work_sync(&ccdc->lsc.table_work);
2735 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2736
2737 if (ccdc->fpc.addr != NULL)
2738 dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
2739 ccdc->fpc.dma);
2740
2741 mutex_destroy(&ccdc->ioctl_lock);
2742 }
Linux with added FPC-III support