1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ImgTec IR Hardware Decoder found in PowerDown Controller.
5 * Copyright 2010-2014 Imagination Technologies Ltd.
7 * This ties into the input subsystem using the RC-core. Protocol support is
8 * provided in separate modules which provide the parameters and scancode
9 * translation functions to set up the hardware decoder and interpret the
13 #include <linux/bitops.h>
14 #include <linux/clk.h>
15 #include <linux/interrupt.h>
16 #include <linux/spinlock.h>
17 #include <linux/timer.h>
18 #include <media/rc-core.h>
21 /* Decoders lock (only modified to preprocess them) */
22 static DEFINE_SPINLOCK(img_ir_decoders_lock
);
24 static bool img_ir_decoders_preprocessed
;
25 static struct img_ir_decoder
*img_ir_decoders
[] = {
26 #ifdef CONFIG_IR_IMG_NEC
29 #ifdef CONFIG_IR_IMG_JVC
32 #ifdef CONFIG_IR_IMG_SONY
35 #ifdef CONFIG_IR_IMG_SHARP
38 #ifdef CONFIG_IR_IMG_SANYO
41 #ifdef CONFIG_IR_IMG_RC5
44 #ifdef CONFIG_IR_IMG_RC6
50 #define IMG_IR_F_FILTER BIT(RC_FILTER_NORMAL) /* enable filtering */
51 #define IMG_IR_F_WAKE BIT(RC_FILTER_WAKEUP) /* enable waking */
53 /* code type quirks */
55 #define IMG_IR_QUIRK_CODE_BROKEN 0x1 /* Decode is broken */
56 #define IMG_IR_QUIRK_CODE_LEN_INCR 0x2 /* Bit length needs increment */
58 * The decoder generates rapid interrupts without actually having
59 * received any new data after an incomplete IR code is decoded.
61 #define IMG_IR_QUIRK_CODE_IRQ 0x4
63 /* functions for preprocessing timings, ensuring max is set */
65 static void img_ir_timing_preprocess(struct img_ir_timing_range
*range
,
68 if (range
->max
< range
->min
)
69 range
->max
= range
->min
;
71 /* multiply by unit and convert to microseconds */
72 range
->min
= (range
->min
*unit
)/1000;
73 range
->max
= (range
->max
*unit
+ 999)/1000; /* round up */
77 static void img_ir_symbol_timing_preprocess(struct img_ir_symbol_timing
*timing
,
80 img_ir_timing_preprocess(&timing
->pulse
, unit
);
81 img_ir_timing_preprocess(&timing
->space
, unit
);
84 static void img_ir_timings_preprocess(struct img_ir_timings
*timings
,
87 img_ir_symbol_timing_preprocess(&timings
->ldr
, unit
);
88 img_ir_symbol_timing_preprocess(&timings
->s00
, unit
);
89 img_ir_symbol_timing_preprocess(&timings
->s01
, unit
);
90 img_ir_symbol_timing_preprocess(&timings
->s10
, unit
);
91 img_ir_symbol_timing_preprocess(&timings
->s11
, unit
);
92 /* default s10 and s11 to s00 and s01 if no leader */
94 /* multiply by unit and convert to microseconds (round up) */
95 timings
->ft
.ft_min
= (timings
->ft
.ft_min
*unit
+ 999)/1000;
98 /* functions for filling empty fields with defaults */
100 static void img_ir_timing_defaults(struct img_ir_timing_range
*range
,
101 struct img_ir_timing_range
*defaults
)
104 range
->min
= defaults
->min
;
106 range
->max
= defaults
->max
;
109 static void img_ir_symbol_timing_defaults(struct img_ir_symbol_timing
*timing
,
110 struct img_ir_symbol_timing
*defaults
)
112 img_ir_timing_defaults(&timing
->pulse
, &defaults
->pulse
);
113 img_ir_timing_defaults(&timing
->space
, &defaults
->space
);
116 static void img_ir_timings_defaults(struct img_ir_timings
*timings
,
117 struct img_ir_timings
*defaults
)
119 img_ir_symbol_timing_defaults(&timings
->ldr
, &defaults
->ldr
);
120 img_ir_symbol_timing_defaults(&timings
->s00
, &defaults
->s00
);
121 img_ir_symbol_timing_defaults(&timings
->s01
, &defaults
->s01
);
122 img_ir_symbol_timing_defaults(&timings
->s10
, &defaults
->s10
);
123 img_ir_symbol_timing_defaults(&timings
->s11
, &defaults
->s11
);
124 if (!timings
->ft
.ft_min
)
125 timings
->ft
.ft_min
= defaults
->ft
.ft_min
;
128 /* functions for converting timings to register values */
131 * img_ir_control() - Convert control struct to control register value.
132 * @control: Control data
134 * Returns: The control register value equivalent of @control.
136 static u32
img_ir_control(const struct img_ir_control
*control
)
138 u32 ctrl
= control
->code_type
<< IMG_IR_CODETYPE_SHIFT
;
139 if (control
->decoden
)
140 ctrl
|= IMG_IR_DECODEN
;
142 ctrl
|= IMG_IR_HDRTOG
;
144 ctrl
|= IMG_IR_LDRDEC
;
145 if (control
->decodinpol
)
146 ctrl
|= IMG_IR_DECODINPOL
;
147 if (control
->bitorien
)
148 ctrl
|= IMG_IR_BITORIEN
;
149 if (control
->d1validsel
)
150 ctrl
|= IMG_IR_D1VALIDSEL
;
152 ctrl
|= IMG_IR_BITINV
;
153 if (control
->decodend2
)
154 ctrl
|= IMG_IR_DECODEND2
;
155 if (control
->bitoriend2
)
156 ctrl
|= IMG_IR_BITORIEND2
;
157 if (control
->bitinvd2
)
158 ctrl
|= IMG_IR_BITINVD2
;
163 * img_ir_timing_range_convert() - Convert microsecond range.
164 * @out: Output timing range in clock cycles with a shift.
165 * @in: Input timing range in microseconds.
166 * @tolerance: Tolerance as a fraction of 128 (roughly percent).
167 * @clock_hz: IR clock rate in Hz.
168 * @shift: Shift of output units.
170 * Converts min and max from microseconds to IR clock cycles, applies a
171 * tolerance, and shifts for the register, rounding in the right direction.
172 * Note that in and out can safely be the same object.
174 static void img_ir_timing_range_convert(struct img_ir_timing_range
*out
,
175 const struct img_ir_timing_range
*in
,
176 unsigned int tolerance
,
177 unsigned long clock_hz
,
180 unsigned int min
= in
->min
;
181 unsigned int max
= in
->max
;
182 /* add a tolerance */
183 min
= min
- (min
*tolerance
>> 7);
184 max
= max
+ (max
*tolerance
>> 7);
185 /* convert from microseconds into clock cycles */
186 min
= min
*clock_hz
/ 1000000;
187 max
= (max
*clock_hz
+ 999999) / 1000000; /* round up */
188 /* apply shift and copy to output */
189 out
->min
= min
>> shift
;
190 out
->max
= (max
+ ((1 << shift
) - 1)) >> shift
; /* round up */
194 * img_ir_symbol_timing() - Convert symbol timing struct to register value.
195 * @timing: Symbol timing data
196 * @tolerance: Timing tolerance where 0-128 represents 0-100%
197 * @clock_hz: Frequency of source clock in Hz
198 * @pd_shift: Shift to apply to symbol period
199 * @w_shift: Shift to apply to symbol width
201 * Returns: Symbol timing register value based on arguments.
203 static u32
img_ir_symbol_timing(const struct img_ir_symbol_timing
*timing
,
204 unsigned int tolerance
,
205 unsigned long clock_hz
,
206 unsigned int pd_shift
,
207 unsigned int w_shift
)
209 struct img_ir_timing_range hw_pulse
, hw_period
;
210 /* we calculate period in hw_period, then convert in place */
211 hw_period
.min
= timing
->pulse
.min
+ timing
->space
.min
;
212 hw_period
.max
= timing
->pulse
.max
+ timing
->space
.max
;
213 img_ir_timing_range_convert(&hw_period
, &hw_period
,
214 tolerance
, clock_hz
, pd_shift
);
215 img_ir_timing_range_convert(&hw_pulse
, &timing
->pulse
,
216 tolerance
, clock_hz
, w_shift
);
217 /* construct register value */
218 return (hw_period
.max
<< IMG_IR_PD_MAX_SHIFT
) |
219 (hw_period
.min
<< IMG_IR_PD_MIN_SHIFT
) |
220 (hw_pulse
.max
<< IMG_IR_W_MAX_SHIFT
) |
221 (hw_pulse
.min
<< IMG_IR_W_MIN_SHIFT
);
225 * img_ir_free_timing() - Convert free time timing struct to register value.
226 * @timing: Free symbol timing data
227 * @clock_hz: Source clock frequency in Hz
229 * Returns: Free symbol timing register value.
231 static u32
img_ir_free_timing(const struct img_ir_free_timing
*timing
,
232 unsigned long clock_hz
)
234 unsigned int minlen
, maxlen
, ft_min
;
235 /* minlen is only 5 bits, and round minlen to multiple of 2 */
236 if (timing
->minlen
< 30)
237 minlen
= timing
->minlen
& -2;
240 /* maxlen has maximum value of 48, and round maxlen to multiple of 2 */
241 if (timing
->maxlen
< 48)
242 maxlen
= (timing
->maxlen
+ 1) & -2;
245 /* convert and shift ft_min, rounding upwards */
246 ft_min
= (timing
->ft_min
*clock_hz
+ 999999) / 1000000;
247 ft_min
= (ft_min
+ 7) >> 3;
248 /* construct register value */
249 return (maxlen
<< IMG_IR_MAXLEN_SHIFT
) |
250 (minlen
<< IMG_IR_MINLEN_SHIFT
) |
251 (ft_min
<< IMG_IR_FT_MIN_SHIFT
);
255 * img_ir_free_timing_dynamic() - Update free time register value.
256 * @st_ft: Static free time register value from img_ir_free_timing.
257 * @filter: Current filter which may additionally restrict min/max len.
259 * Returns: Updated free time register value based on the current filter.
261 static u32
img_ir_free_timing_dynamic(u32 st_ft
, struct img_ir_filter
*filter
)
263 unsigned int minlen
, maxlen
, newminlen
, newmaxlen
;
265 /* round minlen, maxlen to multiple of 2 */
266 newminlen
= filter
->minlen
& -2;
267 newmaxlen
= (filter
->maxlen
+ 1) & -2;
268 /* extract min/max len from register */
269 minlen
= (st_ft
& IMG_IR_MINLEN
) >> IMG_IR_MINLEN_SHIFT
;
270 maxlen
= (st_ft
& IMG_IR_MAXLEN
) >> IMG_IR_MAXLEN_SHIFT
;
271 /* if the new values are more restrictive, update the register value */
272 if (newminlen
> minlen
) {
273 st_ft
&= ~IMG_IR_MINLEN
;
274 st_ft
|= newminlen
<< IMG_IR_MINLEN_SHIFT
;
276 if (newmaxlen
< maxlen
) {
277 st_ft
&= ~IMG_IR_MAXLEN
;
278 st_ft
|= newmaxlen
<< IMG_IR_MAXLEN_SHIFT
;
284 * img_ir_timings_convert() - Convert timings to register values
285 * @regs: Output timing register values
286 * @timings: Input timing data
287 * @tolerance: Timing tolerance where 0-128 represents 0-100%
288 * @clock_hz: Source clock frequency in Hz
290 static void img_ir_timings_convert(struct img_ir_timing_regvals
*regs
,
291 const struct img_ir_timings
*timings
,
292 unsigned int tolerance
,
293 unsigned int clock_hz
)
295 /* leader symbol timings are divided by 16 */
296 regs
->ldr
= img_ir_symbol_timing(&timings
->ldr
, tolerance
, clock_hz
,
298 /* other symbol timings, pd fields only are divided by 2 */
299 regs
->s00
= img_ir_symbol_timing(&timings
->s00
, tolerance
, clock_hz
,
301 regs
->s01
= img_ir_symbol_timing(&timings
->s01
, tolerance
, clock_hz
,
303 regs
->s10
= img_ir_symbol_timing(&timings
->s10
, tolerance
, clock_hz
,
305 regs
->s11
= img_ir_symbol_timing(&timings
->s11
, tolerance
, clock_hz
,
307 regs
->ft
= img_ir_free_timing(&timings
->ft
, clock_hz
);
311 * img_ir_decoder_preprocess() - Preprocess timings in decoder.
312 * @decoder: Decoder to be preprocessed.
314 * Ensures that the symbol timing ranges are valid with respect to ordering, and
315 * does some fixed conversion on them.
317 static void img_ir_decoder_preprocess(struct img_ir_decoder
*decoder
)
319 /* default tolerance */
320 if (!decoder
->tolerance
)
321 decoder
->tolerance
= 10; /* percent */
322 /* and convert tolerance to fraction out of 128 */
323 decoder
->tolerance
= decoder
->tolerance
* 128 / 100;
325 /* fill in implicit fields */
326 img_ir_timings_preprocess(&decoder
->timings
, decoder
->unit
);
328 /* do the same for repeat timings if applicable */
329 if (decoder
->repeat
) {
330 img_ir_timings_preprocess(&decoder
->rtimings
, decoder
->unit
);
331 img_ir_timings_defaults(&decoder
->rtimings
, &decoder
->timings
);
336 * img_ir_decoder_convert() - Generate internal timings in decoder.
337 * @decoder: Decoder to be converted to internal timings.
338 * @reg_timings: Timing register values.
339 * @clock_hz: IR clock rate in Hz.
341 * Fills out the repeat timings and timing register values for a specific clock
344 static void img_ir_decoder_convert(const struct img_ir_decoder
*decoder
,
345 struct img_ir_reg_timings
*reg_timings
,
346 unsigned int clock_hz
)
348 /* calculate control value */
349 reg_timings
->ctrl
= img_ir_control(&decoder
->control
);
351 /* fill in implicit fields and calculate register values */
352 img_ir_timings_convert(®_timings
->timings
, &decoder
->timings
,
353 decoder
->tolerance
, clock_hz
);
355 /* do the same for repeat timings if applicable */
357 img_ir_timings_convert(®_timings
->rtimings
,
358 &decoder
->rtimings
, decoder
->tolerance
,
363 * img_ir_write_timings() - Write timings to the hardware now
364 * @priv: IR private data
365 * @regs: Timing register values to write
366 * @type: RC filter type (RC_FILTER_*)
368 * Write timing register values @regs to the hardware, taking into account the
369 * current filter which may impose restrictions on the length of the expected
372 static void img_ir_write_timings(struct img_ir_priv
*priv
,
373 struct img_ir_timing_regvals
*regs
,
374 enum rc_filter_type type
)
376 struct img_ir_priv_hw
*hw
= &priv
->hw
;
378 /* filter may be more restrictive to minlen, maxlen */
380 if (hw
->flags
& BIT(type
))
381 ft
= img_ir_free_timing_dynamic(regs
->ft
, &hw
->filters
[type
]);
382 /* write to registers */
383 img_ir_write(priv
, IMG_IR_LEAD_SYMB_TIMING
, regs
->ldr
);
384 img_ir_write(priv
, IMG_IR_S00_SYMB_TIMING
, regs
->s00
);
385 img_ir_write(priv
, IMG_IR_S01_SYMB_TIMING
, regs
->s01
);
386 img_ir_write(priv
, IMG_IR_S10_SYMB_TIMING
, regs
->s10
);
387 img_ir_write(priv
, IMG_IR_S11_SYMB_TIMING
, regs
->s11
);
388 img_ir_write(priv
, IMG_IR_FREE_SYMB_TIMING
, ft
);
389 dev_dbg(priv
->dev
, "timings: ldr=%#x, s=[%#x, %#x, %#x, %#x], ft=%#x\n",
390 regs
->ldr
, regs
->s00
, regs
->s01
, regs
->s10
, regs
->s11
, ft
);
393 static void img_ir_write_filter(struct img_ir_priv
*priv
,
394 struct img_ir_filter
*filter
)
397 dev_dbg(priv
->dev
, "IR filter=%016llx & %016llx\n",
398 (unsigned long long)filter
->data
,
399 (unsigned long long)filter
->mask
);
400 img_ir_write(priv
, IMG_IR_IRQ_MSG_DATA_LW
, (u32
)filter
->data
);
401 img_ir_write(priv
, IMG_IR_IRQ_MSG_DATA_UP
, (u32
)(filter
->data
403 img_ir_write(priv
, IMG_IR_IRQ_MSG_MASK_LW
, (u32
)filter
->mask
);
404 img_ir_write(priv
, IMG_IR_IRQ_MSG_MASK_UP
, (u32
)(filter
->mask
407 dev_dbg(priv
->dev
, "IR clearing filter\n");
408 img_ir_write(priv
, IMG_IR_IRQ_MSG_MASK_LW
, 0);
409 img_ir_write(priv
, IMG_IR_IRQ_MSG_MASK_UP
, 0);
413 /* caller must have lock */
414 static void _img_ir_set_filter(struct img_ir_priv
*priv
,
415 struct img_ir_filter
*filter
)
417 struct img_ir_priv_hw
*hw
= &priv
->hw
;
420 irq_en
= img_ir_read(priv
, IMG_IR_IRQ_ENABLE
);
422 /* Only use the match interrupt */
423 hw
->filters
[RC_FILTER_NORMAL
] = *filter
;
424 hw
->flags
|= IMG_IR_F_FILTER
;
425 irq_on
= IMG_IR_IRQ_DATA_MATCH
;
426 irq_en
&= ~(IMG_IR_IRQ_DATA_VALID
| IMG_IR_IRQ_DATA2_VALID
);
428 /* Only use the valid interrupt */
429 hw
->flags
&= ~IMG_IR_F_FILTER
;
430 irq_en
&= ~IMG_IR_IRQ_DATA_MATCH
;
431 irq_on
= IMG_IR_IRQ_DATA_VALID
| IMG_IR_IRQ_DATA2_VALID
;
435 img_ir_write_filter(priv
, filter
);
436 /* clear any interrupts we're enabling so we don't handle old ones */
437 img_ir_write(priv
, IMG_IR_IRQ_CLEAR
, irq_on
);
438 img_ir_write(priv
, IMG_IR_IRQ_ENABLE
, irq_en
);
441 /* caller must have lock */
442 static void _img_ir_set_wake_filter(struct img_ir_priv
*priv
,
443 struct img_ir_filter
*filter
)
445 struct img_ir_priv_hw
*hw
= &priv
->hw
;
447 /* Enable wake, and copy filter for later */
448 hw
->filters
[RC_FILTER_WAKEUP
] = *filter
;
449 hw
->flags
|= IMG_IR_F_WAKE
;
452 hw
->flags
&= ~IMG_IR_F_WAKE
;
456 /* Callback for setting scancode filter */
457 static int img_ir_set_filter(struct rc_dev
*dev
, enum rc_filter_type type
,
458 struct rc_scancode_filter
*sc_filter
)
460 struct img_ir_priv
*priv
= dev
->priv
;
461 struct img_ir_priv_hw
*hw
= &priv
->hw
;
462 struct img_ir_filter filter
, *filter_ptr
= &filter
;
465 dev_dbg(priv
->dev
, "IR scancode %sfilter=%08x & %08x\n",
466 type
== RC_FILTER_WAKEUP
? "wake " : "",
470 spin_lock_irq(&priv
->lock
);
472 /* filtering can always be disabled */
473 if (!sc_filter
->mask
) {
478 /* current decoder must support scancode filtering */
479 if (!hw
->decoder
|| !hw
->decoder
->filter
) {
484 /* convert scancode filter to raw filter */
487 if (type
== RC_FILTER_NORMAL
) {
488 /* guess scancode from protocol */
489 ret
= hw
->decoder
->filter(sc_filter
, &filter
,
490 dev
->enabled_protocols
);
492 /* for wakeup user provided exact protocol variant */
493 ret
= hw
->decoder
->filter(sc_filter
, &filter
,
494 1ULL << dev
->wakeup_protocol
);
498 dev_dbg(priv
->dev
, "IR raw %sfilter=%016llx & %016llx\n",
499 type
== RC_FILTER_WAKEUP
? "wake " : "",
500 (unsigned long long)filter
.data
,
501 (unsigned long long)filter
.mask
);
504 /* apply raw filters */
506 case RC_FILTER_NORMAL
:
507 _img_ir_set_filter(priv
, filter_ptr
);
509 case RC_FILTER_WAKEUP
:
510 _img_ir_set_wake_filter(priv
, filter_ptr
);
517 spin_unlock_irq(&priv
->lock
);
521 static int img_ir_set_normal_filter(struct rc_dev
*dev
,
522 struct rc_scancode_filter
*sc_filter
)
524 return img_ir_set_filter(dev
, RC_FILTER_NORMAL
, sc_filter
);
527 static int img_ir_set_wakeup_filter(struct rc_dev
*dev
,
528 struct rc_scancode_filter
*sc_filter
)
530 return img_ir_set_filter(dev
, RC_FILTER_WAKEUP
, sc_filter
);
534 * img_ir_set_decoder() - Set the current decoder.
535 * @priv: IR private data.
536 * @decoder: Decoder to use with immediate effect.
537 * @proto: Protocol bitmap (or 0 to use decoder->type).
539 static void img_ir_set_decoder(struct img_ir_priv
*priv
,
540 const struct img_ir_decoder
*decoder
,
543 struct img_ir_priv_hw
*hw
= &priv
->hw
;
544 struct rc_dev
*rdev
= hw
->rdev
;
545 u32 ir_status
, irq_en
;
546 spin_lock_irq(&priv
->lock
);
549 * First record that the protocol is being stopped so that the end timer
550 * isn't restarted while we're trying to stop it.
555 * Release the lock to stop the end timer, since the end timer handler
556 * acquires the lock and we don't want to deadlock waiting for it.
558 spin_unlock_irq(&priv
->lock
);
559 del_timer_sync(&hw
->end_timer
);
560 del_timer_sync(&hw
->suspend_timer
);
561 spin_lock_irq(&priv
->lock
);
563 hw
->stopping
= false;
565 /* switch off and disable interrupts */
566 img_ir_write(priv
, IMG_IR_CONTROL
, 0);
567 irq_en
= img_ir_read(priv
, IMG_IR_IRQ_ENABLE
);
568 img_ir_write(priv
, IMG_IR_IRQ_ENABLE
, irq_en
& IMG_IR_IRQ_EDGE
);
569 img_ir_write(priv
, IMG_IR_IRQ_CLEAR
, IMG_IR_IRQ_ALL
& ~IMG_IR_IRQ_EDGE
);
571 /* ack any data already detected */
572 ir_status
= img_ir_read(priv
, IMG_IR_STATUS
);
573 if (ir_status
& (IMG_IR_RXDVAL
| IMG_IR_RXDVALD2
)) {
574 ir_status
&= ~(IMG_IR_RXDVAL
| IMG_IR_RXDVALD2
);
575 img_ir_write(priv
, IMG_IR_STATUS
, ir_status
);
578 /* always read data to clear buffer if IR wakes the device */
579 img_ir_read(priv
, IMG_IR_DATA_LW
);
580 img_ir_read(priv
, IMG_IR_DATA_UP
);
582 /* switch back to normal mode */
583 hw
->mode
= IMG_IR_M_NORMAL
;
585 /* clear the wakeup scancode filter */
586 rdev
->scancode_wakeup_filter
.data
= 0;
587 rdev
->scancode_wakeup_filter
.mask
= 0;
588 rdev
->wakeup_protocol
= RC_PROTO_UNKNOWN
;
590 /* clear raw filters */
591 _img_ir_set_filter(priv
, NULL
);
592 _img_ir_set_wake_filter(priv
, NULL
);
594 /* clear the enabled protocols */
595 hw
->enabled_protocols
= 0;
598 hw
->decoder
= decoder
;
602 /* set the enabled protocols */
604 proto
= decoder
->type
;
605 hw
->enabled_protocols
= proto
;
607 /* write the new timings */
608 img_ir_decoder_convert(decoder
, &hw
->reg_timings
, hw
->clk_hz
);
609 img_ir_write_timings(priv
, &hw
->reg_timings
.timings
, RC_FILTER_NORMAL
);
611 /* set up and enable */
612 img_ir_write(priv
, IMG_IR_CONTROL
, hw
->reg_timings
.ctrl
);
616 spin_unlock_irq(&priv
->lock
);
620 * img_ir_decoder_compatable() - Find whether a decoder will work with a device.
621 * @priv: IR private data.
622 * @dec: Decoder to check.
624 * Returns: true if @dec is compatible with the device @priv refers to.
626 static bool img_ir_decoder_compatible(struct img_ir_priv
*priv
,
627 const struct img_ir_decoder
*dec
)
631 /* don't accept decoders using code types which aren't supported */
632 ct
= dec
->control
.code_type
;
633 if (priv
->hw
.ct_quirks
[ct
] & IMG_IR_QUIRK_CODE_BROKEN
)
640 * img_ir_allowed_protos() - Get allowed protocols from global decoder list.
641 * @priv: IR private data.
643 * Returns: Mask of protocols supported by the device @priv refers to.
645 static u64
img_ir_allowed_protos(struct img_ir_priv
*priv
)
648 struct img_ir_decoder
**decp
;
650 for (decp
= img_ir_decoders
; *decp
; ++decp
) {
651 const struct img_ir_decoder
*dec
= *decp
;
652 if (img_ir_decoder_compatible(priv
, dec
))
658 /* Callback for changing protocol using sysfs */
659 static int img_ir_change_protocol(struct rc_dev
*dev
, u64
*ir_type
)
661 struct img_ir_priv
*priv
= dev
->priv
;
662 struct img_ir_priv_hw
*hw
= &priv
->hw
;
663 struct rc_dev
*rdev
= hw
->rdev
;
664 struct img_ir_decoder
**decp
;
665 u64 wakeup_protocols
;
668 /* disable all protocols */
669 img_ir_set_decoder(priv
, NULL
, 0);
672 for (decp
= img_ir_decoders
; *decp
; ++decp
) {
673 const struct img_ir_decoder
*dec
= *decp
;
674 if (!img_ir_decoder_compatible(priv
, dec
))
676 if (*ir_type
& dec
->type
) {
677 *ir_type
&= dec
->type
;
678 img_ir_set_decoder(priv
, dec
, *ir_type
);
686 * Only allow matching wakeup protocols for now, and only if filtering
689 wakeup_protocols
= *ir_type
;
690 if (!hw
->decoder
|| !hw
->decoder
->filter
)
691 wakeup_protocols
= 0;
692 rdev
->allowed_wakeup_protocols
= wakeup_protocols
;
696 /* Changes ir-core protocol device attribute */
697 static void img_ir_set_protocol(struct img_ir_priv
*priv
, u64 proto
)
699 struct rc_dev
*rdev
= priv
->hw
.rdev
;
701 mutex_lock(&rdev
->lock
);
702 rdev
->enabled_protocols
= proto
;
703 rdev
->allowed_wakeup_protocols
= proto
;
704 mutex_unlock(&rdev
->lock
);
707 /* Set up IR decoders */
708 static void img_ir_init_decoders(void)
710 struct img_ir_decoder
**decp
;
712 spin_lock(&img_ir_decoders_lock
);
713 if (!img_ir_decoders_preprocessed
) {
714 for (decp
= img_ir_decoders
; *decp
; ++decp
)
715 img_ir_decoder_preprocess(*decp
);
716 img_ir_decoders_preprocessed
= true;
718 spin_unlock(&img_ir_decoders_lock
);
721 #ifdef CONFIG_PM_SLEEP
723 * img_ir_enable_wake() - Switch to wake mode.
724 * @priv: IR private data.
726 * Returns: non-zero if the IR can wake the system.
728 static int img_ir_enable_wake(struct img_ir_priv
*priv
)
730 struct img_ir_priv_hw
*hw
= &priv
->hw
;
733 spin_lock_irq(&priv
->lock
);
734 if (hw
->flags
& IMG_IR_F_WAKE
) {
735 /* interrupt only on a match */
736 hw
->suspend_irqen
= img_ir_read(priv
, IMG_IR_IRQ_ENABLE
);
737 img_ir_write(priv
, IMG_IR_IRQ_ENABLE
, IMG_IR_IRQ_DATA_MATCH
);
738 img_ir_write_filter(priv
, &hw
->filters
[RC_FILTER_WAKEUP
]);
739 img_ir_write_timings(priv
, &hw
->reg_timings
.timings
,
741 hw
->mode
= IMG_IR_M_WAKE
;
744 spin_unlock_irq(&priv
->lock
);
749 * img_ir_disable_wake() - Switch out of wake mode.
750 * @priv: IR private data
752 * Returns: 1 if the hardware should be allowed to wake from a sleep state.
755 static int img_ir_disable_wake(struct img_ir_priv
*priv
)
757 struct img_ir_priv_hw
*hw
= &priv
->hw
;
760 spin_lock_irq(&priv
->lock
);
761 if (hw
->flags
& IMG_IR_F_WAKE
) {
762 /* restore normal filtering */
763 if (hw
->flags
& IMG_IR_F_FILTER
) {
764 img_ir_write(priv
, IMG_IR_IRQ_ENABLE
,
765 (hw
->suspend_irqen
& IMG_IR_IRQ_EDGE
) |
766 IMG_IR_IRQ_DATA_MATCH
);
767 img_ir_write_filter(priv
,
768 &hw
->filters
[RC_FILTER_NORMAL
]);
770 img_ir_write(priv
, IMG_IR_IRQ_ENABLE
,
771 (hw
->suspend_irqen
& IMG_IR_IRQ_EDGE
) |
772 IMG_IR_IRQ_DATA_VALID
|
773 IMG_IR_IRQ_DATA2_VALID
);
774 img_ir_write_filter(priv
, NULL
);
776 img_ir_write_timings(priv
, &hw
->reg_timings
.timings
,
778 hw
->mode
= IMG_IR_M_NORMAL
;
781 spin_unlock_irq(&priv
->lock
);
784 #endif /* CONFIG_PM_SLEEP */
786 /* lock must be held */
787 static void img_ir_begin_repeat(struct img_ir_priv
*priv
)
789 struct img_ir_priv_hw
*hw
= &priv
->hw
;
790 if (hw
->mode
== IMG_IR_M_NORMAL
) {
791 /* switch to repeat timings */
792 img_ir_write(priv
, IMG_IR_CONTROL
, 0);
793 hw
->mode
= IMG_IR_M_REPEATING
;
794 img_ir_write_timings(priv
, &hw
->reg_timings
.rtimings
,
796 img_ir_write(priv
, IMG_IR_CONTROL
, hw
->reg_timings
.ctrl
);
800 /* lock must be held */
801 static void img_ir_end_repeat(struct img_ir_priv
*priv
)
803 struct img_ir_priv_hw
*hw
= &priv
->hw
;
804 if (hw
->mode
== IMG_IR_M_REPEATING
) {
805 /* switch to normal timings */
806 img_ir_write(priv
, IMG_IR_CONTROL
, 0);
807 hw
->mode
= IMG_IR_M_NORMAL
;
808 img_ir_write_timings(priv
, &hw
->reg_timings
.timings
,
810 img_ir_write(priv
, IMG_IR_CONTROL
, hw
->reg_timings
.ctrl
);
814 /* lock must be held */
815 static void img_ir_handle_data(struct img_ir_priv
*priv
, u32 len
, u64 raw
)
817 struct img_ir_priv_hw
*hw
= &priv
->hw
;
818 const struct img_ir_decoder
*dec
= hw
->decoder
;
819 int ret
= IMG_IR_SCANCODE
;
820 struct img_ir_scancode_req request
;
822 request
.protocol
= RC_PROTO_UNKNOWN
;
826 ret
= dec
->scancode(len
, raw
, hw
->enabled_protocols
, &request
);
828 request
.scancode
= (u32
)raw
;
830 request
.scancode
= (u32
)raw
& ((1 << len
)-1);
831 dev_dbg(priv
->dev
, "data (%u bits) = %#llx\n",
832 len
, (unsigned long long)raw
);
833 if (ret
== IMG_IR_SCANCODE
) {
834 dev_dbg(priv
->dev
, "decoded scan code %#x, toggle %u\n",
835 request
.scancode
, request
.toggle
);
836 rc_keydown(hw
->rdev
, request
.protocol
, request
.scancode
,
838 img_ir_end_repeat(priv
);
839 } else if (ret
== IMG_IR_REPEATCODE
) {
840 if (hw
->mode
== IMG_IR_M_REPEATING
) {
841 dev_dbg(priv
->dev
, "decoded repeat code\n");
844 dev_dbg(priv
->dev
, "decoded unexpected repeat code, ignoring\n");
847 dev_dbg(priv
->dev
, "decode failed (%d)\n", ret
);
852 /* we mustn't update the end timer while trying to stop it */
853 if (dec
->repeat
&& !hw
->stopping
) {
854 unsigned long interval
;
856 img_ir_begin_repeat(priv
);
858 /* update timer, but allowing for 1/8th tolerance */
859 interval
= dec
->repeat
+ (dec
->repeat
>> 3);
860 mod_timer(&hw
->end_timer
,
861 jiffies
+ msecs_to_jiffies(interval
));
865 /* timer function to end waiting for repeat. */
866 static void img_ir_end_timer(struct timer_list
*t
)
868 struct img_ir_priv
*priv
= from_timer(priv
, t
, hw
.end_timer
);
870 spin_lock_irq(&priv
->lock
);
871 img_ir_end_repeat(priv
);
872 spin_unlock_irq(&priv
->lock
);
876 * Timer function to re-enable the current protocol after it had been
877 * cleared when invalid interrupts were generated due to a quirk in the
880 static void img_ir_suspend_timer(struct timer_list
*t
)
882 struct img_ir_priv
*priv
= from_timer(priv
, t
, hw
.suspend_timer
);
884 spin_lock_irq(&priv
->lock
);
886 * Don't overwrite enabled valid/match IRQs if they have already been
887 * changed by e.g. a filter change.
889 if ((priv
->hw
.quirk_suspend_irq
& IMG_IR_IRQ_EDGE
) ==
890 img_ir_read(priv
, IMG_IR_IRQ_ENABLE
))
891 img_ir_write(priv
, IMG_IR_IRQ_ENABLE
,
892 priv
->hw
.quirk_suspend_irq
);
894 img_ir_write(priv
, IMG_IR_CONTROL
, priv
->hw
.reg_timings
.ctrl
);
895 spin_unlock_irq(&priv
->lock
);
898 #ifdef CONFIG_COMMON_CLK
899 static void img_ir_change_frequency(struct img_ir_priv
*priv
,
900 struct clk_notifier_data
*change
)
902 struct img_ir_priv_hw
*hw
= &priv
->hw
;
904 dev_dbg(priv
->dev
, "clk changed %lu HZ -> %lu HZ\n",
905 change
->old_rate
, change
->new_rate
);
907 spin_lock_irq(&priv
->lock
);
908 if (hw
->clk_hz
== change
->new_rate
)
910 hw
->clk_hz
= change
->new_rate
;
911 /* refresh current timings */
913 img_ir_decoder_convert(hw
->decoder
, &hw
->reg_timings
,
916 case IMG_IR_M_NORMAL
:
917 img_ir_write_timings(priv
, &hw
->reg_timings
.timings
,
920 case IMG_IR_M_REPEATING
:
921 img_ir_write_timings(priv
, &hw
->reg_timings
.rtimings
,
924 #ifdef CONFIG_PM_SLEEP
926 img_ir_write_timings(priv
, &hw
->reg_timings
.timings
,
933 spin_unlock_irq(&priv
->lock
);
936 static int img_ir_clk_notify(struct notifier_block
*self
, unsigned long action
,
939 struct img_ir_priv
*priv
= container_of(self
, struct img_ir_priv
,
942 case POST_RATE_CHANGE
:
943 img_ir_change_frequency(priv
, data
);
950 #endif /* CONFIG_COMMON_CLK */
952 /* called with priv->lock held */
953 void img_ir_isr_hw(struct img_ir_priv
*priv
, u32 irq_status
)
955 struct img_ir_priv_hw
*hw
= &priv
->hw
;
956 u32 ir_status
, len
, lw
, up
;
959 /* use the current decoder */
963 ct
= hw
->decoder
->control
.code_type
;
965 ir_status
= img_ir_read(priv
, IMG_IR_STATUS
);
966 if (!(ir_status
& (IMG_IR_RXDVAL
| IMG_IR_RXDVALD2
))) {
967 if (!(priv
->hw
.ct_quirks
[ct
] & IMG_IR_QUIRK_CODE_IRQ
) ||
971 * The below functionality is added as a work around to stop
972 * multiple Interrupts generated when an incomplete IR code is
973 * received by the decoder.
974 * The decoder generates rapid interrupts without actually
975 * having received any new data. After a single interrupt it's
976 * expected to clear up, but instead multiple interrupts are
977 * rapidly generated. only way to get out of this loop is to
978 * reset the control register after a short delay.
980 img_ir_write(priv
, IMG_IR_CONTROL
, 0);
981 hw
->quirk_suspend_irq
= img_ir_read(priv
, IMG_IR_IRQ_ENABLE
);
982 img_ir_write(priv
, IMG_IR_IRQ_ENABLE
,
983 hw
->quirk_suspend_irq
& IMG_IR_IRQ_EDGE
);
985 /* Timer activated to re-enable the protocol. */
986 mod_timer(&hw
->suspend_timer
,
987 jiffies
+ msecs_to_jiffies(5));
990 ir_status
&= ~(IMG_IR_RXDVAL
| IMG_IR_RXDVALD2
);
991 img_ir_write(priv
, IMG_IR_STATUS
, ir_status
);
993 len
= (ir_status
& IMG_IR_RXDLEN
) >> IMG_IR_RXDLEN_SHIFT
;
994 /* some versions report wrong length for certain code types */
995 if (hw
->ct_quirks
[ct
] & IMG_IR_QUIRK_CODE_LEN_INCR
)
998 lw
= img_ir_read(priv
, IMG_IR_DATA_LW
);
999 up
= img_ir_read(priv
, IMG_IR_DATA_UP
);
1000 img_ir_handle_data(priv
, len
, (u64
)up
<< 32 | lw
);
1003 void img_ir_setup_hw(struct img_ir_priv
*priv
)
1005 struct img_ir_decoder
**decp
;
1010 /* Use the first available decoder (or disable stuff if NULL) */
1011 for (decp
= img_ir_decoders
; *decp
; ++decp
) {
1012 const struct img_ir_decoder
*dec
= *decp
;
1013 if (img_ir_decoder_compatible(priv
, dec
)) {
1014 img_ir_set_protocol(priv
, dec
->type
);
1015 img_ir_set_decoder(priv
, dec
, 0);
1019 img_ir_set_decoder(priv
, NULL
, 0);
1023 * img_ir_probe_hw_caps() - Probe capabilities of the hardware.
1024 * @priv: IR private data.
1026 static void img_ir_probe_hw_caps(struct img_ir_priv
*priv
)
1028 struct img_ir_priv_hw
*hw
= &priv
->hw
;
1030 * When a version of the block becomes available without these quirks,
1031 * they'll have to depend on the core revision.
1033 hw
->ct_quirks
[IMG_IR_CODETYPE_PULSELEN
]
1034 |= IMG_IR_QUIRK_CODE_LEN_INCR
;
1035 hw
->ct_quirks
[IMG_IR_CODETYPE_BIPHASE
]
1036 |= IMG_IR_QUIRK_CODE_IRQ
;
1037 hw
->ct_quirks
[IMG_IR_CODETYPE_2BITPULSEPOS
]
1038 |= IMG_IR_QUIRK_CODE_BROKEN
;
1041 int img_ir_probe_hw(struct img_ir_priv
*priv
)
1043 struct img_ir_priv_hw
*hw
= &priv
->hw
;
1044 struct rc_dev
*rdev
;
1047 /* Ensure hardware decoders have been preprocessed */
1048 img_ir_init_decoders();
1050 /* Probe hardware capabilities */
1051 img_ir_probe_hw_caps(priv
);
1053 /* Set up the end timer */
1054 timer_setup(&hw
->end_timer
, img_ir_end_timer
, 0);
1055 timer_setup(&hw
->suspend_timer
, img_ir_suspend_timer
, 0);
1057 /* Register a clock notifier */
1058 if (!IS_ERR(priv
->clk
)) {
1059 hw
->clk_hz
= clk_get_rate(priv
->clk
);
1060 #ifdef CONFIG_COMMON_CLK
1061 hw
->clk_nb
.notifier_call
= img_ir_clk_notify
;
1062 error
= clk_notifier_register(priv
->clk
, &hw
->clk_nb
);
1065 "failed to register clock notifier\n");
1071 /* Allocate hardware decoder */
1072 hw
->rdev
= rdev
= rc_allocate_device(RC_DRIVER_SCANCODE
);
1074 dev_err(priv
->dev
, "cannot allocate input device\n");
1079 rdev
->map_name
= RC_MAP_EMPTY
;
1080 rdev
->allowed_protocols
= img_ir_allowed_protos(priv
);
1081 rdev
->device_name
= "IMG Infrared Decoder";
1082 rdev
->s_filter
= img_ir_set_normal_filter
;
1083 rdev
->s_wakeup_filter
= img_ir_set_wakeup_filter
;
1085 /* Register hardware decoder */
1086 error
= rc_register_device(rdev
);
1088 dev_err(priv
->dev
, "failed to register IR input device\n");
1089 goto err_register_rc
;
1093 * Set this after rc_register_device as no protocols have been
1096 rdev
->change_protocol
= img_ir_change_protocol
;
1098 device_init_wakeup(priv
->dev
, 1);
1103 img_ir_set_decoder(priv
, NULL
, 0);
1105 rc_free_device(rdev
);
1107 #ifdef CONFIG_COMMON_CLK
1108 if (!IS_ERR(priv
->clk
))
1109 clk_notifier_unregister(priv
->clk
, &hw
->clk_nb
);
1114 void img_ir_remove_hw(struct img_ir_priv
*priv
)
1116 struct img_ir_priv_hw
*hw
= &priv
->hw
;
1117 struct rc_dev
*rdev
= hw
->rdev
;
1120 img_ir_set_decoder(priv
, NULL
, 0);
1122 rc_unregister_device(rdev
);
1123 #ifdef CONFIG_COMMON_CLK
1124 if (!IS_ERR(priv
->clk
))
1125 clk_notifier_unregister(priv
->clk
, &hw
->clk_nb
);
1129 #ifdef CONFIG_PM_SLEEP
1130 int img_ir_suspend(struct device
*dev
)
1132 struct img_ir_priv
*priv
= dev_get_drvdata(dev
);
1134 if (device_may_wakeup(dev
) && img_ir_enable_wake(priv
))
1135 enable_irq_wake(priv
->irq
);
1139 int img_ir_resume(struct device
*dev
)
1141 struct img_ir_priv
*priv
= dev_get_drvdata(dev
);
1143 if (device_may_wakeup(dev
) && img_ir_disable_wake(priv
))
1144 disable_irq_wake(priv
->irq
);
1147 #endif /* CONFIG_PM_SLEEP */