1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Realtek PCI-Express Memstick Card Interface driver
4 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
7 * Wei WANG <wei_wang@realsil.com.cn>
10 #include <linux/module.h>
11 #include <linux/highmem.h>
12 #include <linux/delay.h>
13 #include <linux/platform_device.h>
14 #include <linux/memstick.h>
15 #include <linux/rtsx_pci.h>
16 #include <asm/unaligned.h>
18 struct realtek_pci_ms
{
19 struct platform_device
*pdev
;
21 struct memstick_host
*msh
;
22 struct memstick_request
*req
;
24 struct mutex host_mutex
;
25 struct work_struct handle_req
;
33 static inline struct device
*ms_dev(struct realtek_pci_ms
*host
)
35 return &(host
->pdev
->dev
);
38 static inline void ms_clear_error(struct realtek_pci_ms
*host
)
40 rtsx_pci_write_register(host
->pcr
, CARD_STOP
,
41 MS_STOP
| MS_CLR_ERR
, MS_STOP
| MS_CLR_ERR
);
46 static void ms_print_debug_regs(struct realtek_pci_ms
*host
)
48 struct rtsx_pcr
*pcr
= host
->pcr
;
52 /* Print MS host internal registers */
53 rtsx_pci_init_cmd(pcr
);
54 for (i
= 0xFD40; i
<= 0xFD44; i
++)
55 rtsx_pci_add_cmd(pcr
, READ_REG_CMD
, i
, 0, 0);
56 for (i
= 0xFD52; i
<= 0xFD69; i
++)
57 rtsx_pci_add_cmd(pcr
, READ_REG_CMD
, i
, 0, 0);
58 rtsx_pci_send_cmd(pcr
, 100);
60 ptr
= rtsx_pci_get_cmd_data(pcr
);
61 for (i
= 0xFD40; i
<= 0xFD44; i
++)
62 dev_dbg(ms_dev(host
), "0x%04X: 0x%02x\n", i
, *(ptr
++));
63 for (i
= 0xFD52; i
<= 0xFD69; i
++)
64 dev_dbg(ms_dev(host
), "0x%04X: 0x%02x\n", i
, *(ptr
++));
69 #define ms_print_debug_regs(host)
73 static int ms_power_on(struct realtek_pci_ms
*host
)
75 struct rtsx_pcr
*pcr
= host
->pcr
;
78 rtsx_pci_init_cmd(pcr
);
79 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_SELECT
, 0x07, MS_MOD_SEL
);
80 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_SHARE_MODE
,
81 CARD_SHARE_MASK
, CARD_SHARE_48_MS
);
82 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_CLK_EN
,
83 MS_CLK_EN
, MS_CLK_EN
);
84 err
= rtsx_pci_send_cmd(pcr
, 100);
88 err
= rtsx_pci_card_pull_ctl_enable(pcr
, RTSX_MS_CARD
);
92 err
= rtsx_pci_card_power_on(pcr
, RTSX_MS_CARD
);
96 /* Wait ms power stable */
99 err
= rtsx_pci_write_register(pcr
, CARD_OE
,
100 MS_OUTPUT_EN
, MS_OUTPUT_EN
);
107 static int ms_power_off(struct realtek_pci_ms
*host
)
109 struct rtsx_pcr
*pcr
= host
->pcr
;
112 rtsx_pci_init_cmd(pcr
);
114 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_CLK_EN
, MS_CLK_EN
, 0);
115 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_OE
, MS_OUTPUT_EN
, 0);
117 err
= rtsx_pci_send_cmd(pcr
, 100);
121 err
= rtsx_pci_card_power_off(pcr
, RTSX_MS_CARD
);
125 return rtsx_pci_card_pull_ctl_disable(pcr
, RTSX_MS_CARD
);
128 static int ms_transfer_data(struct realtek_pci_ms
*host
, unsigned char data_dir
,
129 u8 tpc
, u8 cfg
, struct scatterlist
*sg
)
131 struct rtsx_pcr
*pcr
= host
->pcr
;
133 unsigned int length
= sg
->length
;
134 u16 sec_cnt
= (u16
)(length
/ 512);
135 u8 val
, trans_mode
, dma_dir
;
136 struct memstick_dev
*card
= host
->msh
->card
;
137 bool pro_card
= card
->id
.type
== MEMSTICK_TYPE_PRO
;
139 dev_dbg(ms_dev(host
), "%s: tpc = 0x%02x, data_dir = %s, length = %d\n",
140 __func__
, tpc
, (data_dir
== READ
) ? "READ" : "WRITE",
143 if (data_dir
== READ
) {
144 dma_dir
= DMA_DIR_FROM_CARD
;
145 trans_mode
= pro_card
? MS_TM_AUTO_READ
: MS_TM_NORMAL_READ
;
147 dma_dir
= DMA_DIR_TO_CARD
;
148 trans_mode
= pro_card
? MS_TM_AUTO_WRITE
: MS_TM_NORMAL_WRITE
;
151 rtsx_pci_init_cmd(pcr
);
153 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_TPC
, 0xFF, tpc
);
155 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_SECTOR_CNT_H
,
156 0xFF, (u8
)(sec_cnt
>> 8));
157 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_SECTOR_CNT_L
,
160 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_TRANS_CFG
, 0xFF, cfg
);
162 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, IRQSTAT0
,
163 DMA_DONE_INT
, DMA_DONE_INT
);
164 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, DMATC3
, 0xFF, (u8
)(length
>> 24));
165 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, DMATC2
, 0xFF, (u8
)(length
>> 16));
166 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, DMATC1
, 0xFF, (u8
)(length
>> 8));
167 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, DMATC0
, 0xFF, (u8
)length
);
168 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, DMACTL
,
169 0x03 | DMA_PACK_SIZE_MASK
, dma_dir
| DMA_EN
| DMA_512
);
170 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_DATA_SOURCE
,
173 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_TRANSFER
,
174 0xFF, MS_TRANSFER_START
| trans_mode
);
175 rtsx_pci_add_cmd(pcr
, CHECK_REG_CMD
, MS_TRANSFER
,
176 MS_TRANSFER_END
, MS_TRANSFER_END
);
178 rtsx_pci_send_cmd_no_wait(pcr
);
180 err
= rtsx_pci_transfer_data(pcr
, sg
, 1, data_dir
== READ
, 10000);
182 ms_clear_error(host
);
186 rtsx_pci_read_register(pcr
, MS_TRANS_CFG
, &val
);
188 if (val
& (MS_INT_CMDNK
| MS_INT_ERR
|
189 MS_CRC16_ERR
| MS_RDY_TIMEOUT
))
192 if (val
& (MS_CRC16_ERR
| MS_RDY_TIMEOUT
))
199 static int ms_write_bytes(struct realtek_pci_ms
*host
, u8 tpc
,
200 u8 cfg
, u8 cnt
, u8
*data
, u8
*int_reg
)
202 struct rtsx_pcr
*pcr
= host
->pcr
;
205 dev_dbg(ms_dev(host
), "%s: tpc = 0x%02x\n", __func__
, tpc
);
210 rtsx_pci_init_cmd(pcr
);
212 for (i
= 0; i
< cnt
; i
++)
213 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
,
214 PPBUF_BASE2
+ i
, 0xFF, data
[i
]);
216 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
,
217 PPBUF_BASE2
+ i
, 0xFF, 0xFF);
219 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_TPC
, 0xFF, tpc
);
220 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_BYTE_CNT
, 0xFF, cnt
);
221 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_TRANS_CFG
, 0xFF, cfg
);
222 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_DATA_SOURCE
,
223 0x01, PINGPONG_BUFFER
);
225 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_TRANSFER
,
226 0xFF, MS_TRANSFER_START
| MS_TM_WRITE_BYTES
);
227 rtsx_pci_add_cmd(pcr
, CHECK_REG_CMD
, MS_TRANSFER
,
228 MS_TRANSFER_END
, MS_TRANSFER_END
);
230 rtsx_pci_add_cmd(pcr
, READ_REG_CMD
, MS_TRANS_CFG
, 0, 0);
232 err
= rtsx_pci_send_cmd(pcr
, 5000);
236 rtsx_pci_read_register(pcr
, MS_TRANS_CFG
, &val
);
237 dev_dbg(ms_dev(host
), "MS_TRANS_CFG: 0x%02x\n", val
);
240 *int_reg
= val
& 0x0F;
242 ms_print_debug_regs(host
);
244 ms_clear_error(host
);
247 if (val
& MS_CRC16_ERR
)
251 if (val
& (MS_INT_ERR
| MS_INT_CMDNK
))
260 u8
*ptr
= rtsx_pci_get_cmd_data(pcr
) + 1;
261 *int_reg
= *ptr
& 0x0F;
267 static int ms_read_bytes(struct realtek_pci_ms
*host
, u8 tpc
,
268 u8 cfg
, u8 cnt
, u8
*data
, u8
*int_reg
)
270 struct rtsx_pcr
*pcr
= host
->pcr
;
274 dev_dbg(ms_dev(host
), "%s: tpc = 0x%02x\n", __func__
, tpc
);
279 rtsx_pci_init_cmd(pcr
);
281 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_TPC
, 0xFF, tpc
);
282 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_BYTE_CNT
, 0xFF, cnt
);
283 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_TRANS_CFG
, 0xFF, cfg
);
284 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, CARD_DATA_SOURCE
,
285 0x01, PINGPONG_BUFFER
);
287 rtsx_pci_add_cmd(pcr
, WRITE_REG_CMD
, MS_TRANSFER
,
288 0xFF, MS_TRANSFER_START
| MS_TM_READ_BYTES
);
289 rtsx_pci_add_cmd(pcr
, CHECK_REG_CMD
, MS_TRANSFER
,
290 MS_TRANSFER_END
, MS_TRANSFER_END
);
291 for (i
= 0; i
< cnt
- 1; i
++)
292 rtsx_pci_add_cmd(pcr
, READ_REG_CMD
, PPBUF_BASE2
+ i
, 0, 0);
294 rtsx_pci_add_cmd(pcr
, READ_REG_CMD
, PPBUF_BASE2
+ cnt
, 0, 0);
296 rtsx_pci_add_cmd(pcr
, READ_REG_CMD
,
297 PPBUF_BASE2
+ cnt
- 1, 0, 0);
299 rtsx_pci_add_cmd(pcr
, READ_REG_CMD
, MS_TRANS_CFG
, 0, 0);
301 err
= rtsx_pci_send_cmd(pcr
, 5000);
305 rtsx_pci_read_register(pcr
, MS_TRANS_CFG
, &val
);
306 dev_dbg(ms_dev(host
), "MS_TRANS_CFG: 0x%02x\n", val
);
309 *int_reg
= val
& 0x0F;
311 ms_print_debug_regs(host
);
313 ms_clear_error(host
);
316 if (val
& MS_CRC16_ERR
)
320 if (val
& (MS_INT_ERR
| MS_INT_CMDNK
))
328 ptr
= rtsx_pci_get_cmd_data(pcr
) + 1;
329 for (i
= 0; i
< cnt
; i
++)
333 *int_reg
= *ptr
& 0x0F;
338 static int rtsx_pci_ms_issue_cmd(struct realtek_pci_ms
*host
)
340 struct memstick_request
*req
= host
->req
;
344 dev_dbg(ms_dev(host
), "%s\n", __func__
);
346 if (req
->need_card_int
) {
347 if (host
->ifmode
!= MEMSTICK_SERIAL
)
351 if (req
->long_data
) {
352 err
= ms_transfer_data(host
, req
->data_dir
,
353 req
->tpc
, cfg
, &(req
->sg
));
355 if (req
->data_dir
== READ
) {
356 err
= ms_read_bytes(host
, req
->tpc
, cfg
,
357 req
->data_len
, req
->data
, &int_reg
);
359 err
= ms_write_bytes(host
, req
->tpc
, cfg
,
360 req
->data_len
, req
->data
, &int_reg
);
366 if (req
->need_card_int
&& (host
->ifmode
== MEMSTICK_SERIAL
)) {
367 err
= ms_read_bytes(host
, MS_TPC_GET_INT
,
368 NO_WAIT_INT
, 1, &int_reg
, NULL
);
373 if (req
->need_card_int
) {
374 dev_dbg(ms_dev(host
), "int_reg: 0x%02x\n", int_reg
);
376 if (int_reg
& MS_INT_CMDNK
)
377 req
->int_reg
|= MEMSTICK_INT_CMDNAK
;
378 if (int_reg
& MS_INT_BREQ
)
379 req
->int_reg
|= MEMSTICK_INT_BREQ
;
380 if (int_reg
& MS_INT_ERR
)
381 req
->int_reg
|= MEMSTICK_INT_ERR
;
382 if (int_reg
& MS_INT_CED
)
383 req
->int_reg
|= MEMSTICK_INT_CED
;
389 static void rtsx_pci_ms_handle_req(struct work_struct
*work
)
391 struct realtek_pci_ms
*host
= container_of(work
,
392 struct realtek_pci_ms
, handle_req
);
393 struct rtsx_pcr
*pcr
= host
->pcr
;
394 struct memstick_host
*msh
= host
->msh
;
397 mutex_lock(&pcr
->pcr_mutex
);
399 rtsx_pci_start_run(pcr
);
401 rtsx_pci_switch_clock(host
->pcr
, host
->clock
, host
->ssc_depth
,
403 rtsx_pci_write_register(pcr
, CARD_SELECT
, 0x07, MS_MOD_SEL
);
404 rtsx_pci_write_register(pcr
, CARD_SHARE_MODE
,
405 CARD_SHARE_MASK
, CARD_SHARE_48_MS
);
409 rc
= memstick_next_req(msh
, &host
->req
);
410 dev_dbg(ms_dev(host
), "next req %d\n", rc
);
413 host
->req
->error
= rtsx_pci_ms_issue_cmd(host
);
417 mutex_unlock(&pcr
->pcr_mutex
);
420 static void rtsx_pci_ms_request(struct memstick_host
*msh
)
422 struct realtek_pci_ms
*host
= memstick_priv(msh
);
424 dev_dbg(ms_dev(host
), "--> %s\n", __func__
);
426 if (rtsx_pci_card_exclusive_check(host
->pcr
, RTSX_MS_CARD
))
429 schedule_work(&host
->handle_req
);
432 static int rtsx_pci_ms_set_param(struct memstick_host
*msh
,
433 enum memstick_param param
, int value
)
435 struct realtek_pci_ms
*host
= memstick_priv(msh
);
436 struct rtsx_pcr
*pcr
= host
->pcr
;
437 unsigned int clock
= 0;
441 dev_dbg(ms_dev(host
), "%s: param = %d, value = %d\n",
442 __func__
, param
, value
);
444 err
= rtsx_pci_card_exclusive_check(host
->pcr
, RTSX_MS_CARD
);
450 if (value
== MEMSTICK_POWER_ON
)
451 err
= ms_power_on(host
);
452 else if (value
== MEMSTICK_POWER_OFF
)
453 err
= ms_power_off(host
);
458 case MEMSTICK_INTERFACE
:
459 if (value
== MEMSTICK_SERIAL
) {
461 ssc_depth
= RTSX_SSC_DEPTH_500K
;
463 err
= rtsx_pci_write_register(pcr
, MS_CFG
, 0x58,
464 MS_BUS_WIDTH_1
| PUSH_TIME_DEFAULT
);
467 } else if (value
== MEMSTICK_PAR4
) {
469 ssc_depth
= RTSX_SSC_DEPTH_1M
;
471 err
= rtsx_pci_write_register(pcr
, MS_CFG
,
472 0x58, MS_BUS_WIDTH_4
| PUSH_TIME_ODD
);
479 err
= rtsx_pci_switch_clock(pcr
, clock
,
480 ssc_depth
, false, true, false);
484 host
->ssc_depth
= ssc_depth
;
486 host
->ifmode
= value
;
495 static int rtsx_pci_ms_suspend(struct platform_device
*pdev
, pm_message_t state
)
497 struct realtek_pci_ms
*host
= platform_get_drvdata(pdev
);
498 struct memstick_host
*msh
= host
->msh
;
500 dev_dbg(ms_dev(host
), "--> %s\n", __func__
);
502 memstick_suspend_host(msh
);
506 static int rtsx_pci_ms_resume(struct platform_device
*pdev
)
508 struct realtek_pci_ms
*host
= platform_get_drvdata(pdev
);
509 struct memstick_host
*msh
= host
->msh
;
511 dev_dbg(ms_dev(host
), "--> %s\n", __func__
);
513 memstick_resume_host(msh
);
517 #else /* CONFIG_PM */
519 #define rtsx_pci_ms_suspend NULL
520 #define rtsx_pci_ms_resume NULL
522 #endif /* CONFIG_PM */
524 static void rtsx_pci_ms_card_event(struct platform_device
*pdev
)
526 struct realtek_pci_ms
*host
= platform_get_drvdata(pdev
);
528 memstick_detect_change(host
->msh
);
531 static int rtsx_pci_ms_drv_probe(struct platform_device
*pdev
)
533 struct memstick_host
*msh
;
534 struct realtek_pci_ms
*host
;
535 struct rtsx_pcr
*pcr
;
536 struct pcr_handle
*handle
= pdev
->dev
.platform_data
;
546 dev_dbg(&(pdev
->dev
),
547 ": Realtek PCI-E Memstick controller found\n");
549 msh
= memstick_alloc_host(sizeof(*host
), &pdev
->dev
);
553 host
= memstick_priv(msh
);
557 platform_set_drvdata(pdev
, host
);
558 pcr
->slots
[RTSX_MS_CARD
].p_dev
= pdev
;
559 pcr
->slots
[RTSX_MS_CARD
].card_event
= rtsx_pci_ms_card_event
;
561 mutex_init(&host
->host_mutex
);
563 INIT_WORK(&host
->handle_req
, rtsx_pci_ms_handle_req
);
564 msh
->request
= rtsx_pci_ms_request
;
565 msh
->set_param
= rtsx_pci_ms_set_param
;
566 msh
->caps
= MEMSTICK_CAP_PAR4
;
568 rc
= memstick_add_host(msh
);
570 memstick_free_host(msh
);
577 static int rtsx_pci_ms_drv_remove(struct platform_device
*pdev
)
579 struct realtek_pci_ms
*host
= platform_get_drvdata(pdev
);
580 struct rtsx_pcr
*pcr
;
581 struct memstick_host
*msh
;
588 pcr
->slots
[RTSX_MS_CARD
].p_dev
= NULL
;
589 pcr
->slots
[RTSX_MS_CARD
].card_event
= NULL
;
592 cancel_work_sync(&host
->handle_req
);
594 mutex_lock(&host
->host_mutex
);
596 dev_dbg(&(pdev
->dev
),
597 "%s: Controller removed during transfer\n",
598 dev_name(&msh
->dev
));
600 rtsx_pci_complete_unfinished_transfer(pcr
);
602 host
->req
->error
= -ENOMEDIUM
;
604 rc
= memstick_next_req(msh
, &host
->req
);
606 host
->req
->error
= -ENOMEDIUM
;
609 mutex_unlock(&host
->host_mutex
);
611 memstick_remove_host(msh
);
612 memstick_free_host(msh
);
614 dev_dbg(&(pdev
->dev
),
615 ": Realtek PCI-E Memstick controller has been removed\n");
620 static struct platform_device_id rtsx_pci_ms_ids
[] = {
622 .name
= DRV_NAME_RTSX_PCI_MS
,
627 MODULE_DEVICE_TABLE(platform
, rtsx_pci_ms_ids
);
629 static struct platform_driver rtsx_pci_ms_driver
= {
630 .probe
= rtsx_pci_ms_drv_probe
,
631 .remove
= rtsx_pci_ms_drv_remove
,
632 .id_table
= rtsx_pci_ms_ids
,
633 .suspend
= rtsx_pci_ms_suspend
,
634 .resume
= rtsx_pci_ms_resume
,
636 .name
= DRV_NAME_RTSX_PCI_MS
,
639 module_platform_driver(rtsx_pci_ms_driver
);
641 MODULE_LICENSE("GPL");
642 MODULE_AUTHOR("Wei WANG <wei_wang@realsil.com.cn>");
643 MODULE_DESCRIPTION("Realtek PCI-E Memstick Card Host Driver");