drivers/misc/cardreader/rtsx_pcr.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /* Driver for Realtek PCI-Express card reader
   3  *
   4  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   5  *
   6  * Author:
   7  *   Wei WANG <wei_wang@realsil.com.cn>
   8  */
   9
  10 #ifndef __RTSX_PCR_H
  11 #define __RTSX_PCR_H
  12
  13 #include <linux/rtsx_pci.h>
  14
  15 #define MIN_DIV_N_PCR           80
  16 #define MAX_DIV_N_PCR           208
  17
  18 #define RTS522A_PM_CTRL3                0xFF7E
  19
  20 #define RTS524A_PME_FORCE_CTL           0xFF78
  21 #define RTS524A_PM_CTRL3                0xFF7E
  22
  23 #define LTR_ACTIVE_LATENCY_DEF          0x883C
  24 #define LTR_IDLE_LATENCY_DEF            0x892C
  25 #define LTR_L1OFF_LATENCY_DEF           0x9003
  26 #define L1_SNOOZE_DELAY_DEF             1
  27 #define LTR_L1OFF_SSPWRGATE_5249_DEF            0xAF
  28 #define LTR_L1OFF_SSPWRGATE_5250_DEF            0xFF
  29 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF     0xAC
  30 #define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF     0xF8
  31 #define CMD_TIMEOUT_DEF         100
  32 #define ASPM_MASK_NEG           0xFC
  33 #define MASK_8_BIT_DEF          0xFF
  34
  35 #define SSC_CLOCK_STABLE_WAIT   130
  36
  37 #define RTS524A_OCP_THD_800     0x04
  38 #define RTS525A_OCP_THD_800     0x05
  39 #define RTS522A_OCP_THD_800     0x06
  40
  41
  42 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
  43 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
  44
  45 void rts5209_init_params(struct rtsx_pcr *pcr);
  46 void rts5229_init_params(struct rtsx_pcr *pcr);
  47 void rtl8411_init_params(struct rtsx_pcr *pcr);
  48 void rtl8402_init_params(struct rtsx_pcr *pcr);
  49 void rts5227_init_params(struct rtsx_pcr *pcr);
  50 void rts522a_init_params(struct rtsx_pcr *pcr);
  51 void rts5249_init_params(struct rtsx_pcr *pcr);
  52 void rts524a_init_params(struct rtsx_pcr *pcr);
  53 void rts525a_init_params(struct rtsx_pcr *pcr);
  54 void rtl8411b_init_params(struct rtsx_pcr *pcr);
  55 void rts5260_init_params(struct rtsx_pcr *pcr);
  56 void rts5261_init_params(struct rtsx_pcr *pcr);
  57
  58 static inline u8 map_sd_drive(int idx)
  59 {
  60         u8 sd_drive[4] = {
  61                 0x01,   /* Type D */
  62                 0x02,   /* Type C */
  63                 0x05,   /* Type A */
  64                 0x03    /* Type B */
  65         };
  66
  67         return sd_drive[idx];
  68 }
  69
  70 #define rtsx_vendor_setting_valid(reg)          (!((reg) & 0x1000000))
  71 #define rts5209_vendor_setting1_valid(reg)      (!((reg) & 0x80))
  72 #define rts5209_vendor_setting2_valid(reg)      ((reg) & 0x80)
  73
  74 #define rtsx_reg_to_aspm(reg)                   (((reg) >> 28) & 0x03)
  75 #define rtsx_reg_to_sd30_drive_sel_1v8(reg)     (((reg) >> 26) & 0x03)
  76 #define rtsx_reg_to_sd30_drive_sel_3v3(reg)     (((reg) >> 5) & 0x03)
  77 #define rtsx_reg_to_card_drive_sel(reg)         ((((reg) >> 25) & 0x01) << 6)
  78 #define rtsx_reg_check_reverse_socket(reg)      ((reg) & 0x4000)
  79 #define rts5209_reg_to_aspm(reg)                (((reg) >> 5) & 0x03)
  80 #define rts5209_reg_check_ms_pmos(reg)          (!((reg) & 0x08))
  81 #define rts5209_reg_to_sd30_drive_sel_1v8(reg)  (((reg) >> 3) & 0x07)
  82 #define rts5209_reg_to_sd30_drive_sel_3v3(reg)  ((reg) & 0x07)
  83 #define rts5209_reg_to_card_drive_sel(reg)      ((reg) >> 8)
  84 #define rtl8411_reg_to_sd30_drive_sel_3v3(reg)  (((reg) >> 5) & 0x07)
  85 #define rtl8411b_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x03)
  86
  87 #define set_pull_ctrl_tables(pcr, __device)                             \
  88 do {                                                                    \
  89         pcr->sd_pull_ctl_enable_tbl  = __device##_sd_pull_ctl_enable_tbl;  \
  90         pcr->sd_pull_ctl_disable_tbl = __device##_sd_pull_ctl_disable_tbl; \
  91         pcr->ms_pull_ctl_enable_tbl  = __device##_ms_pull_ctl_enable_tbl;  \
  92         pcr->ms_pull_ctl_disable_tbl = __device##_ms_pull_ctl_disable_tbl; \
  93 } while (0)
  94
  95 /* generic operations */
  96 int rtsx_gops_pm_reset(struct rtsx_pcr *pcr);
  97 int rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency);
  98 int rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val);
  99 void rtsx_pci_init_ocp(struct rtsx_pcr *pcr);
 100 void rtsx_pci_disable_ocp(struct rtsx_pcr *pcr);
 101 void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr);
 102 int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val);
 103 void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr);
 104 int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr);
 105 int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr);
 106
 107 #endif