treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / net / dsa / sja1105 / sja1105_main.c
blob03ba6d25f7fefb9b8b2d1dae8ea401ee23df13e5
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
4 */
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8 #include <linux/delay.h>
9 #include <linux/module.h>
10 #include <linux/printk.h>
11 #include <linux/spi/spi.h>
12 #include <linux/errno.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/phylink.h>
15 #include <linux/of.h>
16 #include <linux/of_net.h>
17 #include <linux/of_mdio.h>
18 #include <linux/of_device.h>
19 #include <linux/netdev_features.h>
20 #include <linux/netdevice.h>
21 #include <linux/if_bridge.h>
22 #include <linux/if_ether.h>
23 #include <linux/dsa/8021q.h>
24 #include "sja1105.h"
25 #include "sja1105_tas.h"
27 static void sja1105_hw_reset(struct gpio_desc *gpio, unsigned int pulse_len,
28 unsigned int startup_delay)
30 gpiod_set_value_cansleep(gpio, 1);
31 /* Wait for minimum reset pulse length */
32 msleep(pulse_len);
33 gpiod_set_value_cansleep(gpio, 0);
34 /* Wait until chip is ready after reset */
35 msleep(startup_delay);
38 static void
39 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd,
40 int from, int to, bool allow)
42 if (allow) {
43 l2_fwd[from].bc_domain |= BIT(to);
44 l2_fwd[from].reach_port |= BIT(to);
45 l2_fwd[from].fl_domain |= BIT(to);
46 } else {
47 l2_fwd[from].bc_domain &= ~BIT(to);
48 l2_fwd[from].reach_port &= ~BIT(to);
49 l2_fwd[from].fl_domain &= ~BIT(to);
53 /* Structure used to temporarily transport device tree
54 * settings into sja1105_setup
56 struct sja1105_dt_port {
57 phy_interface_t phy_mode;
58 sja1105_mii_role_t role;
61 static int sja1105_init_mac_settings(struct sja1105_private *priv)
63 struct sja1105_mac_config_entry default_mac = {
64 /* Enable all 8 priority queues on egress.
65 * Every queue i holds top[i] - base[i] frames.
66 * Sum of top[i] - base[i] is 511 (max hardware limit).
68 .top = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},
69 .base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},
70 .enabled = {true, true, true, true, true, true, true, true},
71 /* Keep standard IFG of 12 bytes on egress. */
72 .ifg = 0,
73 /* Always put the MAC speed in automatic mode, where it can be
74 * adjusted at runtime by PHYLINK.
76 .speed = SJA1105_SPEED_AUTO,
77 /* No static correction for 1-step 1588 events */
78 .tp_delin = 0,
79 .tp_delout = 0,
80 /* Disable aging for critical TTEthernet traffic */
81 .maxage = 0xFF,
82 /* Internal VLAN (pvid) to apply to untagged ingress */
83 .vlanprio = 0,
84 .vlanid = 1,
85 .ing_mirr = false,
86 .egr_mirr = false,
87 /* Don't drop traffic with other EtherType than ETH_P_IP */
88 .drpnona664 = false,
89 /* Don't drop double-tagged traffic */
90 .drpdtag = false,
91 /* Don't drop untagged traffic */
92 .drpuntag = false,
93 /* Don't retag 802.1p (VID 0) traffic with the pvid */
94 .retag = false,
95 /* Disable learning and I/O on user ports by default -
96 * STP will enable it.
98 .dyn_learn = false,
99 .egress = false,
100 .ingress = false,
102 struct sja1105_mac_config_entry *mac;
103 struct sja1105_table *table;
104 int i;
106 table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG];
108 /* Discard previous MAC Configuration Table */
109 if (table->entry_count) {
110 kfree(table->entries);
111 table->entry_count = 0;
114 table->entries = kcalloc(SJA1105_NUM_PORTS,
115 table->ops->unpacked_entry_size, GFP_KERNEL);
116 if (!table->entries)
117 return -ENOMEM;
119 table->entry_count = SJA1105_NUM_PORTS;
121 mac = table->entries;
123 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
124 mac[i] = default_mac;
125 if (i == dsa_upstream_port(priv->ds, i)) {
126 /* STP doesn't get called for CPU port, so we need to
127 * set the I/O parameters statically.
129 mac[i].dyn_learn = true;
130 mac[i].ingress = true;
131 mac[i].egress = true;
135 return 0;
138 static int sja1105_init_mii_settings(struct sja1105_private *priv,
139 struct sja1105_dt_port *ports)
141 struct device *dev = &priv->spidev->dev;
142 struct sja1105_xmii_params_entry *mii;
143 struct sja1105_table *table;
144 int i;
146 table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS];
148 /* Discard previous xMII Mode Parameters Table */
149 if (table->entry_count) {
150 kfree(table->entries);
151 table->entry_count = 0;
154 table->entries = kcalloc(SJA1105_MAX_XMII_PARAMS_COUNT,
155 table->ops->unpacked_entry_size, GFP_KERNEL);
156 if (!table->entries)
157 return -ENOMEM;
159 /* Override table based on PHYLINK DT bindings */
160 table->entry_count = SJA1105_MAX_XMII_PARAMS_COUNT;
162 mii = table->entries;
164 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
165 switch (ports[i].phy_mode) {
166 case PHY_INTERFACE_MODE_MII:
167 mii->xmii_mode[i] = XMII_MODE_MII;
168 break;
169 case PHY_INTERFACE_MODE_RMII:
170 mii->xmii_mode[i] = XMII_MODE_RMII;
171 break;
172 case PHY_INTERFACE_MODE_RGMII:
173 case PHY_INTERFACE_MODE_RGMII_ID:
174 case PHY_INTERFACE_MODE_RGMII_RXID:
175 case PHY_INTERFACE_MODE_RGMII_TXID:
176 mii->xmii_mode[i] = XMII_MODE_RGMII;
177 break;
178 default:
179 dev_err(dev, "Unsupported PHY mode %s!\n",
180 phy_modes(ports[i].phy_mode));
183 mii->phy_mac[i] = ports[i].role;
185 return 0;
188 static int sja1105_init_static_fdb(struct sja1105_private *priv)
190 struct sja1105_table *table;
192 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
194 /* We only populate the FDB table through dynamic
195 * L2 Address Lookup entries
197 if (table->entry_count) {
198 kfree(table->entries);
199 table->entry_count = 0;
201 return 0;
204 static int sja1105_init_l2_lookup_params(struct sja1105_private *priv)
206 struct sja1105_table *table;
207 u64 max_fdb_entries = SJA1105_MAX_L2_LOOKUP_COUNT / SJA1105_NUM_PORTS;
208 struct sja1105_l2_lookup_params_entry default_l2_lookup_params = {
209 /* Learned FDB entries are forgotten after 300 seconds */
210 .maxage = SJA1105_AGEING_TIME_MS(300000),
211 /* All entries within a FDB bin are available for learning */
212 .dyn_tbsz = SJA1105ET_FDB_BIN_SIZE,
213 /* And the P/Q/R/S equivalent setting: */
214 .start_dynspc = 0,
215 .maxaddrp = {max_fdb_entries, max_fdb_entries, max_fdb_entries,
216 max_fdb_entries, max_fdb_entries, },
217 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */
218 .poly = 0x97,
219 /* This selects between Independent VLAN Learning (IVL) and
220 * Shared VLAN Learning (SVL)
222 .shared_learn = true,
223 /* Don't discard management traffic based on ENFPORT -
224 * we don't perform SMAC port enforcement anyway, so
225 * what we are setting here doesn't matter.
227 .no_enf_hostprt = false,
228 /* Don't learn SMAC for mac_fltres1 and mac_fltres0.
229 * Maybe correlate with no_linklocal_learn from bridge driver?
231 .no_mgmt_learn = true,
232 /* P/Q/R/S only */
233 .use_static = true,
234 /* Dynamically learned FDB entries can overwrite other (older)
235 * dynamic FDB entries
237 .owr_dyn = true,
238 .drpnolearn = true,
241 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
243 if (table->entry_count) {
244 kfree(table->entries);
245 table->entry_count = 0;
248 table->entries = kcalloc(SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,
249 table->ops->unpacked_entry_size, GFP_KERNEL);
250 if (!table->entries)
251 return -ENOMEM;
253 table->entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT;
255 /* This table only has a single entry */
256 ((struct sja1105_l2_lookup_params_entry *)table->entries)[0] =
257 default_l2_lookup_params;
259 return 0;
262 static int sja1105_init_static_vlan(struct sja1105_private *priv)
264 struct sja1105_table *table;
265 struct sja1105_vlan_lookup_entry pvid = {
266 .ving_mirr = 0,
267 .vegr_mirr = 0,
268 .vmemb_port = 0,
269 .vlan_bc = 0,
270 .tag_port = 0,
271 .vlanid = 1,
273 int i;
275 table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
277 /* The static VLAN table will only contain the initial pvid of 1.
278 * All other VLANs are to be configured through dynamic entries,
279 * and kept in the static configuration table as backing memory.
281 if (table->entry_count) {
282 kfree(table->entries);
283 table->entry_count = 0;
286 table->entries = kcalloc(1, table->ops->unpacked_entry_size,
287 GFP_KERNEL);
288 if (!table->entries)
289 return -ENOMEM;
291 table->entry_count = 1;
293 /* VLAN 1: all DT-defined ports are members; no restrictions on
294 * forwarding; always transmit priority-tagged frames as untagged.
296 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
297 pvid.vmemb_port |= BIT(i);
298 pvid.vlan_bc |= BIT(i);
299 pvid.tag_port &= ~BIT(i);
302 ((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid;
303 return 0;
306 static int sja1105_init_l2_forwarding(struct sja1105_private *priv)
308 struct sja1105_l2_forwarding_entry *l2fwd;
309 struct sja1105_table *table;
310 int i, j;
312 table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING];
314 if (table->entry_count) {
315 kfree(table->entries);
316 table->entry_count = 0;
319 table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_COUNT,
320 table->ops->unpacked_entry_size, GFP_KERNEL);
321 if (!table->entries)
322 return -ENOMEM;
324 table->entry_count = SJA1105_MAX_L2_FORWARDING_COUNT;
326 l2fwd = table->entries;
328 /* First 5 entries define the forwarding rules */
329 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
330 unsigned int upstream = dsa_upstream_port(priv->ds, i);
332 for (j = 0; j < SJA1105_NUM_TC; j++)
333 l2fwd[i].vlan_pmap[j] = j;
335 if (i == upstream)
336 continue;
338 sja1105_port_allow_traffic(l2fwd, i, upstream, true);
339 sja1105_port_allow_traffic(l2fwd, upstream, i, true);
341 /* Next 8 entries define VLAN PCP mapping from ingress to egress.
342 * Create a one-to-one mapping.
344 for (i = 0; i < SJA1105_NUM_TC; i++)
345 for (j = 0; j < SJA1105_NUM_PORTS; j++)
346 l2fwd[SJA1105_NUM_PORTS + i].vlan_pmap[j] = i;
348 return 0;
351 static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv)
353 struct sja1105_l2_forwarding_params_entry default_l2fwd_params = {
354 /* Disallow dynamic reconfiguration of vlan_pmap */
355 .max_dynp = 0,
356 /* Use a single memory partition for all ingress queues */
357 .part_spc = { SJA1105_MAX_FRAME_MEMORY, 0, 0, 0, 0, 0, 0, 0 },
359 struct sja1105_table *table;
361 table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];
363 if (table->entry_count) {
364 kfree(table->entries);
365 table->entry_count = 0;
368 table->entries = kcalloc(SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,
369 table->ops->unpacked_entry_size, GFP_KERNEL);
370 if (!table->entries)
371 return -ENOMEM;
373 table->entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT;
375 /* This table only has a single entry */
376 ((struct sja1105_l2_forwarding_params_entry *)table->entries)[0] =
377 default_l2fwd_params;
379 return 0;
382 static int sja1105_init_general_params(struct sja1105_private *priv)
384 struct sja1105_general_params_entry default_general_params = {
385 /* Allow dynamic changing of the mirror port */
386 .mirr_ptacu = true,
387 .switchid = priv->ds->index,
388 /* Priority queue for link-local management frames
389 * (both ingress to and egress from CPU - PTP, STP etc)
391 .hostprio = 7,
392 .mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A,
393 .mac_flt1 = SJA1105_LINKLOCAL_FILTER_A_MASK,
394 .incl_srcpt1 = false,
395 .send_meta1 = false,
396 .mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B,
397 .mac_flt0 = SJA1105_LINKLOCAL_FILTER_B_MASK,
398 .incl_srcpt0 = false,
399 .send_meta0 = false,
400 /* The destination for traffic matching mac_fltres1 and
401 * mac_fltres0 on all ports except host_port. Such traffic
402 * receieved on host_port itself would be dropped, except
403 * by installing a temporary 'management route'
405 .host_port = dsa_upstream_port(priv->ds, 0),
406 /* Default to an invalid value */
407 .mirr_port = SJA1105_NUM_PORTS,
408 /* Link-local traffic received on casc_port will be forwarded
409 * to host_port without embedding the source port and device ID
410 * info in the destination MAC address (presumably because it
411 * is a cascaded port and a downstream SJA switch already did
412 * that). Default to an invalid port (to disable the feature)
413 * and overwrite this if we find any DSA (cascaded) ports.
415 .casc_port = SJA1105_NUM_PORTS,
416 /* No TTEthernet */
417 .vllupformat = 0,
418 .vlmarker = 0,
419 .vlmask = 0,
420 /* Only update correctionField for 1-step PTP (L2 transport) */
421 .ignore2stf = 0,
422 /* Forcefully disable VLAN filtering by telling
423 * the switch that VLAN has a different EtherType.
425 .tpid = ETH_P_SJA1105,
426 .tpid2 = ETH_P_SJA1105,
428 struct sja1105_table *table;
430 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
432 if (table->entry_count) {
433 kfree(table->entries);
434 table->entry_count = 0;
437 table->entries = kcalloc(SJA1105_MAX_GENERAL_PARAMS_COUNT,
438 table->ops->unpacked_entry_size, GFP_KERNEL);
439 if (!table->entries)
440 return -ENOMEM;
442 table->entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT;
444 /* This table only has a single entry */
445 ((struct sja1105_general_params_entry *)table->entries)[0] =
446 default_general_params;
448 return 0;
451 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)
453 static void sja1105_setup_policer(struct sja1105_l2_policing_entry *policing,
454 int index)
456 policing[index].sharindx = index;
457 policing[index].smax = 65535; /* Burst size in bytes */
458 policing[index].rate = SJA1105_RATE_MBPS(1000);
459 policing[index].maxlen = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
460 policing[index].partition = 0;
463 static int sja1105_init_l2_policing(struct sja1105_private *priv)
465 struct sja1105_l2_policing_entry *policing;
466 struct sja1105_table *table;
467 int i, j, k;
469 table = &priv->static_config.tables[BLK_IDX_L2_POLICING];
471 /* Discard previous L2 Policing Table */
472 if (table->entry_count) {
473 kfree(table->entries);
474 table->entry_count = 0;
477 table->entries = kcalloc(SJA1105_MAX_L2_POLICING_COUNT,
478 table->ops->unpacked_entry_size, GFP_KERNEL);
479 if (!table->entries)
480 return -ENOMEM;
482 table->entry_count = SJA1105_MAX_L2_POLICING_COUNT;
484 policing = table->entries;
486 /* k sweeps through all unicast policers (0-39).
487 * bcast sweeps through policers 40-44.
489 for (i = 0, k = 0; i < SJA1105_NUM_PORTS; i++) {
490 int bcast = (SJA1105_NUM_PORTS * SJA1105_NUM_TC) + i;
492 for (j = 0; j < SJA1105_NUM_TC; j++, k++)
493 sja1105_setup_policer(policing, k);
495 /* Set up this port's policer for broadcast traffic */
496 sja1105_setup_policer(policing, bcast);
498 return 0;
501 static int sja1105_static_config_load(struct sja1105_private *priv,
502 struct sja1105_dt_port *ports)
504 int rc;
506 sja1105_static_config_free(&priv->static_config);
507 rc = sja1105_static_config_init(&priv->static_config,
508 priv->info->static_ops,
509 priv->info->device_id);
510 if (rc)
511 return rc;
513 /* Build static configuration */
514 rc = sja1105_init_mac_settings(priv);
515 if (rc < 0)
516 return rc;
517 rc = sja1105_init_mii_settings(priv, ports);
518 if (rc < 0)
519 return rc;
520 rc = sja1105_init_static_fdb(priv);
521 if (rc < 0)
522 return rc;
523 rc = sja1105_init_static_vlan(priv);
524 if (rc < 0)
525 return rc;
526 rc = sja1105_init_l2_lookup_params(priv);
527 if (rc < 0)
528 return rc;
529 rc = sja1105_init_l2_forwarding(priv);
530 if (rc < 0)
531 return rc;
532 rc = sja1105_init_l2_forwarding_params(priv);
533 if (rc < 0)
534 return rc;
535 rc = sja1105_init_l2_policing(priv);
536 if (rc < 0)
537 return rc;
538 rc = sja1105_init_general_params(priv);
539 if (rc < 0)
540 return rc;
542 /* Send initial configuration to hardware via SPI */
543 return sja1105_static_config_upload(priv);
546 static int sja1105_parse_rgmii_delays(struct sja1105_private *priv,
547 const struct sja1105_dt_port *ports)
549 int i;
551 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
552 if (ports[i].role == XMII_MAC)
553 continue;
555 if (ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_RXID ||
556 ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
557 priv->rgmii_rx_delay[i] = true;
559 if (ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_TXID ||
560 ports[i].phy_mode == PHY_INTERFACE_MODE_RGMII_ID)
561 priv->rgmii_tx_delay[i] = true;
563 if ((priv->rgmii_rx_delay[i] || priv->rgmii_tx_delay[i]) &&
564 !priv->info->setup_rgmii_delay)
565 return -EINVAL;
567 return 0;
570 static int sja1105_parse_ports_node(struct sja1105_private *priv,
571 struct sja1105_dt_port *ports,
572 struct device_node *ports_node)
574 struct device *dev = &priv->spidev->dev;
575 struct device_node *child;
577 for_each_available_child_of_node(ports_node, child) {
578 struct device_node *phy_node;
579 phy_interface_t phy_mode;
580 u32 index;
581 int err;
583 /* Get switch port number from DT */
584 if (of_property_read_u32(child, "reg", &index) < 0) {
585 dev_err(dev, "Port number not defined in device tree "
586 "(property \"reg\")\n");
587 of_node_put(child);
588 return -ENODEV;
591 /* Get PHY mode from DT */
592 err = of_get_phy_mode(child, &phy_mode);
593 if (err) {
594 dev_err(dev, "Failed to read phy-mode or "
595 "phy-interface-type property for port %d\n",
596 index);
597 of_node_put(child);
598 return -ENODEV;
600 ports[index].phy_mode = phy_mode;
602 phy_node = of_parse_phandle(child, "phy-handle", 0);
603 if (!phy_node) {
604 if (!of_phy_is_fixed_link(child)) {
605 dev_err(dev, "phy-handle or fixed-link "
606 "properties missing!\n");
607 of_node_put(child);
608 return -ENODEV;
610 /* phy-handle is missing, but fixed-link isn't.
611 * So it's a fixed link. Default to PHY role.
613 ports[index].role = XMII_PHY;
614 } else {
615 /* phy-handle present => put port in MAC role */
616 ports[index].role = XMII_MAC;
617 of_node_put(phy_node);
620 /* The MAC/PHY role can be overridden with explicit bindings */
621 if (of_property_read_bool(child, "sja1105,role-mac"))
622 ports[index].role = XMII_MAC;
623 else if (of_property_read_bool(child, "sja1105,role-phy"))
624 ports[index].role = XMII_PHY;
627 return 0;
630 static int sja1105_parse_dt(struct sja1105_private *priv,
631 struct sja1105_dt_port *ports)
633 struct device *dev = &priv->spidev->dev;
634 struct device_node *switch_node = dev->of_node;
635 struct device_node *ports_node;
636 int rc;
638 ports_node = of_get_child_by_name(switch_node, "ports");
639 if (!ports_node) {
640 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
641 return -ENODEV;
644 rc = sja1105_parse_ports_node(priv, ports, ports_node);
645 of_node_put(ports_node);
647 return rc;
650 /* Convert link speed from SJA1105 to ethtool encoding */
651 static int sja1105_speed[] = {
652 [SJA1105_SPEED_AUTO] = SPEED_UNKNOWN,
653 [SJA1105_SPEED_10MBPS] = SPEED_10,
654 [SJA1105_SPEED_100MBPS] = SPEED_100,
655 [SJA1105_SPEED_1000MBPS] = SPEED_1000,
658 /* Set link speed in the MAC configuration for a specific port. */
659 static int sja1105_adjust_port_config(struct sja1105_private *priv, int port,
660 int speed_mbps)
662 struct sja1105_xmii_params_entry *mii;
663 struct sja1105_mac_config_entry *mac;
664 struct device *dev = priv->ds->dev;
665 sja1105_phy_interface_t phy_mode;
666 sja1105_speed_t speed;
667 int rc;
669 /* On P/Q/R/S, one can read from the device via the MAC reconfiguration
670 * tables. On E/T, MAC reconfig tables are not readable, only writable.
671 * We have to *know* what the MAC looks like. For the sake of keeping
672 * the code common, we'll use the static configuration tables as a
673 * reasonable approximation for both E/T and P/Q/R/S.
675 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
676 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
678 switch (speed_mbps) {
679 case SPEED_UNKNOWN:
680 /* PHYLINK called sja1105_mac_config() to inform us about
681 * the state->interface, but AN has not completed and the
682 * speed is not yet valid. UM10944.pdf says that setting
683 * SJA1105_SPEED_AUTO at runtime disables the port, so that is
684 * ok for power consumption in case AN will never complete -
685 * otherwise PHYLINK should come back with a new update.
687 speed = SJA1105_SPEED_AUTO;
688 break;
689 case SPEED_10:
690 speed = SJA1105_SPEED_10MBPS;
691 break;
692 case SPEED_100:
693 speed = SJA1105_SPEED_100MBPS;
694 break;
695 case SPEED_1000:
696 speed = SJA1105_SPEED_1000MBPS;
697 break;
698 default:
699 dev_err(dev, "Invalid speed %iMbps\n", speed_mbps);
700 return -EINVAL;
703 /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration
704 * table, since this will be used for the clocking setup, and we no
705 * longer need to store it in the static config (already told hardware
706 * we want auto during upload phase).
708 mac[port].speed = speed;
710 /* Write to the dynamic reconfiguration tables */
711 rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
712 &mac[port], true);
713 if (rc < 0) {
714 dev_err(dev, "Failed to write MAC config: %d\n", rc);
715 return rc;
718 /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at
719 * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and
720 * RMII no change of the clock setup is required. Actually, changing
721 * the clock setup does interrupt the clock signal for a certain time
722 * which causes trouble for all PHYs relying on this signal.
724 phy_mode = mii->xmii_mode[port];
725 if (phy_mode != XMII_MODE_RGMII)
726 return 0;
728 return sja1105_clocking_setup_port(priv, port);
731 /* The SJA1105 MAC programming model is through the static config (the xMII
732 * Mode table cannot be dynamically reconfigured), and we have to program
733 * that early (earlier than PHYLINK calls us, anyway).
734 * So just error out in case the connected PHY attempts to change the initial
735 * system interface MII protocol from what is defined in the DT, at least for
736 * now.
738 static bool sja1105_phy_mode_mismatch(struct sja1105_private *priv, int port,
739 phy_interface_t interface)
741 struct sja1105_xmii_params_entry *mii;
742 sja1105_phy_interface_t phy_mode;
744 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
745 phy_mode = mii->xmii_mode[port];
747 switch (interface) {
748 case PHY_INTERFACE_MODE_MII:
749 return (phy_mode != XMII_MODE_MII);
750 case PHY_INTERFACE_MODE_RMII:
751 return (phy_mode != XMII_MODE_RMII);
752 case PHY_INTERFACE_MODE_RGMII:
753 case PHY_INTERFACE_MODE_RGMII_ID:
754 case PHY_INTERFACE_MODE_RGMII_RXID:
755 case PHY_INTERFACE_MODE_RGMII_TXID:
756 return (phy_mode != XMII_MODE_RGMII);
757 default:
758 return true;
762 static void sja1105_mac_config(struct dsa_switch *ds, int port,
763 unsigned int link_an_mode,
764 const struct phylink_link_state *state)
766 struct sja1105_private *priv = ds->priv;
768 if (sja1105_phy_mode_mismatch(priv, port, state->interface))
769 return;
771 if (link_an_mode == MLO_AN_INBAND) {
772 dev_err(ds->dev, "In-band AN not supported!\n");
773 return;
776 sja1105_adjust_port_config(priv, port, state->speed);
779 static void sja1105_mac_link_down(struct dsa_switch *ds, int port,
780 unsigned int mode,
781 phy_interface_t interface)
783 sja1105_inhibit_tx(ds->priv, BIT(port), true);
786 static void sja1105_mac_link_up(struct dsa_switch *ds, int port,
787 unsigned int mode,
788 phy_interface_t interface,
789 struct phy_device *phydev)
791 sja1105_inhibit_tx(ds->priv, BIT(port), false);
794 static void sja1105_phylink_validate(struct dsa_switch *ds, int port,
795 unsigned long *supported,
796 struct phylink_link_state *state)
798 /* Construct a new mask which exhaustively contains all link features
799 * supported by the MAC, and then apply that (logical AND) to what will
800 * be sent to the PHY for "marketing".
802 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
803 struct sja1105_private *priv = ds->priv;
804 struct sja1105_xmii_params_entry *mii;
806 mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries;
808 /* include/linux/phylink.h says:
809 * When @state->interface is %PHY_INTERFACE_MODE_NA, phylink
810 * expects the MAC driver to return all supported link modes.
812 if (state->interface != PHY_INTERFACE_MODE_NA &&
813 sja1105_phy_mode_mismatch(priv, port, state->interface)) {
814 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
815 return;
818 /* The MAC does not support pause frames, and also doesn't
819 * support half-duplex traffic modes.
821 phylink_set(mask, Autoneg);
822 phylink_set(mask, MII);
823 phylink_set(mask, 10baseT_Full);
824 phylink_set(mask, 100baseT_Full);
825 if (mii->xmii_mode[port] == XMII_MODE_RGMII)
826 phylink_set(mask, 1000baseT_Full);
828 bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
829 bitmap_and(state->advertising, state->advertising, mask,
830 __ETHTOOL_LINK_MODE_MASK_NBITS);
833 static int
834 sja1105_find_static_fdb_entry(struct sja1105_private *priv, int port,
835 const struct sja1105_l2_lookup_entry *requested)
837 struct sja1105_l2_lookup_entry *l2_lookup;
838 struct sja1105_table *table;
839 int i;
841 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
842 l2_lookup = table->entries;
844 for (i = 0; i < table->entry_count; i++)
845 if (l2_lookup[i].macaddr == requested->macaddr &&
846 l2_lookup[i].vlanid == requested->vlanid &&
847 l2_lookup[i].destports & BIT(port))
848 return i;
850 return -1;
853 /* We want FDB entries added statically through the bridge command to persist
854 * across switch resets, which are a common thing during normal SJA1105
855 * operation. So we have to back them up in the static configuration tables
856 * and hence apply them on next static config upload... yay!
858 static int
859 sja1105_static_fdb_change(struct sja1105_private *priv, int port,
860 const struct sja1105_l2_lookup_entry *requested,
861 bool keep)
863 struct sja1105_l2_lookup_entry *l2_lookup;
864 struct sja1105_table *table;
865 int rc, match;
867 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
869 match = sja1105_find_static_fdb_entry(priv, port, requested);
870 if (match < 0) {
871 /* Can't delete a missing entry. */
872 if (!keep)
873 return 0;
875 /* No match => new entry */
876 rc = sja1105_table_resize(table, table->entry_count + 1);
877 if (rc)
878 return rc;
880 match = table->entry_count - 1;
883 /* Assign pointer after the resize (it may be new memory) */
884 l2_lookup = table->entries;
886 /* We have a match.
887 * If the job was to add this FDB entry, it's already done (mostly
888 * anyway, since the port forwarding mask may have changed, case in
889 * which we update it).
890 * Otherwise we have to delete it.
892 if (keep) {
893 l2_lookup[match] = *requested;
894 return 0;
897 /* To remove, the strategy is to overwrite the element with
898 * the last one, and then reduce the array size by 1
900 l2_lookup[match] = l2_lookup[table->entry_count - 1];
901 return sja1105_table_resize(table, table->entry_count - 1);
904 /* First-generation switches have a 4-way set associative TCAM that
905 * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of
906 * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).
907 * For the placement of a newly learnt FDB entry, the switch selects the bin
908 * based on a hash function, and the way within that bin incrementally.
910 static int sja1105et_fdb_index(int bin, int way)
912 return bin * SJA1105ET_FDB_BIN_SIZE + way;
915 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin,
916 const u8 *addr, u16 vid,
917 struct sja1105_l2_lookup_entry *match,
918 int *last_unused)
920 int way;
922 for (way = 0; way < SJA1105ET_FDB_BIN_SIZE; way++) {
923 struct sja1105_l2_lookup_entry l2_lookup = {0};
924 int index = sja1105et_fdb_index(bin, way);
926 /* Skip unused entries, optionally marking them
927 * into the return value
929 if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
930 index, &l2_lookup)) {
931 if (last_unused)
932 *last_unused = way;
933 continue;
936 if (l2_lookup.macaddr == ether_addr_to_u64(addr) &&
937 l2_lookup.vlanid == vid) {
938 if (match)
939 *match = l2_lookup;
940 return way;
943 /* Return an invalid entry index if not found */
944 return -1;
947 int sja1105et_fdb_add(struct dsa_switch *ds, int port,
948 const unsigned char *addr, u16 vid)
950 struct sja1105_l2_lookup_entry l2_lookup = {0};
951 struct sja1105_private *priv = ds->priv;
952 struct device *dev = ds->dev;
953 int last_unused = -1;
954 int bin, way, rc;
956 bin = sja1105et_fdb_hash(priv, addr, vid);
958 way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
959 &l2_lookup, &last_unused);
960 if (way >= 0) {
961 /* We have an FDB entry. Is our port in the destination
962 * mask? If yes, we need to do nothing. If not, we need
963 * to rewrite the entry by adding this port to it.
965 if (l2_lookup.destports & BIT(port))
966 return 0;
967 l2_lookup.destports |= BIT(port);
968 } else {
969 int index = sja1105et_fdb_index(bin, way);
971 /* We don't have an FDB entry. We construct a new one and
972 * try to find a place for it within the FDB table.
974 l2_lookup.macaddr = ether_addr_to_u64(addr);
975 l2_lookup.destports = BIT(port);
976 l2_lookup.vlanid = vid;
978 if (last_unused >= 0) {
979 way = last_unused;
980 } else {
981 /* Bin is full, need to evict somebody.
982 * Choose victim at random. If you get these messages
983 * often, you may need to consider changing the
984 * distribution function:
985 * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly
987 get_random_bytes(&way, sizeof(u8));
988 way %= SJA1105ET_FDB_BIN_SIZE;
989 dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",
990 bin, addr, way);
991 /* Evict entry */
992 sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
993 index, NULL, false);
996 l2_lookup.index = sja1105et_fdb_index(bin, way);
998 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
999 l2_lookup.index, &l2_lookup,
1000 true);
1001 if (rc < 0)
1002 return rc;
1004 return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1007 int sja1105et_fdb_del(struct dsa_switch *ds, int port,
1008 const unsigned char *addr, u16 vid)
1010 struct sja1105_l2_lookup_entry l2_lookup = {0};
1011 struct sja1105_private *priv = ds->priv;
1012 int index, bin, way, rc;
1013 bool keep;
1015 bin = sja1105et_fdb_hash(priv, addr, vid);
1016 way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,
1017 &l2_lookup, NULL);
1018 if (way < 0)
1019 return 0;
1020 index = sja1105et_fdb_index(bin, way);
1022 /* We have an FDB entry. Is our port in the destination mask? If yes,
1023 * we need to remove it. If the resulting port mask becomes empty, we
1024 * need to completely evict the FDB entry.
1025 * Otherwise we just write it back.
1027 l2_lookup.destports &= ~BIT(port);
1029 if (l2_lookup.destports)
1030 keep = true;
1031 else
1032 keep = false;
1034 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1035 index, &l2_lookup, keep);
1036 if (rc < 0)
1037 return rc;
1039 return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1042 int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,
1043 const unsigned char *addr, u16 vid)
1045 struct sja1105_l2_lookup_entry l2_lookup = {0};
1046 struct sja1105_private *priv = ds->priv;
1047 int rc, i;
1049 /* Search for an existing entry in the FDB table */
1050 l2_lookup.macaddr = ether_addr_to_u64(addr);
1051 l2_lookup.vlanid = vid;
1052 l2_lookup.iotag = SJA1105_S_TAG;
1053 l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1054 if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) {
1055 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1056 l2_lookup.mask_iotag = BIT(0);
1057 } else {
1058 l2_lookup.mask_vlanid = 0;
1059 l2_lookup.mask_iotag = 0;
1061 l2_lookup.destports = BIT(port);
1063 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1064 SJA1105_SEARCH, &l2_lookup);
1065 if (rc == 0) {
1066 /* Found and this port is already in the entry's
1067 * port mask => job done
1069 if (l2_lookup.destports & BIT(port))
1070 return 0;
1071 /* l2_lookup.index is populated by the switch in case it
1072 * found something.
1074 l2_lookup.destports |= BIT(port);
1075 goto skip_finding_an_index;
1078 /* Not found, so try to find an unused spot in the FDB.
1079 * This is slightly inefficient because the strategy is knock-knock at
1080 * every possible position from 0 to 1023.
1082 for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1083 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1084 i, NULL);
1085 if (rc < 0)
1086 break;
1088 if (i == SJA1105_MAX_L2_LOOKUP_COUNT) {
1089 dev_err(ds->dev, "FDB is full, cannot add entry.\n");
1090 return -EINVAL;
1092 l2_lookup.lockeds = true;
1093 l2_lookup.index = i;
1095 skip_finding_an_index:
1096 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1097 l2_lookup.index, &l2_lookup,
1098 true);
1099 if (rc < 0)
1100 return rc;
1102 return sja1105_static_fdb_change(priv, port, &l2_lookup, true);
1105 int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,
1106 const unsigned char *addr, u16 vid)
1108 struct sja1105_l2_lookup_entry l2_lookup = {0};
1109 struct sja1105_private *priv = ds->priv;
1110 bool keep;
1111 int rc;
1113 l2_lookup.macaddr = ether_addr_to_u64(addr);
1114 l2_lookup.vlanid = vid;
1115 l2_lookup.iotag = SJA1105_S_TAG;
1116 l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1117 if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port))) {
1118 l2_lookup.mask_vlanid = VLAN_VID_MASK;
1119 l2_lookup.mask_iotag = BIT(0);
1120 } else {
1121 l2_lookup.mask_vlanid = 0;
1122 l2_lookup.mask_iotag = 0;
1124 l2_lookup.destports = BIT(port);
1126 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1127 SJA1105_SEARCH, &l2_lookup);
1128 if (rc < 0)
1129 return 0;
1131 l2_lookup.destports &= ~BIT(port);
1133 /* Decide whether we remove just this port from the FDB entry,
1134 * or if we remove it completely.
1136 if (l2_lookup.destports)
1137 keep = true;
1138 else
1139 keep = false;
1141 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
1142 l2_lookup.index, &l2_lookup, keep);
1143 if (rc < 0)
1144 return rc;
1146 return sja1105_static_fdb_change(priv, port, &l2_lookup, keep);
1149 static int sja1105_fdb_add(struct dsa_switch *ds, int port,
1150 const unsigned char *addr, u16 vid)
1152 struct sja1105_private *priv = ds->priv;
1154 /* dsa_8021q is in effect when the bridge's vlan_filtering isn't,
1155 * so the switch still does some VLAN processing internally.
1156 * But Shared VLAN Learning (SVL) is also active, and it will take
1157 * care of autonomous forwarding between the unique pvid's of each
1158 * port. Here we just make sure that users can't add duplicate FDB
1159 * entries when in this mode - the actual VID doesn't matter except
1160 * for what gets printed in 'bridge fdb show'. In the case of zero,
1161 * no VID gets printed at all.
1163 if (!dsa_port_is_vlan_filtering(dsa_to_port(ds, port)))
1164 vid = 0;
1166 return priv->info->fdb_add_cmd(ds, port, addr, vid);
1169 static int sja1105_fdb_del(struct dsa_switch *ds, int port,
1170 const unsigned char *addr, u16 vid)
1172 struct sja1105_private *priv = ds->priv;
1174 if (!dsa_port_is_vlan_filtering(dsa_to_port(ds, port)))
1175 vid = 0;
1177 return priv->info->fdb_del_cmd(ds, port, addr, vid);
1180 static int sja1105_fdb_dump(struct dsa_switch *ds, int port,
1181 dsa_fdb_dump_cb_t *cb, void *data)
1183 struct sja1105_private *priv = ds->priv;
1184 struct device *dev = ds->dev;
1185 int i;
1187 for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
1188 struct sja1105_l2_lookup_entry l2_lookup = {0};
1189 u8 macaddr[ETH_ALEN];
1190 int rc;
1192 rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
1193 i, &l2_lookup);
1194 /* No fdb entry at i, not an issue */
1195 if (rc == -ENOENT)
1196 continue;
1197 if (rc) {
1198 dev_err(dev, "Failed to dump FDB: %d\n", rc);
1199 return rc;
1202 /* FDB dump callback is per port. This means we have to
1203 * disregard a valid entry if it's not for this port, even if
1204 * only to revisit it later. This is inefficient because the
1205 * 1024-sized FDB table needs to be traversed 4 times through
1206 * SPI during a 'bridge fdb show' command.
1208 if (!(l2_lookup.destports & BIT(port)))
1209 continue;
1210 u64_to_ether_addr(l2_lookup.macaddr, macaddr);
1212 /* We need to hide the dsa_8021q VLANs from the user. */
1213 if (!dsa_port_is_vlan_filtering(dsa_to_port(ds, port)))
1214 l2_lookup.vlanid = 0;
1215 cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data);
1217 return 0;
1220 /* This callback needs to be present */
1221 static int sja1105_mdb_prepare(struct dsa_switch *ds, int port,
1222 const struct switchdev_obj_port_mdb *mdb)
1224 return 0;
1227 static void sja1105_mdb_add(struct dsa_switch *ds, int port,
1228 const struct switchdev_obj_port_mdb *mdb)
1230 sja1105_fdb_add(ds, port, mdb->addr, mdb->vid);
1233 static int sja1105_mdb_del(struct dsa_switch *ds, int port,
1234 const struct switchdev_obj_port_mdb *mdb)
1236 return sja1105_fdb_del(ds, port, mdb->addr, mdb->vid);
1239 static int sja1105_bridge_member(struct dsa_switch *ds, int port,
1240 struct net_device *br, bool member)
1242 struct sja1105_l2_forwarding_entry *l2_fwd;
1243 struct sja1105_private *priv = ds->priv;
1244 int i, rc;
1246 l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries;
1248 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1249 /* Add this port to the forwarding matrix of the
1250 * other ports in the same bridge, and viceversa.
1252 if (!dsa_is_user_port(ds, i))
1253 continue;
1254 /* For the ports already under the bridge, only one thing needs
1255 * to be done, and that is to add this port to their
1256 * reachability domain. So we can perform the SPI write for
1257 * them immediately. However, for this port itself (the one
1258 * that is new to the bridge), we need to add all other ports
1259 * to its reachability domain. So we do that incrementally in
1260 * this loop, and perform the SPI write only at the end, once
1261 * the domain contains all other bridge ports.
1263 if (i == port)
1264 continue;
1265 if (dsa_to_port(ds, i)->bridge_dev != br)
1266 continue;
1267 sja1105_port_allow_traffic(l2_fwd, i, port, member);
1268 sja1105_port_allow_traffic(l2_fwd, port, i, member);
1270 rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1271 i, &l2_fwd[i], true);
1272 if (rc < 0)
1273 return rc;
1276 return sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,
1277 port, &l2_fwd[port], true);
1280 static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,
1281 u8 state)
1283 struct sja1105_private *priv = ds->priv;
1284 struct sja1105_mac_config_entry *mac;
1286 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1288 switch (state) {
1289 case BR_STATE_DISABLED:
1290 case BR_STATE_BLOCKING:
1291 /* From UM10944 description of DRPDTAG (why put this there?):
1292 * "Management traffic flows to the port regardless of the state
1293 * of the INGRESS flag". So BPDUs are still be allowed to pass.
1294 * At the moment no difference between DISABLED and BLOCKING.
1296 mac[port].ingress = false;
1297 mac[port].egress = false;
1298 mac[port].dyn_learn = false;
1299 break;
1300 case BR_STATE_LISTENING:
1301 mac[port].ingress = true;
1302 mac[port].egress = false;
1303 mac[port].dyn_learn = false;
1304 break;
1305 case BR_STATE_LEARNING:
1306 mac[port].ingress = true;
1307 mac[port].egress = false;
1308 mac[port].dyn_learn = true;
1309 break;
1310 case BR_STATE_FORWARDING:
1311 mac[port].ingress = true;
1312 mac[port].egress = true;
1313 mac[port].dyn_learn = true;
1314 break;
1315 default:
1316 dev_err(ds->dev, "invalid STP state: %d\n", state);
1317 return;
1320 sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1321 &mac[port], true);
1324 static int sja1105_bridge_join(struct dsa_switch *ds, int port,
1325 struct net_device *br)
1327 return sja1105_bridge_member(ds, port, br, true);
1330 static void sja1105_bridge_leave(struct dsa_switch *ds, int port,
1331 struct net_device *br)
1333 sja1105_bridge_member(ds, port, br, false);
1336 static const char * const sja1105_reset_reasons[] = {
1337 [SJA1105_VLAN_FILTERING] = "VLAN filtering",
1338 [SJA1105_RX_HWTSTAMPING] = "RX timestamping",
1339 [SJA1105_AGEING_TIME] = "Ageing time",
1340 [SJA1105_SCHEDULING] = "Time-aware scheduling",
1343 /* For situations where we need to change a setting at runtime that is only
1344 * available through the static configuration, resetting the switch in order
1345 * to upload the new static config is unavoidable. Back up the settings we
1346 * modify at runtime (currently only MAC) and restore them after uploading,
1347 * such that this operation is relatively seamless.
1349 int sja1105_static_config_reload(struct sja1105_private *priv,
1350 enum sja1105_reset_reason reason)
1352 struct ptp_system_timestamp ptp_sts_before;
1353 struct ptp_system_timestamp ptp_sts_after;
1354 struct sja1105_mac_config_entry *mac;
1355 int speed_mbps[SJA1105_NUM_PORTS];
1356 struct dsa_switch *ds = priv->ds;
1357 s64 t1, t2, t3, t4;
1358 s64 t12, t34;
1359 int rc, i;
1360 s64 now;
1362 mutex_lock(&priv->mgmt_lock);
1364 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1366 /* Back up the dynamic link speed changed by sja1105_adjust_port_config
1367 * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the
1368 * switch wants to see in the static config in order to allow us to
1369 * change it through the dynamic interface later.
1371 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1372 speed_mbps[i] = sja1105_speed[mac[i].speed];
1373 mac[i].speed = SJA1105_SPEED_AUTO;
1376 /* No PTP operations can run right now */
1377 mutex_lock(&priv->ptp_data.lock);
1379 rc = __sja1105_ptp_gettimex(ds, &now, &ptp_sts_before);
1380 if (rc < 0)
1381 goto out_unlock_ptp;
1383 /* Reset switch and send updated static configuration */
1384 rc = sja1105_static_config_upload(priv);
1385 if (rc < 0)
1386 goto out_unlock_ptp;
1388 rc = __sja1105_ptp_settime(ds, 0, &ptp_sts_after);
1389 if (rc < 0)
1390 goto out_unlock_ptp;
1392 t1 = timespec64_to_ns(&ptp_sts_before.pre_ts);
1393 t2 = timespec64_to_ns(&ptp_sts_before.post_ts);
1394 t3 = timespec64_to_ns(&ptp_sts_after.pre_ts);
1395 t4 = timespec64_to_ns(&ptp_sts_after.post_ts);
1396 /* Mid point, corresponds to pre-reset PTPCLKVAL */
1397 t12 = t1 + (t2 - t1) / 2;
1398 /* Mid point, corresponds to post-reset PTPCLKVAL, aka 0 */
1399 t34 = t3 + (t4 - t3) / 2;
1400 /* Advance PTPCLKVAL by the time it took since its readout */
1401 now += (t34 - t12);
1403 __sja1105_ptp_adjtime(ds, now);
1405 out_unlock_ptp:
1406 mutex_unlock(&priv->ptp_data.lock);
1408 dev_info(priv->ds->dev,
1409 "Reset switch and programmed static config. Reason: %s\n",
1410 sja1105_reset_reasons[reason]);
1412 /* Configure the CGU (PLLs) for MII and RMII PHYs.
1413 * For these interfaces there is no dynamic configuration
1414 * needed, since PLLs have same settings at all speeds.
1416 rc = sja1105_clocking_setup(priv);
1417 if (rc < 0)
1418 goto out;
1420 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1421 rc = sja1105_adjust_port_config(priv, i, speed_mbps[i]);
1422 if (rc < 0)
1423 goto out;
1425 out:
1426 mutex_unlock(&priv->mgmt_lock);
1428 return rc;
1431 static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid)
1433 struct sja1105_mac_config_entry *mac;
1435 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1437 mac[port].vlanid = pvid;
1439 return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,
1440 &mac[port], true);
1443 static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid)
1445 struct sja1105_vlan_lookup_entry *vlan;
1446 int count, i;
1448 vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries;
1449 count = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count;
1451 for (i = 0; i < count; i++)
1452 if (vlan[i].vlanid == vid)
1453 return i;
1455 /* Return an invalid entry index if not found */
1456 return -1;
1459 static int sja1105_vlan_apply(struct sja1105_private *priv, int port, u16 vid,
1460 bool enabled, bool untagged)
1462 struct sja1105_vlan_lookup_entry *vlan;
1463 struct sja1105_table *table;
1464 bool keep = true;
1465 int match, rc;
1467 table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP];
1469 match = sja1105_is_vlan_configured(priv, vid);
1470 if (match < 0) {
1471 /* Can't delete a missing entry. */
1472 if (!enabled)
1473 return 0;
1474 rc = sja1105_table_resize(table, table->entry_count + 1);
1475 if (rc)
1476 return rc;
1477 match = table->entry_count - 1;
1479 /* Assign pointer after the resize (it's new memory) */
1480 vlan = table->entries;
1481 vlan[match].vlanid = vid;
1482 if (enabled) {
1483 vlan[match].vlan_bc |= BIT(port);
1484 vlan[match].vmemb_port |= BIT(port);
1485 } else {
1486 vlan[match].vlan_bc &= ~BIT(port);
1487 vlan[match].vmemb_port &= ~BIT(port);
1489 /* Also unset tag_port if removing this VLAN was requested,
1490 * just so we don't have a confusing bitmap (no practical purpose).
1492 if (untagged || !enabled)
1493 vlan[match].tag_port &= ~BIT(port);
1494 else
1495 vlan[match].tag_port |= BIT(port);
1496 /* If there's no port left as member of this VLAN,
1497 * it's time for it to go.
1499 if (!vlan[match].vmemb_port)
1500 keep = false;
1502 dev_dbg(priv->ds->dev,
1503 "%s: port %d, vid %llu, broadcast domain 0x%llx, "
1504 "port members 0x%llx, tagged ports 0x%llx, keep %d\n",
1505 __func__, port, vlan[match].vlanid, vlan[match].vlan_bc,
1506 vlan[match].vmemb_port, vlan[match].tag_port, keep);
1508 rc = sja1105_dynamic_config_write(priv, BLK_IDX_VLAN_LOOKUP, vid,
1509 &vlan[match], keep);
1510 if (rc < 0)
1511 return rc;
1513 if (!keep)
1514 return sja1105_table_delete_entry(table, match);
1516 return 0;
1519 static int sja1105_setup_8021q_tagging(struct dsa_switch *ds, bool enabled)
1521 int rc, i;
1523 for (i = 0; i < SJA1105_NUM_PORTS; i++) {
1524 rc = dsa_port_setup_8021q_tagging(ds, i, enabled);
1525 if (rc < 0) {
1526 dev_err(ds->dev, "Failed to setup VLAN tagging for port %d: %d\n",
1527 i, rc);
1528 return rc;
1531 dev_info(ds->dev, "%s switch tagging\n",
1532 enabled ? "Enabled" : "Disabled");
1533 return 0;
1536 static enum dsa_tag_protocol
1537 sja1105_get_tag_protocol(struct dsa_switch *ds, int port,
1538 enum dsa_tag_protocol mp)
1540 return DSA_TAG_PROTO_SJA1105;
1543 /* This callback needs to be present */
1544 static int sja1105_vlan_prepare(struct dsa_switch *ds, int port,
1545 const struct switchdev_obj_port_vlan *vlan)
1547 return 0;
1550 /* The TPID setting belongs to the General Parameters table,
1551 * which can only be partially reconfigured at runtime (and not the TPID).
1552 * So a switch reset is required.
1554 static int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled)
1556 struct sja1105_l2_lookup_params_entry *l2_lookup_params;
1557 struct sja1105_general_params_entry *general_params;
1558 struct sja1105_private *priv = ds->priv;
1559 struct sja1105_table *table;
1560 u16 tpid, tpid2;
1561 int rc;
1563 if (enabled) {
1564 /* Enable VLAN filtering. */
1565 tpid = ETH_P_8021Q;
1566 tpid2 = ETH_P_8021AD;
1567 } else {
1568 /* Disable VLAN filtering. */
1569 tpid = ETH_P_SJA1105;
1570 tpid2 = ETH_P_SJA1105;
1573 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
1574 general_params = table->entries;
1575 /* EtherType used to identify inner tagged (C-tag) VLAN traffic */
1576 general_params->tpid = tpid;
1577 /* EtherType used to identify outer tagged (S-tag) VLAN traffic */
1578 general_params->tpid2 = tpid2;
1579 /* When VLAN filtering is on, we need to at least be able to
1580 * decode management traffic through the "backup plan".
1582 general_params->incl_srcpt1 = enabled;
1583 general_params->incl_srcpt0 = enabled;
1585 /* VLAN filtering => independent VLAN learning.
1586 * No VLAN filtering => shared VLAN learning.
1588 * In shared VLAN learning mode, untagged traffic still gets
1589 * pvid-tagged, and the FDB table gets populated with entries
1590 * containing the "real" (pvid or from VLAN tag) VLAN ID.
1591 * However the switch performs a masked L2 lookup in the FDB,
1592 * effectively only looking up a frame's DMAC (and not VID) for the
1593 * forwarding decision.
1595 * This is extremely convenient for us, because in modes with
1596 * vlan_filtering=0, dsa_8021q actually installs unique pvid's into
1597 * each front panel port. This is good for identification but breaks
1598 * learning badly - the VID of the learnt FDB entry is unique, aka
1599 * no frames coming from any other port are going to have it. So
1600 * for forwarding purposes, this is as though learning was broken
1601 * (all frames get flooded).
1603 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
1604 l2_lookup_params = table->entries;
1605 l2_lookup_params->shared_learn = !enabled;
1607 rc = sja1105_static_config_reload(priv, SJA1105_VLAN_FILTERING);
1608 if (rc)
1609 dev_err(ds->dev, "Failed to change VLAN Ethertype\n");
1611 /* Switch port identification based on 802.1Q is only passable
1612 * if we are not under a vlan_filtering bridge. So make sure
1613 * the two configurations are mutually exclusive.
1615 return sja1105_setup_8021q_tagging(ds, !enabled);
1618 static void sja1105_vlan_add(struct dsa_switch *ds, int port,
1619 const struct switchdev_obj_port_vlan *vlan)
1621 struct sja1105_private *priv = ds->priv;
1622 u16 vid;
1623 int rc;
1625 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
1626 rc = sja1105_vlan_apply(priv, port, vid, true, vlan->flags &
1627 BRIDGE_VLAN_INFO_UNTAGGED);
1628 if (rc < 0) {
1629 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n",
1630 vid, port, rc);
1631 return;
1633 if (vlan->flags & BRIDGE_VLAN_INFO_PVID) {
1634 rc = sja1105_pvid_apply(ds->priv, port, vid);
1635 if (rc < 0) {
1636 dev_err(ds->dev, "Failed to set pvid %d on port %d: %d\n",
1637 vid, port, rc);
1638 return;
1644 static int sja1105_vlan_del(struct dsa_switch *ds, int port,
1645 const struct switchdev_obj_port_vlan *vlan)
1647 struct sja1105_private *priv = ds->priv;
1648 u16 vid;
1649 int rc;
1651 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
1652 rc = sja1105_vlan_apply(priv, port, vid, false, vlan->flags &
1653 BRIDGE_VLAN_INFO_UNTAGGED);
1654 if (rc < 0) {
1655 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n",
1656 vid, port, rc);
1657 return rc;
1660 return 0;
1663 /* The programming model for the SJA1105 switch is "all-at-once" via static
1664 * configuration tables. Some of these can be dynamically modified at runtime,
1665 * but not the xMII mode parameters table.
1666 * Furthermode, some PHYs may not have crystals for generating their clocks
1667 * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's
1668 * ref_clk pin. So port clocking needs to be initialized early, before
1669 * connecting to PHYs is attempted, otherwise they won't respond through MDIO.
1670 * Setting correct PHY link speed does not matter now.
1671 * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY
1672 * bindings are not yet parsed by DSA core. We need to parse early so that we
1673 * can populate the xMII mode parameters table.
1675 static int sja1105_setup(struct dsa_switch *ds)
1677 struct sja1105_dt_port ports[SJA1105_NUM_PORTS];
1678 struct sja1105_private *priv = ds->priv;
1679 int rc;
1681 rc = sja1105_parse_dt(priv, ports);
1682 if (rc < 0) {
1683 dev_err(ds->dev, "Failed to parse DT: %d\n", rc);
1684 return rc;
1687 /* Error out early if internal delays are required through DT
1688 * and we can't apply them.
1690 rc = sja1105_parse_rgmii_delays(priv, ports);
1691 if (rc < 0) {
1692 dev_err(ds->dev, "RGMII delay not supported\n");
1693 return rc;
1696 rc = sja1105_ptp_clock_register(ds);
1697 if (rc < 0) {
1698 dev_err(ds->dev, "Failed to register PTP clock: %d\n", rc);
1699 return rc;
1701 /* Create and send configuration down to device */
1702 rc = sja1105_static_config_load(priv, ports);
1703 if (rc < 0) {
1704 dev_err(ds->dev, "Failed to load static config: %d\n", rc);
1705 return rc;
1707 /* Configure the CGU (PHY link modes and speeds) */
1708 rc = sja1105_clocking_setup(priv);
1709 if (rc < 0) {
1710 dev_err(ds->dev, "Failed to configure MII clocking: %d\n", rc);
1711 return rc;
1713 /* On SJA1105, VLAN filtering per se is always enabled in hardware.
1714 * The only thing we can do to disable it is lie about what the 802.1Q
1715 * EtherType is.
1716 * So it will still try to apply VLAN filtering, but all ingress
1717 * traffic (except frames received with EtherType of ETH_P_SJA1105)
1718 * will be internally tagged with a distorted VLAN header where the
1719 * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.
1721 ds->vlan_filtering_is_global = true;
1723 /* Advertise the 8 egress queues */
1724 ds->num_tx_queues = SJA1105_NUM_TC;
1726 /* The DSA/switchdev model brings up switch ports in standalone mode by
1727 * default, and that means vlan_filtering is 0 since they're not under
1728 * a bridge, so it's safe to set up switch tagging at this time.
1730 return sja1105_setup_8021q_tagging(ds, true);
1733 static void sja1105_teardown(struct dsa_switch *ds)
1735 struct sja1105_private *priv = ds->priv;
1736 int port;
1738 for (port = 0; port < SJA1105_NUM_PORTS; port++) {
1739 struct sja1105_port *sp = &priv->ports[port];
1741 if (!dsa_is_user_port(ds, port))
1742 continue;
1744 kthread_destroy_worker(sp->xmit_worker);
1747 sja1105_tas_teardown(ds);
1748 sja1105_ptp_clock_unregister(ds);
1749 sja1105_static_config_free(&priv->static_config);
1752 static int sja1105_port_enable(struct dsa_switch *ds, int port,
1753 struct phy_device *phy)
1755 struct net_device *slave;
1757 if (!dsa_is_user_port(ds, port))
1758 return 0;
1760 slave = dsa_to_port(ds, port)->slave;
1762 slave->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
1764 return 0;
1767 static void sja1105_port_disable(struct dsa_switch *ds, int port)
1769 struct sja1105_private *priv = ds->priv;
1770 struct sja1105_port *sp = &priv->ports[port];
1772 if (!dsa_is_user_port(ds, port))
1773 return;
1775 kthread_cancel_work_sync(&sp->xmit_work);
1776 skb_queue_purge(&sp->xmit_queue);
1779 static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
1780 struct sk_buff *skb, bool takets)
1782 struct sja1105_mgmt_entry mgmt_route = {0};
1783 struct sja1105_private *priv = ds->priv;
1784 struct ethhdr *hdr;
1785 int timeout = 10;
1786 int rc;
1788 hdr = eth_hdr(skb);
1790 mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest);
1791 mgmt_route.destports = BIT(port);
1792 mgmt_route.enfport = 1;
1793 mgmt_route.tsreg = 0;
1794 mgmt_route.takets = takets;
1796 rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
1797 slot, &mgmt_route, true);
1798 if (rc < 0) {
1799 kfree_skb(skb);
1800 return rc;
1803 /* Transfer skb to the host port. */
1804 dsa_enqueue_skb(skb, dsa_to_port(ds, port)->slave);
1806 /* Wait until the switch has processed the frame */
1807 do {
1808 rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE,
1809 slot, &mgmt_route);
1810 if (rc < 0) {
1811 dev_err_ratelimited(priv->ds->dev,
1812 "failed to poll for mgmt route\n");
1813 continue;
1816 /* UM10944: The ENFPORT flag of the respective entry is
1817 * cleared when a match is found. The host can use this
1818 * flag as an acknowledgment.
1820 cpu_relax();
1821 } while (mgmt_route.enfport && --timeout);
1823 if (!timeout) {
1824 /* Clean up the management route so that a follow-up
1825 * frame may not match on it by mistake.
1826 * This is only hardware supported on P/Q/R/S - on E/T it is
1827 * a no-op and we are silently discarding the -EOPNOTSUPP.
1829 sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,
1830 slot, &mgmt_route, false);
1831 dev_err_ratelimited(priv->ds->dev, "xmit timed out\n");
1834 return NETDEV_TX_OK;
1837 #define work_to_port(work) \
1838 container_of((work), struct sja1105_port, xmit_work)
1839 #define tagger_to_sja1105(t) \
1840 container_of((t), struct sja1105_private, tagger_data)
1842 /* Deferred work is unfortunately necessary because setting up the management
1843 * route cannot be done from atomit context (SPI transfer takes a sleepable
1844 * lock on the bus)
1846 static void sja1105_port_deferred_xmit(struct kthread_work *work)
1848 struct sja1105_port *sp = work_to_port(work);
1849 struct sja1105_tagger_data *tagger_data = sp->data;
1850 struct sja1105_private *priv = tagger_to_sja1105(tagger_data);
1851 int port = sp - priv->ports;
1852 struct sk_buff *skb;
1854 while ((skb = skb_dequeue(&sp->xmit_queue)) != NULL) {
1855 struct sk_buff *clone = DSA_SKB_CB(skb)->clone;
1857 mutex_lock(&priv->mgmt_lock);
1859 sja1105_mgmt_xmit(priv->ds, port, 0, skb, !!clone);
1861 /* The clone, if there, was made by dsa_skb_tx_timestamp */
1862 if (clone)
1863 sja1105_ptp_txtstamp_skb(priv->ds, port, clone);
1865 mutex_unlock(&priv->mgmt_lock);
1869 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table,
1870 * which cannot be reconfigured at runtime. So a switch reset is required.
1872 static int sja1105_set_ageing_time(struct dsa_switch *ds,
1873 unsigned int ageing_time)
1875 struct sja1105_l2_lookup_params_entry *l2_lookup_params;
1876 struct sja1105_private *priv = ds->priv;
1877 struct sja1105_table *table;
1878 unsigned int maxage;
1880 table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
1881 l2_lookup_params = table->entries;
1883 maxage = SJA1105_AGEING_TIME_MS(ageing_time);
1885 if (l2_lookup_params->maxage == maxage)
1886 return 0;
1888 l2_lookup_params->maxage = maxage;
1890 return sja1105_static_config_reload(priv, SJA1105_AGEING_TIME);
1893 static int sja1105_port_setup_tc(struct dsa_switch *ds, int port,
1894 enum tc_setup_type type,
1895 void *type_data)
1897 switch (type) {
1898 case TC_SETUP_QDISC_TAPRIO:
1899 return sja1105_setup_tc_taprio(ds, port, type_data);
1900 default:
1901 return -EOPNOTSUPP;
1905 /* We have a single mirror (@to) port, but can configure ingress and egress
1906 * mirroring on all other (@from) ports.
1907 * We need to allow mirroring rules only as long as the @to port is always the
1908 * same, and we need to unset the @to port from mirr_port only when there is no
1909 * mirroring rule that references it.
1911 static int sja1105_mirror_apply(struct sja1105_private *priv, int from, int to,
1912 bool ingress, bool enabled)
1914 struct sja1105_general_params_entry *general_params;
1915 struct sja1105_mac_config_entry *mac;
1916 struct sja1105_table *table;
1917 bool already_enabled;
1918 u64 new_mirr_port;
1919 int rc;
1921 table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS];
1922 general_params = table->entries;
1924 mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
1926 already_enabled = (general_params->mirr_port != SJA1105_NUM_PORTS);
1927 if (already_enabled && enabled && general_params->mirr_port != to) {
1928 dev_err(priv->ds->dev,
1929 "Delete mirroring rules towards port %llu first\n",
1930 general_params->mirr_port);
1931 return -EBUSY;
1934 new_mirr_port = to;
1935 if (!enabled) {
1936 bool keep = false;
1937 int port;
1939 /* Anybody still referencing mirr_port? */
1940 for (port = 0; port < SJA1105_NUM_PORTS; port++) {
1941 if (mac[port].ing_mirr || mac[port].egr_mirr) {
1942 keep = true;
1943 break;
1946 /* Unset already_enabled for next time */
1947 if (!keep)
1948 new_mirr_port = SJA1105_NUM_PORTS;
1950 if (new_mirr_port != general_params->mirr_port) {
1951 general_params->mirr_port = new_mirr_port;
1953 rc = sja1105_dynamic_config_write(priv, BLK_IDX_GENERAL_PARAMS,
1954 0, general_params, true);
1955 if (rc < 0)
1956 return rc;
1959 if (ingress)
1960 mac[from].ing_mirr = enabled;
1961 else
1962 mac[from].egr_mirr = enabled;
1964 return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, from,
1965 &mac[from], true);
1968 static int sja1105_mirror_add(struct dsa_switch *ds, int port,
1969 struct dsa_mall_mirror_tc_entry *mirror,
1970 bool ingress)
1972 return sja1105_mirror_apply(ds->priv, port, mirror->to_local_port,
1973 ingress, true);
1976 static void sja1105_mirror_del(struct dsa_switch *ds, int port,
1977 struct dsa_mall_mirror_tc_entry *mirror)
1979 sja1105_mirror_apply(ds->priv, port, mirror->to_local_port,
1980 mirror->ingress, false);
1983 static const struct dsa_switch_ops sja1105_switch_ops = {
1984 .get_tag_protocol = sja1105_get_tag_protocol,
1985 .setup = sja1105_setup,
1986 .teardown = sja1105_teardown,
1987 .set_ageing_time = sja1105_set_ageing_time,
1988 .phylink_validate = sja1105_phylink_validate,
1989 .phylink_mac_config = sja1105_mac_config,
1990 .phylink_mac_link_up = sja1105_mac_link_up,
1991 .phylink_mac_link_down = sja1105_mac_link_down,
1992 .get_strings = sja1105_get_strings,
1993 .get_ethtool_stats = sja1105_get_ethtool_stats,
1994 .get_sset_count = sja1105_get_sset_count,
1995 .get_ts_info = sja1105_get_ts_info,
1996 .port_enable = sja1105_port_enable,
1997 .port_disable = sja1105_port_disable,
1998 .port_fdb_dump = sja1105_fdb_dump,
1999 .port_fdb_add = sja1105_fdb_add,
2000 .port_fdb_del = sja1105_fdb_del,
2001 .port_bridge_join = sja1105_bridge_join,
2002 .port_bridge_leave = sja1105_bridge_leave,
2003 .port_stp_state_set = sja1105_bridge_stp_state_set,
2004 .port_vlan_prepare = sja1105_vlan_prepare,
2005 .port_vlan_filtering = sja1105_vlan_filtering,
2006 .port_vlan_add = sja1105_vlan_add,
2007 .port_vlan_del = sja1105_vlan_del,
2008 .port_mdb_prepare = sja1105_mdb_prepare,
2009 .port_mdb_add = sja1105_mdb_add,
2010 .port_mdb_del = sja1105_mdb_del,
2011 .port_hwtstamp_get = sja1105_hwtstamp_get,
2012 .port_hwtstamp_set = sja1105_hwtstamp_set,
2013 .port_rxtstamp = sja1105_port_rxtstamp,
2014 .port_txtstamp = sja1105_port_txtstamp,
2015 .port_setup_tc = sja1105_port_setup_tc,
2016 .port_mirror_add = sja1105_mirror_add,
2017 .port_mirror_del = sja1105_mirror_del,
2020 static int sja1105_check_device_id(struct sja1105_private *priv)
2022 const struct sja1105_regs *regs = priv->info->regs;
2023 u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0};
2024 struct device *dev = &priv->spidev->dev;
2025 u32 device_id;
2026 u64 part_no;
2027 int rc;
2029 rc = sja1105_xfer_u32(priv, SPI_READ, regs->device_id, &device_id,
2030 NULL);
2031 if (rc < 0)
2032 return rc;
2034 if (device_id != priv->info->device_id) {
2035 dev_err(dev, "Expected device ID 0x%llx but read 0x%x\n",
2036 priv->info->device_id, device_id);
2037 return -ENODEV;
2040 rc = sja1105_xfer_buf(priv, SPI_READ, regs->prod_id, prod_id,
2041 SJA1105_SIZE_DEVICE_ID);
2042 if (rc < 0)
2043 return rc;
2045 sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);
2047 if (part_no != priv->info->part_no) {
2048 dev_err(dev, "Expected part number 0x%llx but read 0x%llx\n",
2049 priv->info->part_no, part_no);
2050 return -ENODEV;
2053 return 0;
2056 static int sja1105_probe(struct spi_device *spi)
2058 struct sja1105_tagger_data *tagger_data;
2059 struct device *dev = &spi->dev;
2060 struct sja1105_private *priv;
2061 struct dsa_switch *ds;
2062 int rc, port;
2064 if (!dev->of_node) {
2065 dev_err(dev, "No DTS bindings for SJA1105 driver\n");
2066 return -EINVAL;
2069 priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL);
2070 if (!priv)
2071 return -ENOMEM;
2073 /* Configure the optional reset pin and bring up switch */
2074 priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
2075 if (IS_ERR(priv->reset_gpio))
2076 dev_dbg(dev, "reset-gpios not defined, ignoring\n");
2077 else
2078 sja1105_hw_reset(priv->reset_gpio, 1, 1);
2080 /* Populate our driver private structure (priv) based on
2081 * the device tree node that was probed (spi)
2083 priv->spidev = spi;
2084 spi_set_drvdata(spi, priv);
2086 /* Configure the SPI bus */
2087 spi->bits_per_word = 8;
2088 rc = spi_setup(spi);
2089 if (rc < 0) {
2090 dev_err(dev, "Could not init SPI\n");
2091 return rc;
2094 priv->info = of_device_get_match_data(dev);
2096 /* Detect hardware device */
2097 rc = sja1105_check_device_id(priv);
2098 if (rc < 0) {
2099 dev_err(dev, "Device ID check failed: %d\n", rc);
2100 return rc;
2103 dev_info(dev, "Probed switch chip: %s\n", priv->info->name);
2105 ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
2106 if (!ds)
2107 return -ENOMEM;
2109 ds->dev = dev;
2110 ds->num_ports = SJA1105_NUM_PORTS;
2111 ds->ops = &sja1105_switch_ops;
2112 ds->priv = priv;
2113 priv->ds = ds;
2115 tagger_data = &priv->tagger_data;
2117 mutex_init(&priv->ptp_data.lock);
2118 mutex_init(&priv->mgmt_lock);
2120 sja1105_tas_setup(ds);
2122 rc = dsa_register_switch(priv->ds);
2123 if (rc)
2124 return rc;
2126 /* Connections between dsa_port and sja1105_port */
2127 for (port = 0; port < SJA1105_NUM_PORTS; port++) {
2128 struct sja1105_port *sp = &priv->ports[port];
2129 struct dsa_port *dp = dsa_to_port(ds, port);
2130 struct net_device *slave;
2132 if (!dsa_is_user_port(ds, port))
2133 continue;
2135 dp->priv = sp;
2136 sp->dp = dp;
2137 sp->data = tagger_data;
2138 slave = dp->slave;
2139 kthread_init_work(&sp->xmit_work, sja1105_port_deferred_xmit);
2140 sp->xmit_worker = kthread_create_worker(0, "%s_xmit",
2141 slave->name);
2142 if (IS_ERR(sp->xmit_worker)) {
2143 rc = PTR_ERR(sp->xmit_worker);
2144 dev_err(ds->dev,
2145 "failed to create deferred xmit thread: %d\n",
2146 rc);
2147 goto out;
2149 skb_queue_head_init(&sp->xmit_queue);
2152 return 0;
2153 out:
2154 while (port-- > 0) {
2155 struct sja1105_port *sp = &priv->ports[port];
2157 if (!dsa_is_user_port(ds, port))
2158 continue;
2160 kthread_destroy_worker(sp->xmit_worker);
2162 return rc;
2165 static int sja1105_remove(struct spi_device *spi)
2167 struct sja1105_private *priv = spi_get_drvdata(spi);
2169 dsa_unregister_switch(priv->ds);
2170 return 0;
2173 static const struct of_device_id sja1105_dt_ids[] = {
2174 { .compatible = "nxp,sja1105e", .data = &sja1105e_info },
2175 { .compatible = "nxp,sja1105t", .data = &sja1105t_info },
2176 { .compatible = "nxp,sja1105p", .data = &sja1105p_info },
2177 { .compatible = "nxp,sja1105q", .data = &sja1105q_info },
2178 { .compatible = "nxp,sja1105r", .data = &sja1105r_info },
2179 { .compatible = "nxp,sja1105s", .data = &sja1105s_info },
2180 { /* sentinel */ },
2182 MODULE_DEVICE_TABLE(of, sja1105_dt_ids);
2184 static struct spi_driver sja1105_driver = {
2185 .driver = {
2186 .name = "sja1105",
2187 .owner = THIS_MODULE,
2188 .of_match_table = of_match_ptr(sja1105_dt_ids),
2190 .probe = sja1105_probe,
2191 .remove = sja1105_remove,
2194 module_spi_driver(sja1105_driver);
2196 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>");
2197 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>");
2198 MODULE_DESCRIPTION("SJA1105 Driver");
2199 MODULE_LICENSE("GPL v2");