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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / net / ethernet / amazon / ena / ena_netdev.c
blob894e8c1a8cf15f7ab33eb3d2cb326507255ce5a6
1 /*
2 * Copyright 2015 Amazon.com, Inc. or its affiliates.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
35 #ifdef CONFIG_RFS_ACCEL
36 #include <linux/cpu_rmap.h>
37 #endif /* CONFIG_RFS_ACCEL */
38 #include <linux/ethtool.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/numa.h>
42 #include <linux/pci.h>
43 #include <linux/utsname.h>
44 #include <linux/version.h>
45 #include <linux/vmalloc.h>
46 #include <net/ip.h>
47
48 #include "ena_netdev.h"
49 #include <linux/bpf_trace.h>
50 #include "ena_pci_id_tbl.h"
51
52 static char version[] = DEVICE_NAME " v" DRV_MODULE_VERSION "\n";
53
54 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
55 MODULE_DESCRIPTION(DEVICE_NAME);
56 MODULE_LICENSE("GPL");
57 MODULE_VERSION(DRV_MODULE_VERSION);
58
59 /* Time in jiffies before concluding the transmitter is hung. */
60 #define TX_TIMEOUT (5 * HZ)
61
62 #define ENA_NAPI_BUDGET 64
63
64 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
65 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
66 static int debug = -1;
67 module_param(debug, int, 0);
68 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
69
70 static struct ena_aenq_handlers aenq_handlers;
71
72 static struct workqueue_struct *ena_wq;
73
74 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
75
76 static int ena_rss_init_default(struct ena_adapter *adapter);
77 static void check_for_admin_com_state(struct ena_adapter *adapter);
78 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
79 static int ena_restore_device(struct ena_adapter *adapter);
80
81 static void ena_init_io_rings(struct ena_adapter *adapter,
82 int first_index, int count);
83 static void ena_init_napi_in_range(struct ena_adapter *adapter, int first_index,
84 int count);
85 static void ena_del_napi_in_range(struct ena_adapter *adapter, int first_index,
86 int count);
87 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid);
88 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
89 int first_index,
90 int count);
91 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid);
92 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid);
93 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget);
94 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter);
95 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter);
96 static void ena_napi_disable_in_range(struct ena_adapter *adapter,
97 int first_index, int count);
98 static void ena_napi_enable_in_range(struct ena_adapter *adapter,
99 int first_index, int count);
100 static int ena_up(struct ena_adapter *adapter);
101 static void ena_down(struct ena_adapter *adapter);
102 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
103 struct ena_ring *rx_ring);
104 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
105 struct ena_ring *rx_ring);
106 static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
107 struct ena_tx_buffer *tx_info);
108 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
109 int first_index, int count);
110
111 static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue)
112 {
113 struct ena_adapter *adapter = netdev_priv(dev);
114
115 /* Change the state of the device to trigger reset
116 * Check that we are not in the middle or a trigger already
117 */
118
119 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
120 return;
121
122 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;
123 u64_stats_update_begin(&adapter->syncp);
124 adapter->dev_stats.tx_timeout++;
125 u64_stats_update_end(&adapter->syncp);
126
127 netif_err(adapter, tx_err, dev, "Transmit time out\n");
128 }
129
130 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
131 {
132 int i;
133
134 for (i = 0; i < adapter->num_io_queues; i++)
135 adapter->rx_ring[i].mtu = mtu;
136 }
137
138 static int ena_change_mtu(struct net_device *dev, int new_mtu)
139 {
140 struct ena_adapter *adapter = netdev_priv(dev);
141 int ret;
142
143 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
144 if (!ret) {
145 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu);
146 update_rx_ring_mtu(adapter, new_mtu);
147 dev->mtu = new_mtu;
148 } else {
149 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
150 new_mtu);
151 }
152
153 return ret;
154 }
155
156 static int ena_xmit_common(struct net_device *dev,
157 struct ena_ring *ring,
158 struct ena_tx_buffer *tx_info,
159 struct ena_com_tx_ctx *ena_tx_ctx,
160 u16 next_to_use,
161 u32 bytes)
162 {
163 struct ena_adapter *adapter = netdev_priv(dev);
164 int rc, nb_hw_desc;
165
166 if (unlikely(ena_com_is_doorbell_needed(ring->ena_com_io_sq,
167 ena_tx_ctx))) {
168 netif_dbg(adapter, tx_queued, dev,
169 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n",
170 ring->qid);
171 ena_com_write_sq_doorbell(ring->ena_com_io_sq);
172 }
173
174 /* prepare the packet's descriptors to dma engine */
175 rc = ena_com_prepare_tx(ring->ena_com_io_sq, ena_tx_ctx,
176 &nb_hw_desc);
177
178 /* In case there isn't enough space in the queue for the packet,
179 * we simply drop it. All other failure reasons of
180 * ena_com_prepare_tx() are fatal and therefore require a device reset.
181 */
182 if (unlikely(rc)) {
183 netif_err(adapter, tx_queued, dev,
184 "failed to prepare tx bufs\n");
185 u64_stats_update_begin(&ring->syncp);
186 ring->tx_stats.prepare_ctx_err++;
187 u64_stats_update_end(&ring->syncp);
188 if (rc != -ENOMEM) {
189 adapter->reset_reason =
190 ENA_REGS_RESET_DRIVER_INVALID_STATE;
191 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
192 }
193 return rc;
194 }
195
196 u64_stats_update_begin(&ring->syncp);
197 ring->tx_stats.cnt++;
198 ring->tx_stats.bytes += bytes;
199 u64_stats_update_end(&ring->syncp);
200
201 tx_info->tx_descs = nb_hw_desc;
202 tx_info->last_jiffies = jiffies;
203 tx_info->print_once = 0;
204
205 ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
206 ring->ring_size);
207 return 0;
208 }
209
210 /* This is the XDP napi callback. XDP queues use a separate napi callback
211 * than Rx/Tx queues.
212 */
213 static int ena_xdp_io_poll(struct napi_struct *napi, int budget)
214 {
215 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
216 u32 xdp_work_done, xdp_budget;
217 struct ena_ring *xdp_ring;
218 int napi_comp_call = 0;
219 int ret;
220
221 xdp_ring = ena_napi->xdp_ring;
222 xdp_ring->first_interrupt = ena_napi->first_interrupt;
223
224 xdp_budget = budget;
225
226 if (!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags) ||
227 test_bit(ENA_FLAG_TRIGGER_RESET, &xdp_ring->adapter->flags)) {
228 napi_complete_done(napi, 0);
229 return 0;
230 }
231
232 xdp_work_done = ena_clean_xdp_irq(xdp_ring, xdp_budget);
233
234 /* If the device is about to reset or down, avoid unmask
235 * the interrupt and return 0 so NAPI won't reschedule
236 */
237 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &xdp_ring->adapter->flags))) {
238 napi_complete_done(napi, 0);
239 ret = 0;
240 } else if (xdp_budget > xdp_work_done) {
241 napi_comp_call = 1;
242 if (napi_complete_done(napi, xdp_work_done))
243 ena_unmask_interrupt(xdp_ring, NULL);
244 ena_update_ring_numa_node(xdp_ring, NULL);
245 ret = xdp_work_done;
246 } else {
247 ret = xdp_budget;
248 }
249
250 u64_stats_update_begin(&xdp_ring->syncp);
251 xdp_ring->tx_stats.napi_comp += napi_comp_call;
252 xdp_ring->tx_stats.tx_poll++;
253 u64_stats_update_end(&xdp_ring->syncp);
254
255 return ret;
256 }
257
258 static int ena_xdp_tx_map_buff(struct ena_ring *xdp_ring,
259 struct ena_tx_buffer *tx_info,
260 struct xdp_buff *xdp,
261 void **push_hdr,
262 u32 *push_len)
263 {
264 struct ena_adapter *adapter = xdp_ring->adapter;
265 struct ena_com_buf *ena_buf;
266 dma_addr_t dma = 0;
267 u32 size;
268
269 tx_info->xdpf = convert_to_xdp_frame(xdp);
270 size = tx_info->xdpf->len;
271 ena_buf = tx_info->bufs;
272
273 /* llq push buffer */
274 *push_len = min_t(u32, size, xdp_ring->tx_max_header_size);
275 *push_hdr = tx_info->xdpf->data;
276
277 if (size - *push_len > 0) {
278 dma = dma_map_single(xdp_ring->dev,
279 *push_hdr + *push_len,
280 size - *push_len,
281 DMA_TO_DEVICE);
282 if (unlikely(dma_mapping_error(xdp_ring->dev, dma)))
283 goto error_report_dma_error;
284
285 tx_info->map_linear_data = 1;
286 tx_info->num_of_bufs = 1;
287 }
288
289 ena_buf->paddr = dma;
290 ena_buf->len = size;
291
292 return 0;
293
294 error_report_dma_error:
295 u64_stats_update_begin(&xdp_ring->syncp);
296 xdp_ring->tx_stats.dma_mapping_err++;
297 u64_stats_update_end(&xdp_ring->syncp);
298 netdev_warn(adapter->netdev, "failed to map xdp buff\n");
299
300 xdp_return_frame_rx_napi(tx_info->xdpf);
301 tx_info->xdpf = NULL;
302 tx_info->num_of_bufs = 0;
303
304 return -EINVAL;
305 }
306
307 static int ena_xdp_xmit_buff(struct net_device *dev,
308 struct xdp_buff *xdp,
309 int qid,
310 struct ena_rx_buffer *rx_info)
311 {
312 struct ena_adapter *adapter = netdev_priv(dev);
313 struct ena_com_tx_ctx ena_tx_ctx = {0};
314 struct ena_tx_buffer *tx_info;
315 struct ena_ring *xdp_ring;
316 u16 next_to_use, req_id;
317 int rc;
318 void *push_hdr;
319 u32 push_len;
320
321 xdp_ring = &adapter->tx_ring[qid];
322 next_to_use = xdp_ring->next_to_use;
323 req_id = xdp_ring->free_ids[next_to_use];
324 tx_info = &xdp_ring->tx_buffer_info[req_id];
325 tx_info->num_of_bufs = 0;
326 page_ref_inc(rx_info->page);
327 tx_info->xdp_rx_page = rx_info->page;
328
329 rc = ena_xdp_tx_map_buff(xdp_ring, tx_info, xdp, &push_hdr, &push_len);
330 if (unlikely(rc))
331 goto error_drop_packet;
332
333 ena_tx_ctx.ena_bufs = tx_info->bufs;
334 ena_tx_ctx.push_header = push_hdr;
335 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
336 ena_tx_ctx.req_id = req_id;
337 ena_tx_ctx.header_len = push_len;
338
339 rc = ena_xmit_common(dev,
340 xdp_ring,
341 tx_info,
342 &ena_tx_ctx,
343 next_to_use,
344 xdp->data_end - xdp->data);
345 if (rc)
346 goto error_unmap_dma;
347 /* trigger the dma engine. ena_com_write_sq_doorbell()
348 * has a mb
349 */
350 ena_com_write_sq_doorbell(xdp_ring->ena_com_io_sq);
351 u64_stats_update_begin(&xdp_ring->syncp);
352 xdp_ring->tx_stats.doorbells++;
353 u64_stats_update_end(&xdp_ring->syncp);
354
355 return NETDEV_TX_OK;
356
357 error_unmap_dma:
358 ena_unmap_tx_buff(xdp_ring, tx_info);
359 tx_info->xdpf = NULL;
360 error_drop_packet:
361
362 return NETDEV_TX_OK;
363 }
364
365 static int ena_xdp_execute(struct ena_ring *rx_ring,
366 struct xdp_buff *xdp,
367 struct ena_rx_buffer *rx_info)
368 {
369 struct bpf_prog *xdp_prog;
370 u32 verdict = XDP_PASS;
371
372 rcu_read_lock();
373 xdp_prog = READ_ONCE(rx_ring->xdp_bpf_prog);
374
375 if (!xdp_prog)
376 goto out;
377
378 verdict = bpf_prog_run_xdp(xdp_prog, xdp);
379
380 if (verdict == XDP_TX)
381 ena_xdp_xmit_buff(rx_ring->netdev,
382 xdp,
383 rx_ring->qid + rx_ring->adapter->num_io_queues,
384 rx_info);
385 else if (unlikely(verdict == XDP_ABORTED))
386 trace_xdp_exception(rx_ring->netdev, xdp_prog, verdict);
387 else if (unlikely(verdict > XDP_TX))
388 bpf_warn_invalid_xdp_action(verdict);
389 out:
390 rcu_read_unlock();
391 return verdict;
392 }
393
394 static void ena_init_all_xdp_queues(struct ena_adapter *adapter)
395 {
396 adapter->xdp_first_ring = adapter->num_io_queues;
397 adapter->xdp_num_queues = adapter->num_io_queues;
398
399 ena_init_io_rings(adapter,
400 adapter->xdp_first_ring,
401 adapter->xdp_num_queues);
402 }
403
404 static int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter)
405 {
406 int rc = 0;
407
408 rc = ena_setup_tx_resources_in_range(adapter, adapter->xdp_first_ring,
409 adapter->xdp_num_queues);
410 if (rc)
411 goto setup_err;
412
413 rc = ena_create_io_tx_queues_in_range(adapter,
414 adapter->xdp_first_ring,
415 adapter->xdp_num_queues);
416 if (rc)
417 goto create_err;
418
419 return 0;
420
421 create_err:
422 ena_free_all_io_tx_resources(adapter);
423 setup_err:
424 return rc;
425 }
426
427 /* Provides a way for both kernel and bpf-prog to know
428 * more about the RX-queue a given XDP frame arrived on.
429 */
430 static int ena_xdp_register_rxq_info(struct ena_ring *rx_ring)
431 {
432 int rc;
433
434 rc = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev, rx_ring->qid);
435
436 if (rc) {
437 netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
438 "Failed to register xdp rx queue info. RX queue num %d rc: %d\n",
439 rx_ring->qid, rc);
440 goto err;
441 }
442
443 rc = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, MEM_TYPE_PAGE_SHARED,
444 NULL);
445
446 if (rc) {
447 netif_err(rx_ring->adapter, ifup, rx_ring->netdev,
448 "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n",
449 rx_ring->qid, rc);
450 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
451 }
452
453 err:
454 return rc;
455 }
456
457 static void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring)
458 {
459 xdp_rxq_info_unreg_mem_model(&rx_ring->xdp_rxq);
460 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
461 }
462
463 void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter,
464 struct bpf_prog *prog,
465 int first,
466 int count)
467 {
468 struct ena_ring *rx_ring;
469 int i = 0;
470
471 for (i = first; i < count; i++) {
472 rx_ring = &adapter->rx_ring[i];
473 xchg(&rx_ring->xdp_bpf_prog, prog);
474 if (prog) {
475 ena_xdp_register_rxq_info(rx_ring);
476 rx_ring->rx_headroom = XDP_PACKET_HEADROOM;
477 } else {
478 ena_xdp_unregister_rxq_info(rx_ring);
479 rx_ring->rx_headroom = 0;
480 }
481 }
482 }
483
484 void ena_xdp_exchange_program(struct ena_adapter *adapter,
485 struct bpf_prog *prog)
486 {
487 struct bpf_prog *old_bpf_prog = xchg(&adapter->xdp_bpf_prog, prog);
488
489 ena_xdp_exchange_program_rx_in_range(adapter,
490 prog,
491 0,
492 adapter->num_io_queues);
493
494 if (old_bpf_prog)
495 bpf_prog_put(old_bpf_prog);
496 }
497
498 static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter)
499 {
500 bool was_up;
501 int rc;
502
503 was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
504
505 if (was_up)
506 ena_down(adapter);
507
508 adapter->xdp_first_ring = 0;
509 adapter->xdp_num_queues = 0;
510 ena_xdp_exchange_program(adapter, NULL);
511 if (was_up) {
512 rc = ena_up(adapter);
513 if (rc)
514 return rc;
515 }
516 return 0;
517 }
518
519 static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf)
520 {
521 struct ena_adapter *adapter = netdev_priv(netdev);
522 struct bpf_prog *prog = bpf->prog;
523 struct bpf_prog *old_bpf_prog;
524 int rc, prev_mtu;
525 bool is_up;
526
527 is_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
528 rc = ena_xdp_allowed(adapter);
529 if (rc == ENA_XDP_ALLOWED) {
530 old_bpf_prog = adapter->xdp_bpf_prog;
531 if (prog) {
532 if (!is_up) {
533 ena_init_all_xdp_queues(adapter);
534 } else if (!old_bpf_prog) {
535 ena_down(adapter);
536 ena_init_all_xdp_queues(adapter);
537 }
538 ena_xdp_exchange_program(adapter, prog);
539
540 if (is_up && !old_bpf_prog) {
541 rc = ena_up(adapter);
542 if (rc)
543 return rc;
544 }
545 } else if (old_bpf_prog) {
546 rc = ena_destroy_and_free_all_xdp_queues(adapter);
547 if (rc)
548 return rc;
549 }
550
551 prev_mtu = netdev->max_mtu;
552 netdev->max_mtu = prog ? ENA_XDP_MAX_MTU : adapter->max_mtu;
553
554 if (!old_bpf_prog)
555 netif_info(adapter, drv, adapter->netdev,
556 "xdp program set, changing the max_mtu from %d to %d",
557 prev_mtu, netdev->max_mtu);
558
559 } else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) {
560 netif_err(adapter, drv, adapter->netdev,
561 "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on",
562 netdev->mtu, ENA_XDP_MAX_MTU);
563 NL_SET_ERR_MSG_MOD(bpf->extack,
564 "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info");
565 return -EINVAL;
566 } else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) {
567 netif_err(adapter, drv, adapter->netdev,
568 "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n",
569 adapter->num_io_queues, adapter->max_num_io_queues);
570 NL_SET_ERR_MSG_MOD(bpf->extack,
571 "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info");
572 return -EINVAL;
573 }
574
575 return 0;
576 }
577
578 /* This is the main xdp callback, it's used by the kernel to set/unset the xdp
579 * program as well as to query the current xdp program id.
580 */
581 static int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf)
582 {
583 struct ena_adapter *adapter = netdev_priv(netdev);
584
585 switch (bpf->command) {
586 case XDP_SETUP_PROG:
587 return ena_xdp_set(netdev, bpf);
588 case XDP_QUERY_PROG:
589 bpf->prog_id = adapter->xdp_bpf_prog ?
590 adapter->xdp_bpf_prog->aux->id : 0;
591 break;
592 default:
593 return -EINVAL;
594 }
595 return 0;
596 }
597
598 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
599 {
600 #ifdef CONFIG_RFS_ACCEL
601 u32 i;
602 int rc;
603
604 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues);
605 if (!adapter->netdev->rx_cpu_rmap)
606 return -ENOMEM;
607 for (i = 0; i < adapter->num_io_queues; i++) {
608 int irq_idx = ENA_IO_IRQ_IDX(i);
609
610 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
611 pci_irq_vector(adapter->pdev, irq_idx));
612 if (rc) {
613 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
614 adapter->netdev->rx_cpu_rmap = NULL;
615 return rc;
616 }
617 }
618 #endif /* CONFIG_RFS_ACCEL */
619 return 0;
620 }
621
622 static void ena_init_io_rings_common(struct ena_adapter *adapter,
623 struct ena_ring *ring, u16 qid)
624 {
625 ring->qid = qid;
626 ring->pdev = adapter->pdev;
627 ring->dev = &adapter->pdev->dev;
628 ring->netdev = adapter->netdev;
629 ring->napi = &adapter->ena_napi[qid].napi;
630 ring->adapter = adapter;
631 ring->ena_dev = adapter->ena_dev;
632 ring->per_napi_packets = 0;
633 ring->cpu = 0;
634 ring->first_interrupt = false;
635 ring->no_interrupt_event_cnt = 0;
636 u64_stats_init(&ring->syncp);
637 }
638
639 static void ena_init_io_rings(struct ena_adapter *adapter,
640 int first_index, int count)
641 {
642 struct ena_com_dev *ena_dev;
643 struct ena_ring *txr, *rxr;
644 int i;
645
646 ena_dev = adapter->ena_dev;
647
648 for (i = first_index; i < first_index + count; i++) {
649 txr = &adapter->tx_ring[i];
650 rxr = &adapter->rx_ring[i];
651
652 /* TX common ring state */
653 ena_init_io_rings_common(adapter, txr, i);
654
655 /* TX specific ring state */
656 txr->ring_size = adapter->requested_tx_ring_size;
657 txr->tx_max_header_size = ena_dev->tx_max_header_size;
658 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
659 txr->sgl_size = adapter->max_tx_sgl_size;
660 txr->smoothed_interval =
661 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
662
663 /* Don't init RX queues for xdp queues */
664 if (!ENA_IS_XDP_INDEX(adapter, i)) {
665 /* RX common ring state */
666 ena_init_io_rings_common(adapter, rxr, i);
667
668 /* RX specific ring state */
669 rxr->ring_size = adapter->requested_rx_ring_size;
670 rxr->rx_copybreak = adapter->rx_copybreak;
671 rxr->sgl_size = adapter->max_rx_sgl_size;
672 rxr->smoothed_interval =
673 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
674 rxr->empty_rx_queue = 0;
675 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
676 }
677 }
678 }
679
680 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
681 * @adapter: network interface device structure
682 * @qid: queue index
683 *
684 * Return 0 on success, negative on failure
685 */
686 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
687 {
688 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
689 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
690 int size, i, node;
691
692 if (tx_ring->tx_buffer_info) {
693 netif_err(adapter, ifup,
694 adapter->netdev, "tx_buffer_info info is not NULL");
695 return -EEXIST;
696 }
697
698 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
699 node = cpu_to_node(ena_irq->cpu);
700
701 tx_ring->tx_buffer_info = vzalloc_node(size, node);
702 if (!tx_ring->tx_buffer_info) {
703 tx_ring->tx_buffer_info = vzalloc(size);
704 if (!tx_ring->tx_buffer_info)
705 goto err_tx_buffer_info;
706 }
707
708 size = sizeof(u16) * tx_ring->ring_size;
709 tx_ring->free_ids = vzalloc_node(size, node);
710 if (!tx_ring->free_ids) {
711 tx_ring->free_ids = vzalloc(size);
712 if (!tx_ring->free_ids)
713 goto err_tx_free_ids;
714 }
715
716 size = tx_ring->tx_max_header_size;
717 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
718 if (!tx_ring->push_buf_intermediate_buf) {
719 tx_ring->push_buf_intermediate_buf = vzalloc(size);
720 if (!tx_ring->push_buf_intermediate_buf)
721 goto err_push_buf_intermediate_buf;
722 }
723
724 /* Req id ring for TX out of order completions */
725 for (i = 0; i < tx_ring->ring_size; i++)
726 tx_ring->free_ids[i] = i;
727
728 /* Reset tx statistics */
729 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
730
731 tx_ring->next_to_use = 0;
732 tx_ring->next_to_clean = 0;
733 tx_ring->cpu = ena_irq->cpu;
734 return 0;
735
736 err_push_buf_intermediate_buf:
737 vfree(tx_ring->free_ids);
738 tx_ring->free_ids = NULL;
739 err_tx_free_ids:
740 vfree(tx_ring->tx_buffer_info);
741 tx_ring->tx_buffer_info = NULL;
742 err_tx_buffer_info:
743 return -ENOMEM;
744 }
745
746 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
747 * @adapter: network interface device structure
748 * @qid: queue index
749 *
750 * Free all transmit software resources
751 */
752 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
753 {
754 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
755
756 vfree(tx_ring->tx_buffer_info);
757 tx_ring->tx_buffer_info = NULL;
758
759 vfree(tx_ring->free_ids);
760 tx_ring->free_ids = NULL;
761
762 vfree(tx_ring->push_buf_intermediate_buf);
763 tx_ring->push_buf_intermediate_buf = NULL;
764 }
765
766 static int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
767 int first_index,
768 int count)
769 {
770 int i, rc = 0;
771
772 for (i = first_index; i < first_index + count; i++) {
773 rc = ena_setup_tx_resources(adapter, i);
774 if (rc)
775 goto err_setup_tx;
776 }
777
778 return 0;
779
780 err_setup_tx:
781
782 netif_err(adapter, ifup, adapter->netdev,
783 "Tx queue %d: allocation failed\n", i);
784
785 /* rewind the index freeing the rings as we go */
786 while (first_index < i--)
787 ena_free_tx_resources(adapter, i);
788 return rc;
789 }
790
791 static void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter,
792 int first_index, int count)
793 {
794 int i;
795
796 for (i = first_index; i < first_index + count; i++)
797 ena_free_tx_resources(adapter, i);
798 }
799
800 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
801 * @adapter: board private structure
802 *
803 * Free all transmit software resources
804 */
805 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
806 {
807 ena_free_all_io_tx_resources_in_range(adapter,
808 0,
809 adapter->xdp_num_queues +
810 adapter->num_io_queues);
811 }
812
813 static int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id)
814 {
815 if (likely(req_id < rx_ring->ring_size))
816 return 0;
817
818 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
819 "Invalid rx req_id: %hu\n", req_id);
820
821 u64_stats_update_begin(&rx_ring->syncp);
822 rx_ring->rx_stats.bad_req_id++;
823 u64_stats_update_end(&rx_ring->syncp);
824
825 /* Trigger device reset */
826 rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
827 set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags);
828 return -EFAULT;
829 }
830
831 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
832 * @adapter: network interface device structure
833 * @qid: queue index
834 *
835 * Returns 0 on success, negative on failure
836 */
837 static int ena_setup_rx_resources(struct ena_adapter *adapter,
838 u32 qid)
839 {
840 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
841 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
842 int size, node, i;
843
844 if (rx_ring->rx_buffer_info) {
845 netif_err(adapter, ifup, adapter->netdev,
846 "rx_buffer_info is not NULL");
847 return -EEXIST;
848 }
849
850 /* alloc extra element so in rx path
851 * we can always prefetch rx_info + 1
852 */
853 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
854 node = cpu_to_node(ena_irq->cpu);
855
856 rx_ring->rx_buffer_info = vzalloc_node(size, node);
857 if (!rx_ring->rx_buffer_info) {
858 rx_ring->rx_buffer_info = vzalloc(size);
859 if (!rx_ring->rx_buffer_info)
860 return -ENOMEM;
861 }
862
863 size = sizeof(u16) * rx_ring->ring_size;
864 rx_ring->free_ids = vzalloc_node(size, node);
865 if (!rx_ring->free_ids) {
866 rx_ring->free_ids = vzalloc(size);
867 if (!rx_ring->free_ids) {
868 vfree(rx_ring->rx_buffer_info);
869 rx_ring->rx_buffer_info = NULL;
870 return -ENOMEM;
871 }
872 }
873
874 /* Req id ring for receiving RX pkts out of order */
875 for (i = 0; i < rx_ring->ring_size; i++)
876 rx_ring->free_ids[i] = i;
877
878 /* Reset rx statistics */
879 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
880
881 rx_ring->next_to_clean = 0;
882 rx_ring->next_to_use = 0;
883 rx_ring->cpu = ena_irq->cpu;
884
885 return 0;
886 }
887
888 /* ena_free_rx_resources - Free I/O Rx Resources
889 * @adapter: network interface device structure
890 * @qid: queue index
891 *
892 * Free all receive software resources
893 */
894 static void ena_free_rx_resources(struct ena_adapter *adapter,
895 u32 qid)
896 {
897 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
898
899 vfree(rx_ring->rx_buffer_info);
900 rx_ring->rx_buffer_info = NULL;
901
902 vfree(rx_ring->free_ids);
903 rx_ring->free_ids = NULL;
904 }
905
906 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
907 * @adapter: board private structure
908 *
909 * Return 0 on success, negative on failure
910 */
911 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
912 {
913 int i, rc = 0;
914
915 for (i = 0; i < adapter->num_io_queues; i++) {
916 rc = ena_setup_rx_resources(adapter, i);
917 if (rc)
918 goto err_setup_rx;
919 }
920
921 return 0;
922
923 err_setup_rx:
924
925 netif_err(adapter, ifup, adapter->netdev,
926 "Rx queue %d: allocation failed\n", i);
927
928 /* rewind the index freeing the rings as we go */
929 while (i--)
930 ena_free_rx_resources(adapter, i);
931 return rc;
932 }
933
934 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
935 * @adapter: board private structure
936 *
937 * Free all receive software resources
938 */
939 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
940 {
941 int i;
942
943 for (i = 0; i < adapter->num_io_queues; i++)
944 ena_free_rx_resources(adapter, i);
945 }
946
947 static int ena_alloc_rx_page(struct ena_ring *rx_ring,
948 struct ena_rx_buffer *rx_info, gfp_t gfp)
949 {
950 struct ena_com_buf *ena_buf;
951 struct page *page;
952 dma_addr_t dma;
953
954 /* if previous allocated page is not used */
955 if (unlikely(rx_info->page))
956 return 0;
957
958 page = alloc_page(gfp);
959 if (unlikely(!page)) {
960 u64_stats_update_begin(&rx_ring->syncp);
961 rx_ring->rx_stats.page_alloc_fail++;
962 u64_stats_update_end(&rx_ring->syncp);
963 return -ENOMEM;
964 }
965
966 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
967 DMA_FROM_DEVICE);
968 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
969 u64_stats_update_begin(&rx_ring->syncp);
970 rx_ring->rx_stats.dma_mapping_err++;
971 u64_stats_update_end(&rx_ring->syncp);
972
973 __free_page(page);
974 return -EIO;
975 }
976 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
977 "alloc page %p, rx_info %p\n", page, rx_info);
978
979 rx_info->page = page;
980 rx_info->page_offset = 0;
981 ena_buf = &rx_info->ena_buf;
982 ena_buf->paddr = dma + rx_ring->rx_headroom;
983 ena_buf->len = ENA_PAGE_SIZE - rx_ring->rx_headroom;
984
985 return 0;
986 }
987
988 static void ena_free_rx_page(struct ena_ring *rx_ring,
989 struct ena_rx_buffer *rx_info)
990 {
991 struct page *page = rx_info->page;
992 struct ena_com_buf *ena_buf = &rx_info->ena_buf;
993
994 if (unlikely(!page)) {
995 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
996 "Trying to free unallocated buffer\n");
997 return;
998 }
999
1000 dma_unmap_page(rx_ring->dev,
1001 ena_buf->paddr - rx_ring->rx_headroom,
1002 ENA_PAGE_SIZE,
1003 DMA_FROM_DEVICE);
1004
1005 __free_page(page);
1006 rx_info->page = NULL;
1007 }
1008
1009 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
1010 {
1011 u16 next_to_use, req_id;
1012 u32 i;
1013 int rc;
1014
1015 next_to_use = rx_ring->next_to_use;
1016
1017 for (i = 0; i < num; i++) {
1018 struct ena_rx_buffer *rx_info;
1019
1020 req_id = rx_ring->free_ids[next_to_use];
1021 rc = validate_rx_req_id(rx_ring, req_id);
1022 if (unlikely(rc < 0))
1023 break;
1024
1025 rx_info = &rx_ring->rx_buffer_info[req_id];
1026
1027
1028 rc = ena_alloc_rx_page(rx_ring, rx_info,
1029 GFP_ATOMIC | __GFP_COMP);
1030 if (unlikely(rc < 0)) {
1031 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
1032 "failed to alloc buffer for rx queue %d\n",
1033 rx_ring->qid);
1034 break;
1035 }
1036 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
1037 &rx_info->ena_buf,
1038 req_id);
1039 if (unlikely(rc)) {
1040 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1041 "failed to add buffer for rx queue %d\n",
1042 rx_ring->qid);
1043 break;
1044 }
1045 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
1046 rx_ring->ring_size);
1047 }
1048
1049 if (unlikely(i < num)) {
1050 u64_stats_update_begin(&rx_ring->syncp);
1051 rx_ring->rx_stats.refil_partial++;
1052 u64_stats_update_end(&rx_ring->syncp);
1053 netdev_warn(rx_ring->netdev,
1054 "refilled rx qid %d with only %d buffers (from %d)\n",
1055 rx_ring->qid, i, num);
1056 }
1057
1058 /* ena_com_write_sq_doorbell issues a wmb() */
1059 if (likely(i))
1060 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
1061
1062 rx_ring->next_to_use = next_to_use;
1063
1064 return i;
1065 }
1066
1067 static void ena_free_rx_bufs(struct ena_adapter *adapter,
1068 u32 qid)
1069 {
1070 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
1071 u32 i;
1072
1073 for (i = 0; i < rx_ring->ring_size; i++) {
1074 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
1075
1076 if (rx_info->page)
1077 ena_free_rx_page(rx_ring, rx_info);
1078 }
1079 }
1080
1081 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
1082 * @adapter: board private structure
1083 */
1084 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
1085 {
1086 struct ena_ring *rx_ring;
1087 int i, rc, bufs_num;
1088
1089 for (i = 0; i < adapter->num_io_queues; i++) {
1090 rx_ring = &adapter->rx_ring[i];
1091 bufs_num = rx_ring->ring_size - 1;
1092 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
1093
1094 if (unlikely(rc != bufs_num))
1095 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
1096 "refilling Queue %d failed. allocated %d buffers from: %d\n",
1097 i, rc, bufs_num);
1098 }
1099 }
1100
1101 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
1102 {
1103 int i;
1104
1105 for (i = 0; i < adapter->num_io_queues; i++)
1106 ena_free_rx_bufs(adapter, i);
1107 }
1108
1109 static void ena_unmap_tx_buff(struct ena_ring *tx_ring,
1110 struct ena_tx_buffer *tx_info)
1111 {
1112 struct ena_com_buf *ena_buf;
1113 u32 cnt;
1114 int i;
1115
1116 ena_buf = tx_info->bufs;
1117 cnt = tx_info->num_of_bufs;
1118
1119 if (unlikely(!cnt))
1120 return;
1121
1122 if (tx_info->map_linear_data) {
1123 dma_unmap_single(tx_ring->dev,
1124 dma_unmap_addr(ena_buf, paddr),
1125 dma_unmap_len(ena_buf, len),
1126 DMA_TO_DEVICE);
1127 ena_buf++;
1128 cnt--;
1129 }
1130
1131 /* unmap remaining mapped pages */
1132 for (i = 0; i < cnt; i++) {
1133 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
1134 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
1135 ena_buf++;
1136 }
1137 }
1138
1139 /* ena_free_tx_bufs - Free Tx Buffers per Queue
1140 * @tx_ring: TX ring for which buffers be freed
1141 */
1142 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
1143 {
1144 bool print_once = true;
1145 u32 i;
1146
1147 for (i = 0; i < tx_ring->ring_size; i++) {
1148 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
1149
1150 if (!tx_info->skb)
1151 continue;
1152
1153 if (print_once) {
1154 netdev_notice(tx_ring->netdev,
1155 "free uncompleted tx skb qid %d idx 0x%x\n",
1156 tx_ring->qid, i);
1157 print_once = false;
1158 } else {
1159 netdev_dbg(tx_ring->netdev,
1160 "free uncompleted tx skb qid %d idx 0x%x\n",
1161 tx_ring->qid, i);
1162 }
1163
1164 ena_unmap_tx_buff(tx_ring, tx_info);
1165
1166 dev_kfree_skb_any(tx_info->skb);
1167 }
1168 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
1169 tx_ring->qid));
1170 }
1171
1172 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
1173 {
1174 struct ena_ring *tx_ring;
1175 int i;
1176
1177 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1178 tx_ring = &adapter->tx_ring[i];
1179 ena_free_tx_bufs(tx_ring);
1180 }
1181 }
1182
1183 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
1184 {
1185 u16 ena_qid;
1186 int i;
1187
1188 for (i = 0; i < adapter->num_io_queues + adapter->xdp_num_queues; i++) {
1189 ena_qid = ENA_IO_TXQ_IDX(i);
1190 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1191 }
1192 }
1193
1194 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
1195 {
1196 u16 ena_qid;
1197 int i;
1198
1199 for (i = 0; i < adapter->num_io_queues; i++) {
1200 ena_qid = ENA_IO_RXQ_IDX(i);
1201 cancel_work_sync(&adapter->ena_napi[i].dim.work);
1202 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
1203 }
1204 }
1205
1206 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
1207 {
1208 ena_destroy_all_tx_queues(adapter);
1209 ena_destroy_all_rx_queues(adapter);
1210 }
1211
1212 static int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,
1213 struct ena_tx_buffer *tx_info, bool is_xdp)
1214 {
1215 if (tx_info)
1216 netif_err(ring->adapter,
1217 tx_done,
1218 ring->netdev,
1219 "tx_info doesn't have valid %s",
1220 is_xdp ? "xdp frame" : "skb");
1221 else
1222 netif_err(ring->adapter,
1223 tx_done,
1224 ring->netdev,
1225 "Invalid req_id: %hu\n",
1226 req_id);
1227
1228 u64_stats_update_begin(&ring->syncp);
1229 ring->tx_stats.bad_req_id++;
1230 u64_stats_update_end(&ring->syncp);
1231
1232 /* Trigger device reset */
1233 ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
1234 set_bit(ENA_FLAG_TRIGGER_RESET, &ring->adapter->flags);
1235 return -EFAULT;
1236 }
1237
1238 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
1239 {
1240 struct ena_tx_buffer *tx_info = NULL;
1241
1242 if (likely(req_id < tx_ring->ring_size)) {
1243 tx_info = &tx_ring->tx_buffer_info[req_id];
1244 if (likely(tx_info->skb))
1245 return 0;
1246 }
1247
1248 return handle_invalid_req_id(tx_ring, req_id, tx_info, false);
1249 }
1250
1251 static int validate_xdp_req_id(struct ena_ring *xdp_ring, u16 req_id)
1252 {
1253 struct ena_tx_buffer *tx_info = NULL;
1254
1255 if (likely(req_id < xdp_ring->ring_size)) {
1256 tx_info = &xdp_ring->tx_buffer_info[req_id];
1257 if (likely(tx_info->xdpf))
1258 return 0;
1259 }
1260
1261 return handle_invalid_req_id(xdp_ring, req_id, tx_info, true);
1262 }
1263
1264 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
1265 {
1266 struct netdev_queue *txq;
1267 bool above_thresh;
1268 u32 tx_bytes = 0;
1269 u32 total_done = 0;
1270 u16 next_to_clean;
1271 u16 req_id;
1272 int tx_pkts = 0;
1273 int rc;
1274
1275 next_to_clean = tx_ring->next_to_clean;
1276 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
1277
1278 while (tx_pkts < budget) {
1279 struct ena_tx_buffer *tx_info;
1280 struct sk_buff *skb;
1281
1282 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
1283 &req_id);
1284 if (rc)
1285 break;
1286
1287 rc = validate_tx_req_id(tx_ring, req_id);
1288 if (rc)
1289 break;
1290
1291 tx_info = &tx_ring->tx_buffer_info[req_id];
1292 skb = tx_info->skb;
1293
1294 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
1295 prefetch(&skb->end);
1296
1297 tx_info->skb = NULL;
1298 tx_info->last_jiffies = 0;
1299
1300 ena_unmap_tx_buff(tx_ring, tx_info);
1301
1302 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1303 "tx_poll: q %d skb %p completed\n", tx_ring->qid,
1304 skb);
1305
1306 tx_bytes += skb->len;
1307 dev_kfree_skb(skb);
1308 tx_pkts++;
1309 total_done += tx_info->tx_descs;
1310
1311 tx_ring->free_ids[next_to_clean] = req_id;
1312 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1313 tx_ring->ring_size);
1314 }
1315
1316 tx_ring->next_to_clean = next_to_clean;
1317 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
1318 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
1319
1320 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
1321
1322 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
1323 "tx_poll: q %d done. total pkts: %d\n",
1324 tx_ring->qid, tx_pkts);
1325
1326 /* need to make the rings circular update visible to
1327 * ena_start_xmit() before checking for netif_queue_stopped().
1328 */
1329 smp_mb();
1330
1331 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1332 ENA_TX_WAKEUP_THRESH);
1333 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
1334 __netif_tx_lock(txq, smp_processor_id());
1335 above_thresh =
1336 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
1337 ENA_TX_WAKEUP_THRESH);
1338 if (netif_tx_queue_stopped(txq) && above_thresh &&
1339 test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) {
1340 netif_tx_wake_queue(txq);
1341 u64_stats_update_begin(&tx_ring->syncp);
1342 tx_ring->tx_stats.queue_wakeup++;
1343 u64_stats_update_end(&tx_ring->syncp);
1344 }
1345 __netif_tx_unlock(txq);
1346 }
1347
1348 return tx_pkts;
1349 }
1350
1351 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags)
1352 {
1353 struct sk_buff *skb;
1354
1355 if (frags)
1356 skb = napi_get_frags(rx_ring->napi);
1357 else
1358 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1359 rx_ring->rx_copybreak);
1360
1361 if (unlikely(!skb)) {
1362 u64_stats_update_begin(&rx_ring->syncp);
1363 rx_ring->rx_stats.skb_alloc_fail++;
1364 u64_stats_update_end(&rx_ring->syncp);
1365 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1366 "Failed to allocate skb. frags: %d\n", frags);
1367 return NULL;
1368 }
1369
1370 return skb;
1371 }
1372
1373 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
1374 struct ena_com_rx_buf_info *ena_bufs,
1375 u32 descs,
1376 u16 *next_to_clean)
1377 {
1378 struct sk_buff *skb;
1379 struct ena_rx_buffer *rx_info;
1380 u16 len, req_id, buf = 0;
1381 void *va;
1382
1383 len = ena_bufs[buf].len;
1384 req_id = ena_bufs[buf].req_id;
1385 rx_info = &rx_ring->rx_buffer_info[req_id];
1386
1387 if (unlikely(!rx_info->page)) {
1388 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
1389 "Page is NULL\n");
1390 return NULL;
1391 }
1392
1393 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1394 "rx_info %p page %p\n",
1395 rx_info, rx_info->page);
1396
1397 /* save virt address of first buffer */
1398 va = page_address(rx_info->page) + rx_info->page_offset;
1399 prefetch(va + NET_IP_ALIGN);
1400
1401 if (len <= rx_ring->rx_copybreak) {
1402 skb = ena_alloc_skb(rx_ring, false);
1403 if (unlikely(!skb))
1404 return NULL;
1405
1406 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1407 "rx allocated small packet. len %d. data_len %d\n",
1408 skb->len, skb->data_len);
1409
1410 /* sync this buffer for CPU use */
1411 dma_sync_single_for_cpu(rx_ring->dev,
1412 dma_unmap_addr(&rx_info->ena_buf, paddr),
1413 len,
1414 DMA_FROM_DEVICE);
1415 skb_copy_to_linear_data(skb, va, len);
1416 dma_sync_single_for_device(rx_ring->dev,
1417 dma_unmap_addr(&rx_info->ena_buf, paddr),
1418 len,
1419 DMA_FROM_DEVICE);
1420
1421 skb_put(skb, len);
1422 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
1423 rx_ring->free_ids[*next_to_clean] = req_id;
1424 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
1425 rx_ring->ring_size);
1426 return skb;
1427 }
1428
1429 skb = ena_alloc_skb(rx_ring, true);
1430 if (unlikely(!skb))
1431 return NULL;
1432
1433 do {
1434 dma_unmap_page(rx_ring->dev,
1435 dma_unmap_addr(&rx_info->ena_buf, paddr),
1436 ENA_PAGE_SIZE, DMA_FROM_DEVICE);
1437
1438 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
1439 rx_info->page_offset, len, ENA_PAGE_SIZE);
1440
1441 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1442 "rx skb updated. len %d. data_len %d\n",
1443 skb->len, skb->data_len);
1444
1445 rx_info->page = NULL;
1446
1447 rx_ring->free_ids[*next_to_clean] = req_id;
1448 *next_to_clean =
1449 ENA_RX_RING_IDX_NEXT(*next_to_clean,
1450 rx_ring->ring_size);
1451 if (likely(--descs == 0))
1452 break;
1453
1454 buf++;
1455 len = ena_bufs[buf].len;
1456 req_id = ena_bufs[buf].req_id;
1457 rx_info = &rx_ring->rx_buffer_info[req_id];
1458 } while (1);
1459
1460 return skb;
1461 }
1462
1463 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
1464 * @adapter: structure containing adapter specific data
1465 * @ena_rx_ctx: received packet context/metadata
1466 * @skb: skb currently being received and modified
1467 */
1468 static void ena_rx_checksum(struct ena_ring *rx_ring,
1469 struct ena_com_rx_ctx *ena_rx_ctx,
1470 struct sk_buff *skb)
1471 {
1472 /* Rx csum disabled */
1473 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
1474 skb->ip_summed = CHECKSUM_NONE;
1475 return;
1476 }
1477
1478 /* For fragmented packets the checksum isn't valid */
1479 if (ena_rx_ctx->frag) {
1480 skb->ip_summed = CHECKSUM_NONE;
1481 return;
1482 }
1483
1484 /* if IP and error */
1485 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
1486 (ena_rx_ctx->l3_csum_err))) {
1487 /* ipv4 checksum error */
1488 skb->ip_summed = CHECKSUM_NONE;
1489 u64_stats_update_begin(&rx_ring->syncp);
1490 rx_ring->rx_stats.bad_csum++;
1491 u64_stats_update_end(&rx_ring->syncp);
1492 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1493 "RX IPv4 header checksum error\n");
1494 return;
1495 }
1496
1497 /* if TCP/UDP */
1498 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1499 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
1500 if (unlikely(ena_rx_ctx->l4_csum_err)) {
1501 /* TCP/UDP checksum error */
1502 u64_stats_update_begin(&rx_ring->syncp);
1503 rx_ring->rx_stats.bad_csum++;
1504 u64_stats_update_end(&rx_ring->syncp);
1505 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
1506 "RX L4 checksum error\n");
1507 skb->ip_summed = CHECKSUM_NONE;
1508 return;
1509 }
1510
1511 if (likely(ena_rx_ctx->l4_csum_checked)) {
1512 skb->ip_summed = CHECKSUM_UNNECESSARY;
1513 u64_stats_update_begin(&rx_ring->syncp);
1514 rx_ring->rx_stats.csum_good++;
1515 u64_stats_update_end(&rx_ring->syncp);
1516 } else {
1517 u64_stats_update_begin(&rx_ring->syncp);
1518 rx_ring->rx_stats.csum_unchecked++;
1519 u64_stats_update_end(&rx_ring->syncp);
1520 skb->ip_summed = CHECKSUM_NONE;
1521 }
1522 } else {
1523 skb->ip_summed = CHECKSUM_NONE;
1524 return;
1525 }
1526
1527 }
1528
1529 static void ena_set_rx_hash(struct ena_ring *rx_ring,
1530 struct ena_com_rx_ctx *ena_rx_ctx,
1531 struct sk_buff *skb)
1532 {
1533 enum pkt_hash_types hash_type;
1534
1535 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1536 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1537 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1538
1539 hash_type = PKT_HASH_TYPE_L4;
1540 else
1541 hash_type = PKT_HASH_TYPE_NONE;
1542
1543 /* Override hash type if the packet is fragmented */
1544 if (ena_rx_ctx->frag)
1545 hash_type = PKT_HASH_TYPE_NONE;
1546
1547 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1548 }
1549 }
1550
1551 int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp)
1552 {
1553 struct ena_rx_buffer *rx_info;
1554 int ret;
1555
1556 rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1557 xdp->data = page_address(rx_info->page) +
1558 rx_info->page_offset + rx_ring->rx_headroom;
1559 xdp_set_data_meta_invalid(xdp);
1560 xdp->data_hard_start = page_address(rx_info->page);
1561 xdp->data_end = xdp->data + rx_ring->ena_bufs[0].len;
1562 /* If for some reason we received a bigger packet than
1563 * we expect, then we simply drop it
1564 */
1565 if (unlikely(rx_ring->ena_bufs[0].len > ENA_XDP_MAX_MTU))
1566 return XDP_DROP;
1567
1568 ret = ena_xdp_execute(rx_ring, xdp, rx_info);
1569
1570 /* The xdp program might expand the headers */
1571 if (ret == XDP_PASS) {
1572 rx_info->page_offset = xdp->data - xdp->data_hard_start;
1573 rx_ring->ena_bufs[0].len = xdp->data_end - xdp->data;
1574 }
1575
1576 return ret;
1577 }
1578 /* ena_clean_rx_irq - Cleanup RX irq
1579 * @rx_ring: RX ring to clean
1580 * @napi: napi handler
1581 * @budget: how many packets driver is allowed to clean
1582 *
1583 * Returns the number of cleaned buffers.
1584 */
1585 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1586 u32 budget)
1587 {
1588 u16 next_to_clean = rx_ring->next_to_clean;
1589 struct ena_com_rx_ctx ena_rx_ctx;
1590 struct ena_adapter *adapter;
1591 u32 res_budget, work_done;
1592 int rx_copybreak_pkt = 0;
1593 int refill_threshold;
1594 struct sk_buff *skb;
1595 int refill_required;
1596 struct xdp_buff xdp;
1597 int total_len = 0;
1598 int xdp_verdict;
1599 int rc = 0;
1600 int i;
1601
1602 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1603 "%s qid %d\n", __func__, rx_ring->qid);
1604 res_budget = budget;
1605 xdp.rxq = &rx_ring->xdp_rxq;
1606
1607 do {
1608 xdp_verdict = XDP_PASS;
1609 skb = NULL;
1610 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1611 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1612 ena_rx_ctx.descs = 0;
1613 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1614 rx_ring->ena_com_io_sq,
1615 &ena_rx_ctx);
1616 if (unlikely(rc))
1617 goto error;
1618
1619 if (unlikely(ena_rx_ctx.descs == 0))
1620 break;
1621
1622 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1623 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1624 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1625 ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1626
1627 if (ena_xdp_present_ring(rx_ring))
1628 xdp_verdict = ena_xdp_handle_buff(rx_ring, &xdp);
1629
1630 /* allocate skb and fill it */
1631 if (xdp_verdict == XDP_PASS)
1632 skb = ena_rx_skb(rx_ring,
1633 rx_ring->ena_bufs,
1634 ena_rx_ctx.descs,
1635 &next_to_clean);
1636
1637 if (unlikely(!skb)) {
1638 if (xdp_verdict == XDP_TX) {
1639 ena_free_rx_page(rx_ring,
1640 &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id]);
1641 res_budget--;
1642 }
1643 for (i = 0; i < ena_rx_ctx.descs; i++) {
1644 rx_ring->free_ids[next_to_clean] =
1645 rx_ring->ena_bufs[i].req_id;
1646 next_to_clean =
1647 ENA_RX_RING_IDX_NEXT(next_to_clean,
1648 rx_ring->ring_size);
1649 }
1650 if (xdp_verdict == XDP_TX || xdp_verdict == XDP_DROP)
1651 continue;
1652 break;
1653 }
1654
1655 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1656
1657 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1658
1659 skb_record_rx_queue(skb, rx_ring->qid);
1660
1661 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1662 total_len += rx_ring->ena_bufs[0].len;
1663 rx_copybreak_pkt++;
1664 napi_gro_receive(napi, skb);
1665 } else {
1666 total_len += skb->len;
1667 napi_gro_frags(napi);
1668 }
1669
1670 res_budget--;
1671 } while (likely(res_budget));
1672
1673 work_done = budget - res_budget;
1674 rx_ring->per_napi_packets += work_done;
1675 u64_stats_update_begin(&rx_ring->syncp);
1676 rx_ring->rx_stats.bytes += total_len;
1677 rx_ring->rx_stats.cnt += work_done;
1678 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1679 u64_stats_update_end(&rx_ring->syncp);
1680
1681 rx_ring->next_to_clean = next_to_clean;
1682
1683 refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq);
1684 refill_threshold =
1685 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1686 ENA_RX_REFILL_THRESH_PACKET);
1687
1688 /* Optimization, try to batch new rx buffers */
1689 if (refill_required > refill_threshold) {
1690 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1691 ena_refill_rx_bufs(rx_ring, refill_required);
1692 }
1693
1694 return work_done;
1695
1696 error:
1697 adapter = netdev_priv(rx_ring->netdev);
1698
1699 u64_stats_update_begin(&rx_ring->syncp);
1700 rx_ring->rx_stats.bad_desc_num++;
1701 u64_stats_update_end(&rx_ring->syncp);
1702
1703 /* Too many desc from the device. Trigger reset */
1704 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1705 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1706
1707 return 0;
1708 }
1709
1710 static void ena_dim_work(struct work_struct *w)
1711 {
1712 struct dim *dim = container_of(w, struct dim, work);
1713 struct dim_cq_moder cur_moder =
1714 net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1715 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim);
1716
1717 ena_napi->rx_ring->smoothed_interval = cur_moder.usec;
1718 dim->state = DIM_START_MEASURE;
1719 }
1720
1721 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi)
1722 {
1723 struct dim_sample dim_sample;
1724 struct ena_ring *rx_ring = ena_napi->rx_ring;
1725
1726 if (!rx_ring->per_napi_packets)
1727 return;
1728
1729 rx_ring->non_empty_napi_events++;
1730
1731 dim_update_sample(rx_ring->non_empty_napi_events,
1732 rx_ring->rx_stats.cnt,
1733 rx_ring->rx_stats.bytes,
1734 &dim_sample);
1735
1736 net_dim(&ena_napi->dim, dim_sample);
1737
1738 rx_ring->per_napi_packets = 0;
1739 }
1740
1741 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
1742 struct ena_ring *rx_ring)
1743 {
1744 struct ena_eth_io_intr_reg intr_reg;
1745 u32 rx_interval = 0;
1746 /* Rx ring can be NULL when for XDP tx queues which don't have an
1747 * accompanying rx_ring pair.
1748 */
1749 if (rx_ring)
1750 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ?
1751 rx_ring->smoothed_interval :
1752 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev);
1753
1754 /* Update intr register: rx intr delay,
1755 * tx intr delay and interrupt unmask
1756 */
1757 ena_com_update_intr_reg(&intr_reg,
1758 rx_interval,
1759 tx_ring->smoothed_interval,
1760 true);
1761
1762 /* It is a shared MSI-X.
1763 * Tx and Rx CQ have pointer to it.
1764 * So we use one of them to reach the intr reg
1765 * The Tx ring is used because the rx_ring is NULL for XDP queues
1766 */
1767 ena_com_unmask_intr(tx_ring->ena_com_io_cq, &intr_reg);
1768 }
1769
1770 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1771 struct ena_ring *rx_ring)
1772 {
1773 int cpu = get_cpu();
1774 int numa_node;
1775
1776 /* Check only one ring since the 2 rings are running on the same cpu */
1777 if (likely(tx_ring->cpu == cpu))
1778 goto out;
1779
1780 numa_node = cpu_to_node(cpu);
1781 put_cpu();
1782
1783 if (numa_node != NUMA_NO_NODE) {
1784 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1785 if (rx_ring)
1786 ena_com_update_numa_node(rx_ring->ena_com_io_cq,
1787 numa_node);
1788 }
1789
1790 tx_ring->cpu = cpu;
1791 if (rx_ring)
1792 rx_ring->cpu = cpu;
1793
1794 return;
1795 out:
1796 put_cpu();
1797 }
1798
1799 static int ena_clean_xdp_irq(struct ena_ring *xdp_ring, u32 budget)
1800 {
1801 u32 total_done = 0;
1802 u16 next_to_clean;
1803 u32 tx_bytes = 0;
1804 int tx_pkts = 0;
1805 u16 req_id;
1806 int rc;
1807
1808 if (unlikely(!xdp_ring))
1809 return 0;
1810 next_to_clean = xdp_ring->next_to_clean;
1811
1812 while (tx_pkts < budget) {
1813 struct ena_tx_buffer *tx_info;
1814 struct xdp_frame *xdpf;
1815
1816 rc = ena_com_tx_comp_req_id_get(xdp_ring->ena_com_io_cq,
1817 &req_id);
1818 if (rc)
1819 break;
1820
1821 rc = validate_xdp_req_id(xdp_ring, req_id);
1822 if (rc)
1823 break;
1824
1825 tx_info = &xdp_ring->tx_buffer_info[req_id];
1826 xdpf = tx_info->xdpf;
1827
1828 tx_info->xdpf = NULL;
1829 tx_info->last_jiffies = 0;
1830 ena_unmap_tx_buff(xdp_ring, tx_info);
1831
1832 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1833 "tx_poll: q %d skb %p completed\n", xdp_ring->qid,
1834 xdpf);
1835
1836 tx_bytes += xdpf->len;
1837 tx_pkts++;
1838 total_done += tx_info->tx_descs;
1839
1840 __free_page(tx_info->xdp_rx_page);
1841 xdp_ring->free_ids[next_to_clean] = req_id;
1842 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
1843 xdp_ring->ring_size);
1844 }
1845
1846 xdp_ring->next_to_clean = next_to_clean;
1847 ena_com_comp_ack(xdp_ring->ena_com_io_sq, total_done);
1848 ena_com_update_dev_comp_head(xdp_ring->ena_com_io_cq);
1849
1850 netif_dbg(xdp_ring->adapter, tx_done, xdp_ring->netdev,
1851 "tx_poll: q %d done. total pkts: %d\n",
1852 xdp_ring->qid, tx_pkts);
1853
1854 return tx_pkts;
1855 }
1856
1857 static int ena_io_poll(struct napi_struct *napi, int budget)
1858 {
1859 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1860 struct ena_ring *tx_ring, *rx_ring;
1861 int tx_work_done;
1862 int rx_work_done = 0;
1863 int tx_budget;
1864 int napi_comp_call = 0;
1865 int ret;
1866
1867 tx_ring = ena_napi->tx_ring;
1868 rx_ring = ena_napi->rx_ring;
1869
1870 tx_ring->first_interrupt = ena_napi->first_interrupt;
1871 rx_ring->first_interrupt = ena_napi->first_interrupt;
1872
1873 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1874
1875 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1876 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1877 napi_complete_done(napi, 0);
1878 return 0;
1879 }
1880
1881 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1882 /* On netpoll the budget is zero and the handler should only clean the
1883 * tx completions.
1884 */
1885 if (likely(budget))
1886 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1887
1888 /* If the device is about to reset or down, avoid unmask
1889 * the interrupt and return 0 so NAPI won't reschedule
1890 */
1891 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1892 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1893 napi_complete_done(napi, 0);
1894 ret = 0;
1895
1896 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1897 napi_comp_call = 1;
1898
1899 /* Update numa and unmask the interrupt only when schedule
1900 * from the interrupt context (vs from sk_busy_loop)
1901 */
1902 if (napi_complete_done(napi, rx_work_done)) {
1903 /* We apply adaptive moderation on Rx path only.
1904 * Tx uses static interrupt moderation.
1905 */
1906 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1907 ena_adjust_adaptive_rx_intr_moderation(ena_napi);
1908
1909 ena_unmask_interrupt(tx_ring, rx_ring);
1910 }
1911
1912 ena_update_ring_numa_node(tx_ring, rx_ring);
1913
1914 ret = rx_work_done;
1915 } else {
1916 ret = budget;
1917 }
1918
1919 u64_stats_update_begin(&tx_ring->syncp);
1920 tx_ring->tx_stats.napi_comp += napi_comp_call;
1921 tx_ring->tx_stats.tx_poll++;
1922 u64_stats_update_end(&tx_ring->syncp);
1923
1924 return ret;
1925 }
1926
1927 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1928 {
1929 struct ena_adapter *adapter = (struct ena_adapter *)data;
1930
1931 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1932
1933 /* Don't call the aenq handler before probe is done */
1934 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1935 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1936
1937 return IRQ_HANDLED;
1938 }
1939
1940 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1941 * @irq: interrupt number
1942 * @data: pointer to a network interface private napi device structure
1943 */
1944 static irqreturn_t ena_intr_msix_io(int irq, void *data)
1945 {
1946 struct ena_napi *ena_napi = data;
1947
1948 ena_napi->first_interrupt = true;
1949
1950 napi_schedule_irqoff(&ena_napi->napi);
1951
1952 return IRQ_HANDLED;
1953 }
1954
1955 /* Reserve a single MSI-X vector for management (admin + aenq).
1956 * plus reserve one vector for each potential io queue.
1957 * the number of potential io queues is the minimum of what the device
1958 * supports and the number of vCPUs.
1959 */
1960 static int ena_enable_msix(struct ena_adapter *adapter)
1961 {
1962 int msix_vecs, irq_cnt;
1963
1964 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1965 netif_err(adapter, probe, adapter->netdev,
1966 "Error, MSI-X is already enabled\n");
1967 return -EPERM;
1968 }
1969
1970 /* Reserved the max msix vectors we might need */
1971 msix_vecs = ENA_MAX_MSIX_VEC(adapter->num_io_queues);
1972 netif_dbg(adapter, probe, adapter->netdev,
1973 "trying to enable MSI-X, vectors %d\n", msix_vecs);
1974
1975 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
1976 msix_vecs, PCI_IRQ_MSIX);
1977
1978 if (irq_cnt < 0) {
1979 netif_err(adapter, probe, adapter->netdev,
1980 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
1981 return -ENOSPC;
1982 }
1983
1984 if (irq_cnt != msix_vecs) {
1985 netif_notice(adapter, probe, adapter->netdev,
1986 "enable only %d MSI-X (out of %d), reduce the number of queues\n",
1987 irq_cnt, msix_vecs);
1988 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
1989 }
1990
1991 if (ena_init_rx_cpu_rmap(adapter))
1992 netif_warn(adapter, probe, adapter->netdev,
1993 "Failed to map IRQs to CPUs\n");
1994
1995 adapter->msix_vecs = irq_cnt;
1996 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
1997
1998 return 0;
1999 }
2000
2001 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
2002 {
2003 u32 cpu;
2004
2005 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
2006 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
2007 pci_name(adapter->pdev));
2008 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
2009 ena_intr_msix_mgmnt;
2010 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
2011 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
2012 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
2013 cpu = cpumask_first(cpu_online_mask);
2014 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
2015 cpumask_set_cpu(cpu,
2016 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
2017 }
2018
2019 static void ena_setup_io_intr(struct ena_adapter *adapter)
2020 {
2021 struct net_device *netdev;
2022 int irq_idx, i, cpu;
2023 int io_queue_count;
2024
2025 netdev = adapter->netdev;
2026 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2027
2028 for (i = 0; i < io_queue_count; i++) {
2029 irq_idx = ENA_IO_IRQ_IDX(i);
2030 cpu = i % num_online_cpus();
2031
2032 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
2033 "%s-Tx-Rx-%d", netdev->name, i);
2034 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
2035 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
2036 adapter->irq_tbl[irq_idx].vector =
2037 pci_irq_vector(adapter->pdev, irq_idx);
2038 adapter->irq_tbl[irq_idx].cpu = cpu;
2039
2040 cpumask_set_cpu(cpu,
2041 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
2042 }
2043 }
2044
2045 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
2046 {
2047 unsigned long flags = 0;
2048 struct ena_irq *irq;
2049 int rc;
2050
2051 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2052 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2053 irq->data);
2054 if (rc) {
2055 netif_err(adapter, probe, adapter->netdev,
2056 "failed to request admin irq\n");
2057 return rc;
2058 }
2059
2060 netif_dbg(adapter, probe, adapter->netdev,
2061 "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
2062 irq->affinity_hint_mask.bits[0], irq->vector);
2063
2064 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2065
2066 return rc;
2067 }
2068
2069 static int ena_request_io_irq(struct ena_adapter *adapter)
2070 {
2071 unsigned long flags = 0;
2072 struct ena_irq *irq;
2073 int rc = 0, i, k;
2074
2075 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
2076 netif_err(adapter, ifup, adapter->netdev,
2077 "Failed to request I/O IRQ: MSI-X is not enabled\n");
2078 return -EINVAL;
2079 }
2080
2081 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
2082 irq = &adapter->irq_tbl[i];
2083 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
2084 irq->data);
2085 if (rc) {
2086 netif_err(adapter, ifup, adapter->netdev,
2087 "Failed to request I/O IRQ. index %d rc %d\n",
2088 i, rc);
2089 goto err;
2090 }
2091
2092 netif_dbg(adapter, ifup, adapter->netdev,
2093 "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
2094 i, irq->affinity_hint_mask.bits[0], irq->vector);
2095
2096 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
2097 }
2098
2099 return rc;
2100
2101 err:
2102 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
2103 irq = &adapter->irq_tbl[k];
2104 free_irq(irq->vector, irq->data);
2105 }
2106
2107 return rc;
2108 }
2109
2110 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
2111 {
2112 struct ena_irq *irq;
2113
2114 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
2115 synchronize_irq(irq->vector);
2116 irq_set_affinity_hint(irq->vector, NULL);
2117 free_irq(irq->vector, irq->data);
2118 }
2119
2120 static void ena_free_io_irq(struct ena_adapter *adapter)
2121 {
2122 struct ena_irq *irq;
2123 int i;
2124
2125 #ifdef CONFIG_RFS_ACCEL
2126 if (adapter->msix_vecs >= 1) {
2127 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
2128 adapter->netdev->rx_cpu_rmap = NULL;
2129 }
2130 #endif /* CONFIG_RFS_ACCEL */
2131
2132 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
2133 irq = &adapter->irq_tbl[i];
2134 irq_set_affinity_hint(irq->vector, NULL);
2135 free_irq(irq->vector, irq->data);
2136 }
2137 }
2138
2139 static void ena_disable_msix(struct ena_adapter *adapter)
2140 {
2141 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
2142 pci_free_irq_vectors(adapter->pdev);
2143 }
2144
2145 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
2146 {
2147 int i;
2148
2149 if (!netif_running(adapter->netdev))
2150 return;
2151
2152 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++)
2153 synchronize_irq(adapter->irq_tbl[i].vector);
2154 }
2155
2156 static void ena_del_napi_in_range(struct ena_adapter *adapter,
2157 int first_index,
2158 int count)
2159 {
2160 int i;
2161
2162 for (i = first_index; i < first_index + count; i++) {
2163 /* Check if napi was initialized before */
2164 if (!ENA_IS_XDP_INDEX(adapter, i) ||
2165 adapter->ena_napi[i].xdp_ring)
2166 netif_napi_del(&adapter->ena_napi[i].napi);
2167 else
2168 WARN_ON(ENA_IS_XDP_INDEX(adapter, i) &&
2169 adapter->ena_napi[i].xdp_ring);
2170 }
2171 }
2172
2173 static void ena_init_napi_in_range(struct ena_adapter *adapter,
2174 int first_index, int count)
2175 {
2176 struct ena_napi *napi = {0};
2177 int i;
2178
2179 for (i = first_index; i < first_index + count; i++) {
2180 napi = &adapter->ena_napi[i];
2181
2182 netif_napi_add(adapter->netdev,
2183 &adapter->ena_napi[i].napi,
2184 ENA_IS_XDP_INDEX(adapter, i) ? ena_xdp_io_poll : ena_io_poll,
2185 ENA_NAPI_BUDGET);
2186
2187 if (!ENA_IS_XDP_INDEX(adapter, i)) {
2188 napi->rx_ring = &adapter->rx_ring[i];
2189 napi->tx_ring = &adapter->tx_ring[i];
2190 } else {
2191 napi->xdp_ring = &adapter->tx_ring[i];
2192 }
2193 napi->qid = i;
2194 }
2195 }
2196
2197 static void ena_napi_disable_in_range(struct ena_adapter *adapter,
2198 int first_index,
2199 int count)
2200 {
2201 int i;
2202
2203 for (i = first_index; i < first_index + count; i++)
2204 napi_disable(&adapter->ena_napi[i].napi);
2205 }
2206
2207 static void ena_napi_enable_in_range(struct ena_adapter *adapter,
2208 int first_index,
2209 int count)
2210 {
2211 int i;
2212
2213 for (i = first_index; i < first_index + count; i++)
2214 napi_enable(&adapter->ena_napi[i].napi);
2215 }
2216
2217 /* Configure the Rx forwarding */
2218 static int ena_rss_configure(struct ena_adapter *adapter)
2219 {
2220 struct ena_com_dev *ena_dev = adapter->ena_dev;
2221 int rc;
2222
2223 /* In case the RSS table wasn't initialized by probe */
2224 if (!ena_dev->rss.tbl_log_size) {
2225 rc = ena_rss_init_default(adapter);
2226 if (rc && (rc != -EOPNOTSUPP)) {
2227 netif_err(adapter, ifup, adapter->netdev,
2228 "Failed to init RSS rc: %d\n", rc);
2229 return rc;
2230 }
2231 }
2232
2233 /* Set indirect table */
2234 rc = ena_com_indirect_table_set(ena_dev);
2235 if (unlikely(rc && rc != -EOPNOTSUPP))
2236 return rc;
2237
2238 /* Configure hash function (if supported) */
2239 rc = ena_com_set_hash_function(ena_dev);
2240 if (unlikely(rc && (rc != -EOPNOTSUPP)))
2241 return rc;
2242
2243 /* Configure hash inputs (if supported) */
2244 rc = ena_com_set_hash_ctrl(ena_dev);
2245 if (unlikely(rc && (rc != -EOPNOTSUPP)))
2246 return rc;
2247
2248 return 0;
2249 }
2250
2251 static int ena_up_complete(struct ena_adapter *adapter)
2252 {
2253 int rc;
2254
2255 rc = ena_rss_configure(adapter);
2256 if (rc)
2257 return rc;
2258
2259 ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
2260
2261 ena_refill_all_rx_bufs(adapter);
2262
2263 /* enable transmits */
2264 netif_tx_start_all_queues(adapter->netdev);
2265
2266 ena_napi_enable_in_range(adapter,
2267 0,
2268 adapter->xdp_num_queues + adapter->num_io_queues);
2269
2270 return 0;
2271 }
2272
2273 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
2274 {
2275 struct ena_com_create_io_ctx ctx;
2276 struct ena_com_dev *ena_dev;
2277 struct ena_ring *tx_ring;
2278 u32 msix_vector;
2279 u16 ena_qid;
2280 int rc;
2281
2282 ena_dev = adapter->ena_dev;
2283
2284 tx_ring = &adapter->tx_ring[qid];
2285 msix_vector = ENA_IO_IRQ_IDX(qid);
2286 ena_qid = ENA_IO_TXQ_IDX(qid);
2287
2288 memset(&ctx, 0x0, sizeof(ctx));
2289
2290 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
2291 ctx.qid = ena_qid;
2292 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
2293 ctx.msix_vector = msix_vector;
2294 ctx.queue_size = tx_ring->ring_size;
2295 ctx.numa_node = cpu_to_node(tx_ring->cpu);
2296
2297 rc = ena_com_create_io_queue(ena_dev, &ctx);
2298 if (rc) {
2299 netif_err(adapter, ifup, adapter->netdev,
2300 "Failed to create I/O TX queue num %d rc: %d\n",
2301 qid, rc);
2302 return rc;
2303 }
2304
2305 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2306 &tx_ring->ena_com_io_sq,
2307 &tx_ring->ena_com_io_cq);
2308 if (rc) {
2309 netif_err(adapter, ifup, adapter->netdev,
2310 "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
2311 qid, rc);
2312 ena_com_destroy_io_queue(ena_dev, ena_qid);
2313 return rc;
2314 }
2315
2316 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
2317 return rc;
2318 }
2319
2320 static int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
2321 int first_index, int count)
2322 {
2323 struct ena_com_dev *ena_dev = adapter->ena_dev;
2324 int rc, i;
2325
2326 for (i = first_index; i < first_index + count; i++) {
2327 rc = ena_create_io_tx_queue(adapter, i);
2328 if (rc)
2329 goto create_err;
2330 }
2331
2332 return 0;
2333
2334 create_err:
2335 while (i-- > first_index)
2336 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
2337
2338 return rc;
2339 }
2340
2341 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
2342 {
2343 struct ena_com_dev *ena_dev;
2344 struct ena_com_create_io_ctx ctx;
2345 struct ena_ring *rx_ring;
2346 u32 msix_vector;
2347 u16 ena_qid;
2348 int rc;
2349
2350 ena_dev = adapter->ena_dev;
2351
2352 rx_ring = &adapter->rx_ring[qid];
2353 msix_vector = ENA_IO_IRQ_IDX(qid);
2354 ena_qid = ENA_IO_RXQ_IDX(qid);
2355
2356 memset(&ctx, 0x0, sizeof(ctx));
2357
2358 ctx.qid = ena_qid;
2359 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
2360 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2361 ctx.msix_vector = msix_vector;
2362 ctx.queue_size = rx_ring->ring_size;
2363 ctx.numa_node = cpu_to_node(rx_ring->cpu);
2364
2365 rc = ena_com_create_io_queue(ena_dev, &ctx);
2366 if (rc) {
2367 netif_err(adapter, ifup, adapter->netdev,
2368 "Failed to create I/O RX queue num %d rc: %d\n",
2369 qid, rc);
2370 return rc;
2371 }
2372
2373 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
2374 &rx_ring->ena_com_io_sq,
2375 &rx_ring->ena_com_io_cq);
2376 if (rc) {
2377 netif_err(adapter, ifup, adapter->netdev,
2378 "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
2379 qid, rc);
2380 goto err;
2381 }
2382
2383 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
2384
2385 return rc;
2386 err:
2387 ena_com_destroy_io_queue(ena_dev, ena_qid);
2388 return rc;
2389 }
2390
2391 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
2392 {
2393 struct ena_com_dev *ena_dev = adapter->ena_dev;
2394 int rc, i;
2395
2396 for (i = 0; i < adapter->num_io_queues; i++) {
2397 rc = ena_create_io_rx_queue(adapter, i);
2398 if (rc)
2399 goto create_err;
2400 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work);
2401 }
2402
2403 return 0;
2404
2405 create_err:
2406 while (i--) {
2407 cancel_work_sync(&adapter->ena_napi[i].dim.work);
2408 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
2409 }
2410
2411 return rc;
2412 }
2413
2414 static void set_io_rings_size(struct ena_adapter *adapter,
2415 int new_tx_size,
2416 int new_rx_size)
2417 {
2418 int i;
2419
2420 for (i = 0; i < adapter->num_io_queues; i++) {
2421 adapter->tx_ring[i].ring_size = new_tx_size;
2422 adapter->rx_ring[i].ring_size = new_rx_size;
2423 }
2424 }
2425
2426 /* This function allows queue allocation to backoff when the system is
2427 * low on memory. If there is not enough memory to allocate io queues
2428 * the driver will try to allocate smaller queues.
2429 *
2430 * The backoff algorithm is as follows:
2431 * 1. Try to allocate TX and RX and if successful.
2432 * 1.1. return success
2433 *
2434 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same).
2435 *
2436 * 3. If TX or RX is smaller than 256
2437 * 3.1. return failure.
2438 * 4. else
2439 * 4.1. go back to 1.
2440 */
2441 static int create_queues_with_size_backoff(struct ena_adapter *adapter)
2442 {
2443 int rc, cur_rx_ring_size, cur_tx_ring_size;
2444 int new_rx_ring_size, new_tx_ring_size;
2445
2446 /* current queue sizes might be set to smaller than the requested
2447 * ones due to past queue allocation failures.
2448 */
2449 set_io_rings_size(adapter, adapter->requested_tx_ring_size,
2450 adapter->requested_rx_ring_size);
2451
2452 while (1) {
2453 if (ena_xdp_present(adapter)) {
2454 rc = ena_setup_and_create_all_xdp_queues(adapter);
2455
2456 if (rc)
2457 goto err_setup_tx;
2458 }
2459 rc = ena_setup_tx_resources_in_range(adapter,
2460 0,
2461 adapter->num_io_queues);
2462 if (rc)
2463 goto err_setup_tx;
2464
2465 rc = ena_create_io_tx_queues_in_range(adapter,
2466 0,
2467 adapter->num_io_queues);
2468 if (rc)
2469 goto err_create_tx_queues;
2470
2471 rc = ena_setup_all_rx_resources(adapter);
2472 if (rc)
2473 goto err_setup_rx;
2474
2475 rc = ena_create_all_io_rx_queues(adapter);
2476 if (rc)
2477 goto err_create_rx_queues;
2478
2479 return 0;
2480
2481 err_create_rx_queues:
2482 ena_free_all_io_rx_resources(adapter);
2483 err_setup_rx:
2484 ena_destroy_all_tx_queues(adapter);
2485 err_create_tx_queues:
2486 ena_free_all_io_tx_resources(adapter);
2487 err_setup_tx:
2488 if (rc != -ENOMEM) {
2489 netif_err(adapter, ifup, adapter->netdev,
2490 "Queue creation failed with error code %d\n",
2491 rc);
2492 return rc;
2493 }
2494
2495 cur_tx_ring_size = adapter->tx_ring[0].ring_size;
2496 cur_rx_ring_size = adapter->rx_ring[0].ring_size;
2497
2498 netif_err(adapter, ifup, adapter->netdev,
2499 "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
2500 cur_tx_ring_size, cur_rx_ring_size);
2501
2502 new_tx_ring_size = cur_tx_ring_size;
2503 new_rx_ring_size = cur_rx_ring_size;
2504
2505 /* Decrease the size of the larger queue, or
2506 * decrease both if they are the same size.
2507 */
2508 if (cur_rx_ring_size <= cur_tx_ring_size)
2509 new_tx_ring_size = cur_tx_ring_size / 2;
2510 if (cur_rx_ring_size >= cur_tx_ring_size)
2511 new_rx_ring_size = cur_rx_ring_size / 2;
2512
2513 if (new_tx_ring_size < ENA_MIN_RING_SIZE ||
2514 new_rx_ring_size < ENA_MIN_RING_SIZE) {
2515 netif_err(adapter, ifup, adapter->netdev,
2516 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",
2517 ENA_MIN_RING_SIZE);
2518 return rc;
2519 }
2520
2521 netif_err(adapter, ifup, adapter->netdev,
2522 "Retrying queue creation with sizes TX=%d, RX=%d\n",
2523 new_tx_ring_size,
2524 new_rx_ring_size);
2525
2526 set_io_rings_size(adapter, new_tx_ring_size,
2527 new_rx_ring_size);
2528 }
2529 }
2530
2531 static int ena_up(struct ena_adapter *adapter)
2532 {
2533 int io_queue_count, rc, i;
2534
2535 netdev_dbg(adapter->netdev, "%s\n", __func__);
2536
2537 io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2538 ena_setup_io_intr(adapter);
2539
2540 /* napi poll functions should be initialized before running
2541 * request_irq(), to handle a rare condition where there is a pending
2542 * interrupt, causing the ISR to fire immediately while the poll
2543 * function wasn't set yet, causing a null dereference
2544 */
2545 ena_init_napi_in_range(adapter, 0, io_queue_count);
2546
2547 rc = ena_request_io_irq(adapter);
2548 if (rc)
2549 goto err_req_irq;
2550
2551 rc = create_queues_with_size_backoff(adapter);
2552 if (rc)
2553 goto err_create_queues_with_backoff;
2554
2555 rc = ena_up_complete(adapter);
2556 if (rc)
2557 goto err_up;
2558
2559 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2560 netif_carrier_on(adapter->netdev);
2561
2562 u64_stats_update_begin(&adapter->syncp);
2563 adapter->dev_stats.interface_up++;
2564 u64_stats_update_end(&adapter->syncp);
2565
2566 set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2567
2568 /* Enable completion queues interrupt */
2569 for (i = 0; i < adapter->num_io_queues; i++)
2570 ena_unmask_interrupt(&adapter->tx_ring[i],
2571 &adapter->rx_ring[i]);
2572
2573 /* schedule napi in case we had pending packets
2574 * from the last time we disable napi
2575 */
2576 for (i = 0; i < io_queue_count; i++)
2577 napi_schedule(&adapter->ena_napi[i].napi);
2578
2579 return rc;
2580
2581 err_up:
2582 ena_destroy_all_tx_queues(adapter);
2583 ena_free_all_io_tx_resources(adapter);
2584 ena_destroy_all_rx_queues(adapter);
2585 ena_free_all_io_rx_resources(adapter);
2586 err_create_queues_with_backoff:
2587 ena_free_io_irq(adapter);
2588 err_req_irq:
2589 ena_del_napi_in_range(adapter, 0, io_queue_count);
2590
2591 return rc;
2592 }
2593
2594 static void ena_down(struct ena_adapter *adapter)
2595 {
2596 int io_queue_count = adapter->num_io_queues + adapter->xdp_num_queues;
2597
2598 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
2599
2600 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2601
2602 u64_stats_update_begin(&adapter->syncp);
2603 adapter->dev_stats.interface_down++;
2604 u64_stats_update_end(&adapter->syncp);
2605
2606 netif_carrier_off(adapter->netdev);
2607 netif_tx_disable(adapter->netdev);
2608
2609 /* After this point the napi handler won't enable the tx queue */
2610 ena_napi_disable_in_range(adapter, 0, io_queue_count);
2611
2612 /* After destroy the queue there won't be any new interrupts */
2613
2614 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
2615 int rc;
2616
2617 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2618 if (rc)
2619 dev_err(&adapter->pdev->dev, "Device reset failed\n");
2620 /* stop submitting admin commands on a device that was reset */
2621 ena_com_set_admin_running_state(adapter->ena_dev, false);
2622 }
2623
2624 ena_destroy_all_io_queues(adapter);
2625
2626 ena_disable_io_intr_sync(adapter);
2627 ena_free_io_irq(adapter);
2628 ena_del_napi_in_range(adapter, 0, io_queue_count);
2629
2630 ena_free_all_tx_bufs(adapter);
2631 ena_free_all_rx_bufs(adapter);
2632 ena_free_all_io_tx_resources(adapter);
2633 ena_free_all_io_rx_resources(adapter);
2634 }
2635
2636 /* ena_open - Called when a network interface is made active
2637 * @netdev: network interface device structure
2638 *
2639 * Returns 0 on success, negative value on failure
2640 *
2641 * The open entry point is called when a network interface is made
2642 * active by the system (IFF_UP). At this point all resources needed
2643 * for transmit and receive operations are allocated, the interrupt
2644 * handler is registered with the OS, the watchdog timer is started,
2645 * and the stack is notified that the interface is ready.
2646 */
2647 static int ena_open(struct net_device *netdev)
2648 {
2649 struct ena_adapter *adapter = netdev_priv(netdev);
2650 int rc;
2651
2652 /* Notify the stack of the actual queue counts. */
2653 rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues);
2654 if (rc) {
2655 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
2656 return rc;
2657 }
2658
2659 rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues);
2660 if (rc) {
2661 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
2662 return rc;
2663 }
2664
2665 rc = ena_up(adapter);
2666 if (rc)
2667 return rc;
2668
2669 return rc;
2670 }
2671
2672 /* ena_close - Disables a network interface
2673 * @netdev: network interface device structure
2674 *
2675 * Returns 0, this is not allowed to fail
2676 *
2677 * The close entry point is called when an interface is de-activated
2678 * by the OS. The hardware is still under the drivers control, but
2679 * needs to be disabled. A global MAC reset is issued to stop the
2680 * hardware, and all transmit and receive resources are freed.
2681 */
2682 static int ena_close(struct net_device *netdev)
2683 {
2684 struct ena_adapter *adapter = netdev_priv(netdev);
2685
2686 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
2687
2688 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2689 return 0;
2690
2691 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2692 ena_down(adapter);
2693
2694 /* Check for device status and issue reset if needed*/
2695 check_for_admin_com_state(adapter);
2696 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2697 netif_err(adapter, ifdown, adapter->netdev,
2698 "Destroy failure, restarting device\n");
2699 ena_dump_stats_to_dmesg(adapter);
2700 /* rtnl lock already obtained in dev_ioctl() layer */
2701 ena_destroy_device(adapter, false);
2702 ena_restore_device(adapter);
2703 }
2704
2705 return 0;
2706 }
2707
2708 int ena_update_queue_sizes(struct ena_adapter *adapter,
2709 u32 new_tx_size,
2710 u32 new_rx_size)
2711 {
2712 bool dev_was_up;
2713
2714 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2715 ena_close(adapter->netdev);
2716 adapter->requested_tx_ring_size = new_tx_size;
2717 adapter->requested_rx_ring_size = new_rx_size;
2718 ena_init_io_rings(adapter,
2719 0,
2720 adapter->xdp_num_queues +
2721 adapter->num_io_queues);
2722 return dev_was_up ? ena_up(adapter) : 0;
2723 }
2724
2725 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count)
2726 {
2727 struct ena_com_dev *ena_dev = adapter->ena_dev;
2728 int prev_channel_count;
2729 bool dev_was_up;
2730
2731 dev_was_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2732 ena_close(adapter->netdev);
2733 prev_channel_count = adapter->num_io_queues;
2734 adapter->num_io_queues = new_channel_count;
2735 if (ena_xdp_present(adapter) &&
2736 ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) {
2737 adapter->xdp_first_ring = new_channel_count;
2738 adapter->xdp_num_queues = new_channel_count;
2739 if (prev_channel_count > new_channel_count)
2740 ena_xdp_exchange_program_rx_in_range(adapter,
2741 NULL,
2742 new_channel_count,
2743 prev_channel_count);
2744 else
2745 ena_xdp_exchange_program_rx_in_range(adapter,
2746 adapter->xdp_bpf_prog,
2747 prev_channel_count,
2748 new_channel_count);
2749 }
2750
2751 /* We need to destroy the rss table so that the indirection
2752 * table will be reinitialized by ena_up()
2753 */
2754 ena_com_rss_destroy(ena_dev);
2755 ena_init_io_rings(adapter,
2756 0,
2757 adapter->xdp_num_queues +
2758 adapter->num_io_queues);
2759 return dev_was_up ? ena_open(adapter->netdev) : 0;
2760 }
2761
2762 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)
2763 {
2764 u32 mss = skb_shinfo(skb)->gso_size;
2765 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
2766 u8 l4_protocol = 0;
2767
2768 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
2769 ena_tx_ctx->l4_csum_enable = 1;
2770 if (mss) {
2771 ena_tx_ctx->tso_enable = 1;
2772 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
2773 ena_tx_ctx->l4_csum_partial = 0;
2774 } else {
2775 ena_tx_ctx->tso_enable = 0;
2776 ena_meta->l4_hdr_len = 0;
2777 ena_tx_ctx->l4_csum_partial = 1;
2778 }
2779
2780 switch (ip_hdr(skb)->version) {
2781 case IPVERSION:
2782 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2783 if (ip_hdr(skb)->frag_off & htons(IP_DF))
2784 ena_tx_ctx->df = 1;
2785 if (mss)
2786 ena_tx_ctx->l3_csum_enable = 1;
2787 l4_protocol = ip_hdr(skb)->protocol;
2788 break;
2789 case 6:
2790 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2791 l4_protocol = ipv6_hdr(skb)->nexthdr;
2792 break;
2793 default:
2794 break;
2795 }
2796
2797 if (l4_protocol == IPPROTO_TCP)
2798 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2799 else
2800 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2801
2802 ena_meta->mss = mss;
2803 ena_meta->l3_hdr_len = skb_network_header_len(skb);
2804 ena_meta->l3_hdr_offset = skb_network_offset(skb);
2805 ena_tx_ctx->meta_valid = 1;
2806
2807 } else {
2808 ena_tx_ctx->meta_valid = 0;
2809 }
2810 }
2811
2812 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
2813 struct sk_buff *skb)
2814 {
2815 int num_frags, header_len, rc;
2816
2817 num_frags = skb_shinfo(skb)->nr_frags;
2818 header_len = skb_headlen(skb);
2819
2820 if (num_frags < tx_ring->sgl_size)
2821 return 0;
2822
2823 if ((num_frags == tx_ring->sgl_size) &&
2824 (header_len < tx_ring->tx_max_header_size))
2825 return 0;
2826
2827 u64_stats_update_begin(&tx_ring->syncp);
2828 tx_ring->tx_stats.linearize++;
2829 u64_stats_update_end(&tx_ring->syncp);
2830
2831 rc = skb_linearize(skb);
2832 if (unlikely(rc)) {
2833 u64_stats_update_begin(&tx_ring->syncp);
2834 tx_ring->tx_stats.linearize_failed++;
2835 u64_stats_update_end(&tx_ring->syncp);
2836 }
2837
2838 return rc;
2839 }
2840
2841 static int ena_tx_map_skb(struct ena_ring *tx_ring,
2842 struct ena_tx_buffer *tx_info,
2843 struct sk_buff *skb,
2844 void **push_hdr,
2845 u16 *header_len)
2846 {
2847 struct ena_adapter *adapter = tx_ring->adapter;
2848 struct ena_com_buf *ena_buf;
2849 dma_addr_t dma;
2850 u32 skb_head_len, frag_len, last_frag;
2851 u16 push_len = 0;
2852 u16 delta = 0;
2853 int i = 0;
2854
2855 skb_head_len = skb_headlen(skb);
2856 tx_info->skb = skb;
2857 ena_buf = tx_info->bufs;
2858
2859 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2860 /* When the device is LLQ mode, the driver will copy
2861 * the header into the device memory space.
2862 * the ena_com layer assume the header is in a linear
2863 * memory space.
2864 * This assumption might be wrong since part of the header
2865 * can be in the fragmented buffers.
2866 * Use skb_header_pointer to make sure the header is in a
2867 * linear memory space.
2868 */
2869
2870 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
2871 *push_hdr = skb_header_pointer(skb, 0, push_len,
2872 tx_ring->push_buf_intermediate_buf);
2873 *header_len = push_len;
2874 if (unlikely(skb->data != *push_hdr)) {
2875 u64_stats_update_begin(&tx_ring->syncp);
2876 tx_ring->tx_stats.llq_buffer_copy++;
2877 u64_stats_update_end(&tx_ring->syncp);
2878
2879 delta = push_len - skb_head_len;
2880 }
2881 } else {
2882 *push_hdr = NULL;
2883 *header_len = min_t(u32, skb_head_len,
2884 tx_ring->tx_max_header_size);
2885 }
2886
2887 netif_dbg(adapter, tx_queued, adapter->netdev,
2888 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
2889 *push_hdr, push_len);
2890
2891 if (skb_head_len > push_len) {
2892 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
2893 skb_head_len - push_len, DMA_TO_DEVICE);
2894 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2895 goto error_report_dma_error;
2896
2897 ena_buf->paddr = dma;
2898 ena_buf->len = skb_head_len - push_len;
2899
2900 ena_buf++;
2901 tx_info->num_of_bufs++;
2902 tx_info->map_linear_data = 1;
2903 } else {
2904 tx_info->map_linear_data = 0;
2905 }
2906
2907 last_frag = skb_shinfo(skb)->nr_frags;
2908
2909 for (i = 0; i < last_frag; i++) {
2910 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2911
2912 frag_len = skb_frag_size(frag);
2913
2914 if (unlikely(delta >= frag_len)) {
2915 delta -= frag_len;
2916 continue;
2917 }
2918
2919 dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
2920 frag_len - delta, DMA_TO_DEVICE);
2921 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2922 goto error_report_dma_error;
2923
2924 ena_buf->paddr = dma;
2925 ena_buf->len = frag_len - delta;
2926 ena_buf++;
2927 tx_info->num_of_bufs++;
2928 delta = 0;
2929 }
2930
2931 return 0;
2932
2933 error_report_dma_error:
2934 u64_stats_update_begin(&tx_ring->syncp);
2935 tx_ring->tx_stats.dma_mapping_err++;
2936 u64_stats_update_end(&tx_ring->syncp);
2937 netdev_warn(adapter->netdev, "failed to map skb\n");
2938
2939 tx_info->skb = NULL;
2940
2941 tx_info->num_of_bufs += i;
2942 ena_unmap_tx_buff(tx_ring, tx_info);
2943
2944 return -EINVAL;
2945 }
2946
2947 /* Called with netif_tx_lock. */
2948 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
2949 {
2950 struct ena_adapter *adapter = netdev_priv(dev);
2951 struct ena_tx_buffer *tx_info;
2952 struct ena_com_tx_ctx ena_tx_ctx;
2953 struct ena_ring *tx_ring;
2954 struct netdev_queue *txq;
2955 void *push_hdr;
2956 u16 next_to_use, req_id, header_len;
2957 int qid, rc;
2958
2959 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
2960 /* Determine which tx ring we will be placed on */
2961 qid = skb_get_queue_mapping(skb);
2962 tx_ring = &adapter->tx_ring[qid];
2963 txq = netdev_get_tx_queue(dev, qid);
2964
2965 rc = ena_check_and_linearize_skb(tx_ring, skb);
2966 if (unlikely(rc))
2967 goto error_drop_packet;
2968
2969 skb_tx_timestamp(skb);
2970
2971 next_to_use = tx_ring->next_to_use;
2972 req_id = tx_ring->free_ids[next_to_use];
2973 tx_info = &tx_ring->tx_buffer_info[req_id];
2974 tx_info->num_of_bufs = 0;
2975
2976 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
2977
2978 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
2979 if (unlikely(rc))
2980 goto error_drop_packet;
2981
2982 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2983 ena_tx_ctx.ena_bufs = tx_info->bufs;
2984 ena_tx_ctx.push_header = push_hdr;
2985 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2986 ena_tx_ctx.req_id = req_id;
2987 ena_tx_ctx.header_len = header_len;
2988
2989 /* set flags and meta data */
2990 ena_tx_csum(&ena_tx_ctx, skb);
2991
2992 rc = ena_xmit_common(dev,
2993 tx_ring,
2994 tx_info,
2995 &ena_tx_ctx,
2996 next_to_use,
2997 skb->len);
2998 if (rc)
2999 goto error_unmap_dma;
3000
3001 netdev_tx_sent_queue(txq, skb->len);
3002
3003 /* stop the queue when no more space available, the packet can have up
3004 * to sgl_size + 2. one for the meta descriptor and one for header
3005 * (if the header is larger than tx_max_header_size).
3006 */
3007 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3008 tx_ring->sgl_size + 2))) {
3009 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
3010 __func__, qid);
3011
3012 netif_tx_stop_queue(txq);
3013 u64_stats_update_begin(&tx_ring->syncp);
3014 tx_ring->tx_stats.queue_stop++;
3015 u64_stats_update_end(&tx_ring->syncp);
3016
3017 /* There is a rare condition where this function decide to
3018 * stop the queue but meanwhile clean_tx_irq updates
3019 * next_to_completion and terminates.
3020 * The queue will remain stopped forever.
3021 * To solve this issue add a mb() to make sure that
3022 * netif_tx_stop_queue() write is vissible before checking if
3023 * there is additional space in the queue.
3024 */
3025 smp_mb();
3026
3027 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
3028 ENA_TX_WAKEUP_THRESH)) {
3029 netif_tx_wake_queue(txq);
3030 u64_stats_update_begin(&tx_ring->syncp);
3031 tx_ring->tx_stats.queue_wakeup++;
3032 u64_stats_update_end(&tx_ring->syncp);
3033 }
3034 }
3035
3036 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) {
3037 /* trigger the dma engine. ena_com_write_sq_doorbell()
3038 * has a mb
3039 */
3040 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
3041 u64_stats_update_begin(&tx_ring->syncp);
3042 tx_ring->tx_stats.doorbells++;
3043 u64_stats_update_end(&tx_ring->syncp);
3044 }
3045
3046 return NETDEV_TX_OK;
3047
3048 error_unmap_dma:
3049 ena_unmap_tx_buff(tx_ring, tx_info);
3050 tx_info->skb = NULL;
3051
3052 error_drop_packet:
3053 dev_kfree_skb(skb);
3054 return NETDEV_TX_OK;
3055 }
3056
3057 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
3058 struct net_device *sb_dev)
3059 {
3060 u16 qid;
3061 /* we suspect that this is good for in--kernel network services that
3062 * want to loop incoming skb rx to tx in normal user generated traffic,
3063 * most probably we will not get to this
3064 */
3065 if (skb_rx_queue_recorded(skb))
3066 qid = skb_get_rx_queue(skb);
3067 else
3068 qid = netdev_pick_tx(dev, skb, NULL);
3069
3070 return qid;
3071 }
3072
3073 static void ena_config_host_info(struct ena_com_dev *ena_dev,
3074 struct pci_dev *pdev)
3075 {
3076 struct ena_admin_host_info *host_info;
3077 int rc;
3078
3079 /* Allocate only the host info */
3080 rc = ena_com_allocate_host_info(ena_dev);
3081 if (rc) {
3082 pr_err("Cannot allocate host info\n");
3083 return;
3084 }
3085
3086 host_info = ena_dev->host_attr.host_info;
3087
3088 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
3089 host_info->os_type = ENA_ADMIN_OS_LINUX;
3090 host_info->kernel_ver = LINUX_VERSION_CODE;
3091 strlcpy(host_info->kernel_ver_str, utsname()->version,
3092 sizeof(host_info->kernel_ver_str) - 1);
3093 host_info->os_dist = 0;
3094 strncpy(host_info->os_dist_str, utsname()->release,
3095 sizeof(host_info->os_dist_str) - 1);
3096 host_info->driver_version =
3097 (DRV_MODULE_VER_MAJOR) |
3098 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
3099 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
3100 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
3101 host_info->num_cpus = num_online_cpus();
3102
3103 host_info->driver_supported_features =
3104 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK;
3105
3106 rc = ena_com_set_host_attributes(ena_dev);
3107 if (rc) {
3108 if (rc == -EOPNOTSUPP)
3109 pr_warn("Cannot set host attributes\n");
3110 else
3111 pr_err("Cannot set host attributes\n");
3112
3113 goto err;
3114 }
3115
3116 return;
3117
3118 err:
3119 ena_com_delete_host_info(ena_dev);
3120 }
3121
3122 static void ena_config_debug_area(struct ena_adapter *adapter)
3123 {
3124 u32 debug_area_size;
3125 int rc, ss_count;
3126
3127 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
3128 if (ss_count <= 0) {
3129 netif_err(adapter, drv, adapter->netdev,
3130 "SS count is negative\n");
3131 return;
3132 }
3133
3134 /* allocate 32 bytes for each string and 64bit for the value */
3135 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
3136
3137 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
3138 if (rc) {
3139 pr_err("Cannot allocate debug area\n");
3140 return;
3141 }
3142
3143 rc = ena_com_set_host_attributes(adapter->ena_dev);
3144 if (rc) {
3145 if (rc == -EOPNOTSUPP)
3146 netif_warn(adapter, drv, adapter->netdev,
3147 "Cannot set host attributes\n");
3148 else
3149 netif_err(adapter, drv, adapter->netdev,
3150 "Cannot set host attributes\n");
3151 goto err;
3152 }
3153
3154 return;
3155 err:
3156 ena_com_delete_debug_area(adapter->ena_dev);
3157 }
3158
3159 static void ena_get_stats64(struct net_device *netdev,
3160 struct rtnl_link_stats64 *stats)
3161 {
3162 struct ena_adapter *adapter = netdev_priv(netdev);
3163 struct ena_ring *rx_ring, *tx_ring;
3164 unsigned int start;
3165 u64 rx_drops;
3166 int i;
3167
3168 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3169 return;
3170
3171 for (i = 0; i < adapter->num_io_queues; i++) {
3172 u64 bytes, packets;
3173
3174 tx_ring = &adapter->tx_ring[i];
3175
3176 do {
3177 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
3178 packets = tx_ring->tx_stats.cnt;
3179 bytes = tx_ring->tx_stats.bytes;
3180 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
3181
3182 stats->tx_packets += packets;
3183 stats->tx_bytes += bytes;
3184
3185 rx_ring = &adapter->rx_ring[i];
3186
3187 do {
3188 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
3189 packets = rx_ring->rx_stats.cnt;
3190 bytes = rx_ring->rx_stats.bytes;
3191 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
3192
3193 stats->rx_packets += packets;
3194 stats->rx_bytes += bytes;
3195 }
3196
3197 do {
3198 start = u64_stats_fetch_begin_irq(&adapter->syncp);
3199 rx_drops = adapter->dev_stats.rx_drops;
3200 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
3201
3202 stats->rx_dropped = rx_drops;
3203
3204 stats->multicast = 0;
3205 stats->collisions = 0;
3206
3207 stats->rx_length_errors = 0;
3208 stats->rx_crc_errors = 0;
3209 stats->rx_frame_errors = 0;
3210 stats->rx_fifo_errors = 0;
3211 stats->rx_missed_errors = 0;
3212 stats->tx_window_errors = 0;
3213
3214 stats->rx_errors = 0;
3215 stats->tx_errors = 0;
3216 }
3217
3218 static const struct net_device_ops ena_netdev_ops = {
3219 .ndo_open = ena_open,
3220 .ndo_stop = ena_close,
3221 .ndo_start_xmit = ena_start_xmit,
3222 .ndo_select_queue = ena_select_queue,
3223 .ndo_get_stats64 = ena_get_stats64,
3224 .ndo_tx_timeout = ena_tx_timeout,
3225 .ndo_change_mtu = ena_change_mtu,
3226 .ndo_set_mac_address = NULL,
3227 .ndo_validate_addr = eth_validate_addr,
3228 .ndo_bpf = ena_xdp,
3229 };
3230
3231 static int ena_device_validate_params(struct ena_adapter *adapter,
3232 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3233 {
3234 struct net_device *netdev = adapter->netdev;
3235 int rc;
3236
3237 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
3238 adapter->mac_addr);
3239 if (!rc) {
3240 netif_err(adapter, drv, netdev,
3241 "Error, mac address are different\n");
3242 return -EINVAL;
3243 }
3244
3245 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
3246 netif_err(adapter, drv, netdev,
3247 "Error, device max mtu is smaller than netdev MTU\n");
3248 return -EINVAL;
3249 }
3250
3251 return 0;
3252 }
3253
3254 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
3255 struct ena_com_dev_get_features_ctx *get_feat_ctx,
3256 bool *wd_state)
3257 {
3258 struct device *dev = &pdev->dev;
3259 bool readless_supported;
3260 u32 aenq_groups;
3261 int dma_width;
3262 int rc;
3263
3264 rc = ena_com_mmio_reg_read_request_init(ena_dev);
3265 if (rc) {
3266 dev_err(dev, "failed to init mmio read less\n");
3267 return rc;
3268 }
3269
3270 /* The PCIe configuration space revision id indicate if mmio reg
3271 * read is disabled
3272 */
3273 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
3274 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
3275
3276 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
3277 if (rc) {
3278 dev_err(dev, "Can not reset device\n");
3279 goto err_mmio_read_less;
3280 }
3281
3282 rc = ena_com_validate_version(ena_dev);
3283 if (rc) {
3284 dev_err(dev, "device version is too low\n");
3285 goto err_mmio_read_less;
3286 }
3287
3288 dma_width = ena_com_get_dma_width(ena_dev);
3289 if (dma_width < 0) {
3290 dev_err(dev, "Invalid dma width value %d", dma_width);
3291 rc = dma_width;
3292 goto err_mmio_read_less;
3293 }
3294
3295 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));
3296 if (rc) {
3297 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc);
3298 goto err_mmio_read_less;
3299 }
3300
3301 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
3302 if (rc) {
3303 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n",
3304 rc);
3305 goto err_mmio_read_less;
3306 }
3307
3308 /* ENA admin level init */
3309 rc = ena_com_admin_init(ena_dev, &aenq_handlers);
3310 if (rc) {
3311 dev_err(dev,
3312 "Can not initialize ena admin queue with device\n");
3313 goto err_mmio_read_less;
3314 }
3315
3316 /* To enable the msix interrupts the driver needs to know the number
3317 * of queues. So the driver uses polling mode to retrieve this
3318 * information
3319 */
3320 ena_com_set_admin_polling_mode(ena_dev, true);
3321
3322 ena_config_host_info(ena_dev, pdev);
3323
3324 /* Get Device Attributes*/
3325 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
3326 if (rc) {
3327 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
3328 goto err_admin_init;
3329 }
3330
3331 /* Try to turn all the available aenq groups */
3332 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
3333 BIT(ENA_ADMIN_FATAL_ERROR) |
3334 BIT(ENA_ADMIN_WARNING) |
3335 BIT(ENA_ADMIN_NOTIFICATION) |
3336 BIT(ENA_ADMIN_KEEP_ALIVE);
3337
3338 aenq_groups &= get_feat_ctx->aenq.supported_groups;
3339
3340 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
3341 if (rc) {
3342 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
3343 goto err_admin_init;
3344 }
3345
3346 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
3347
3348 return 0;
3349
3350 err_admin_init:
3351 ena_com_delete_host_info(ena_dev);
3352 ena_com_admin_destroy(ena_dev);
3353 err_mmio_read_less:
3354 ena_com_mmio_reg_read_request_destroy(ena_dev);
3355
3356 return rc;
3357 }
3358
3359 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter)
3360 {
3361 struct ena_com_dev *ena_dev = adapter->ena_dev;
3362 struct device *dev = &adapter->pdev->dev;
3363 int rc;
3364
3365 rc = ena_enable_msix(adapter);
3366 if (rc) {
3367 dev_err(dev, "Can not reserve msix vectors\n");
3368 return rc;
3369 }
3370
3371 ena_setup_mgmnt_intr(adapter);
3372
3373 rc = ena_request_mgmnt_irq(adapter);
3374 if (rc) {
3375 dev_err(dev, "Can not setup management interrupts\n");
3376 goto err_disable_msix;
3377 }
3378
3379 ena_com_set_admin_polling_mode(ena_dev, false);
3380
3381 ena_com_admin_aenq_enable(ena_dev);
3382
3383 return 0;
3384
3385 err_disable_msix:
3386 ena_disable_msix(adapter);
3387
3388 return rc;
3389 }
3390
3391 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
3392 {
3393 struct net_device *netdev = adapter->netdev;
3394 struct ena_com_dev *ena_dev = adapter->ena_dev;
3395 bool dev_up;
3396
3397 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
3398 return;
3399
3400 netif_carrier_off(netdev);
3401
3402 del_timer_sync(&adapter->timer_service);
3403
3404 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
3405 adapter->dev_up_before_reset = dev_up;
3406 if (!graceful)
3407 ena_com_set_admin_running_state(ena_dev, false);
3408
3409 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3410 ena_down(adapter);
3411
3412 /* Stop the device from sending AENQ events (in case reset flag is set
3413 * and device is up, ena_down() already reset the device.
3414 */
3415 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
3416 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
3417
3418 ena_free_mgmnt_irq(adapter);
3419
3420 ena_disable_msix(adapter);
3421
3422 ena_com_abort_admin_commands(ena_dev);
3423
3424 ena_com_wait_for_abort_completion(ena_dev);
3425
3426 ena_com_admin_destroy(ena_dev);
3427
3428 ena_com_mmio_reg_read_request_destroy(ena_dev);
3429
3430 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3431
3432 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3433 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3434 }
3435
3436 static int ena_restore_device(struct ena_adapter *adapter)
3437 {
3438 struct ena_com_dev_get_features_ctx get_feat_ctx;
3439 struct ena_com_dev *ena_dev = adapter->ena_dev;
3440 struct pci_dev *pdev = adapter->pdev;
3441 bool wd_state;
3442 int rc;
3443
3444 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3445 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
3446 if (rc) {
3447 dev_err(&pdev->dev, "Can not initialize device\n");
3448 goto err;
3449 }
3450 adapter->wd_state = wd_state;
3451
3452 rc = ena_device_validate_params(adapter, &get_feat_ctx);
3453 if (rc) {
3454 dev_err(&pdev->dev, "Validation of device parameters failed\n");
3455 goto err_device_destroy;
3456 }
3457
3458 rc = ena_enable_msix_and_set_admin_interrupts(adapter);
3459 if (rc) {
3460 dev_err(&pdev->dev, "Enable MSI-X failed\n");
3461 goto err_device_destroy;
3462 }
3463 /* If the interface was up before the reset bring it up */
3464 if (adapter->dev_up_before_reset) {
3465 rc = ena_up(adapter);
3466 if (rc) {
3467 dev_err(&pdev->dev, "Failed to create I/O queues\n");
3468 goto err_disable_msix;
3469 }
3470 }
3471
3472 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3473
3474 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3475 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
3476 netif_carrier_on(adapter->netdev);
3477
3478 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3479 dev_err(&pdev->dev,
3480 "Device reset completed successfully, Driver info: %s\n",
3481 version);
3482
3483 return rc;
3484 err_disable_msix:
3485 ena_free_mgmnt_irq(adapter);
3486 ena_disable_msix(adapter);
3487 err_device_destroy:
3488 ena_com_abort_admin_commands(ena_dev);
3489 ena_com_wait_for_abort_completion(ena_dev);
3490 ena_com_admin_destroy(ena_dev);
3491 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
3492 ena_com_mmio_reg_read_request_destroy(ena_dev);
3493 err:
3494 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3495 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
3496 dev_err(&pdev->dev,
3497 "Reset attempt failed. Can not reset the device\n");
3498
3499 return rc;
3500 }
3501
3502 static void ena_fw_reset_device(struct work_struct *work)
3503 {
3504 struct ena_adapter *adapter =
3505 container_of(work, struct ena_adapter, reset_task);
3506 struct pci_dev *pdev = adapter->pdev;
3507
3508 if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3509 dev_err(&pdev->dev,
3510 "device reset schedule while reset bit is off\n");
3511 return;
3512 }
3513 rtnl_lock();
3514 ena_destroy_device(adapter, false);
3515 ena_restore_device(adapter);
3516 rtnl_unlock();
3517 }
3518
3519 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
3520 struct ena_ring *rx_ring)
3521 {
3522 if (likely(rx_ring->first_interrupt))
3523 return 0;
3524
3525 if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
3526 return 0;
3527
3528 rx_ring->no_interrupt_event_cnt++;
3529
3530 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
3531 netif_err(adapter, rx_err, adapter->netdev,
3532 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
3533 rx_ring->qid);
3534 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3535 smp_mb__before_atomic();
3536 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3537 return -EIO;
3538 }
3539
3540 return 0;
3541 }
3542
3543 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
3544 struct ena_ring *tx_ring)
3545 {
3546 struct ena_tx_buffer *tx_buf;
3547 unsigned long last_jiffies;
3548 u32 missed_tx = 0;
3549 int i, rc = 0;
3550
3551 for (i = 0; i < tx_ring->ring_size; i++) {
3552 tx_buf = &tx_ring->tx_buffer_info[i];
3553 last_jiffies = tx_buf->last_jiffies;
3554
3555 if (last_jiffies == 0)
3556 /* no pending Tx at this location */
3557 continue;
3558
3559 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies +
3560 2 * adapter->missing_tx_completion_to))) {
3561 /* If after graceful period interrupt is still not
3562 * received, we schedule a reset
3563 */
3564 netif_err(adapter, tx_err, adapter->netdev,
3565 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
3566 tx_ring->qid);
3567 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
3568 smp_mb__before_atomic();
3569 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3570 return -EIO;
3571 }
3572
3573 if (unlikely(time_is_before_jiffies(last_jiffies +
3574 adapter->missing_tx_completion_to))) {
3575 if (!tx_buf->print_once)
3576 netif_notice(adapter, tx_err, adapter->netdev,
3577 "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
3578 tx_ring->qid, i);
3579
3580 tx_buf->print_once = 1;
3581 missed_tx++;
3582 }
3583 }
3584
3585 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
3586 netif_err(adapter, tx_err, adapter->netdev,
3587 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
3588 missed_tx,
3589 adapter->missing_tx_completion_threshold);
3590 adapter->reset_reason =
3591 ENA_REGS_RESET_MISS_TX_CMPL;
3592 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3593 rc = -EIO;
3594 }
3595
3596 u64_stats_update_begin(&tx_ring->syncp);
3597 tx_ring->tx_stats.missed_tx = missed_tx;
3598 u64_stats_update_end(&tx_ring->syncp);
3599
3600 return rc;
3601 }
3602
3603 static void check_for_missing_completions(struct ena_adapter *adapter)
3604 {
3605 struct ena_ring *tx_ring;
3606 struct ena_ring *rx_ring;
3607 int i, budget, rc;
3608 int io_queue_count;
3609
3610 io_queue_count = adapter->xdp_num_queues + adapter->num_io_queues;
3611 /* Make sure the driver doesn't turn the device in other process */
3612 smp_rmb();
3613
3614 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3615 return;
3616
3617 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3618 return;
3619
3620 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
3621 return;
3622
3623 budget = ENA_MONITORED_TX_QUEUES;
3624
3625 for (i = adapter->last_monitored_tx_qid; i < io_queue_count; i++) {
3626 tx_ring = &adapter->tx_ring[i];
3627 rx_ring = &adapter->rx_ring[i];
3628
3629 rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
3630 if (unlikely(rc))
3631 return;
3632
3633 rc = !ENA_IS_XDP_INDEX(adapter, i) ?
3634 check_for_rx_interrupt_queue(adapter, rx_ring) : 0;
3635 if (unlikely(rc))
3636 return;
3637
3638 budget--;
3639 if (!budget)
3640 break;
3641 }
3642
3643 adapter->last_monitored_tx_qid = i % io_queue_count;
3644 }
3645
3646 /* trigger napi schedule after 2 consecutive detections */
3647 #define EMPTY_RX_REFILL 2
3648 /* For the rare case where the device runs out of Rx descriptors and the
3649 * napi handler failed to refill new Rx descriptors (due to a lack of memory
3650 * for example).
3651 * This case will lead to a deadlock:
3652 * The device won't send interrupts since all the new Rx packets will be dropped
3653 * The napi handler won't allocate new Rx descriptors so the device will be
3654 * able to send new packets.
3655 *
3656 * This scenario can happen when the kernel's vm.min_free_kbytes is too small.
3657 * It is recommended to have at least 512MB, with a minimum of 128MB for
3658 * constrained environment).
3659 *
3660 * When such a situation is detected - Reschedule napi
3661 */
3662 static void check_for_empty_rx_ring(struct ena_adapter *adapter)
3663 {
3664 struct ena_ring *rx_ring;
3665 int i, refill_required;
3666
3667 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3668 return;
3669
3670 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3671 return;
3672
3673 for (i = 0; i < adapter->num_io_queues; i++) {
3674 rx_ring = &adapter->rx_ring[i];
3675
3676 refill_required =
3677 ena_com_free_desc(rx_ring->ena_com_io_sq);
3678 if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3679 rx_ring->empty_rx_queue++;
3680
3681 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
3682 u64_stats_update_begin(&rx_ring->syncp);
3683 rx_ring->rx_stats.empty_rx_ring++;
3684 u64_stats_update_end(&rx_ring->syncp);
3685
3686 netif_err(adapter, drv, adapter->netdev,
3687 "trigger refill for ring %d\n", i);
3688
3689 napi_schedule(rx_ring->napi);
3690 rx_ring->empty_rx_queue = 0;
3691 }
3692 } else {
3693 rx_ring->empty_rx_queue = 0;
3694 }
3695 }
3696 }
3697
3698 /* Check for keep alive expiration */
3699 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3700 {
3701 unsigned long keep_alive_expired;
3702
3703 if (!adapter->wd_state)
3704 return;
3705
3706 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3707 return;
3708
3709 keep_alive_expired = round_jiffies(adapter->last_keep_alive_jiffies +
3710 adapter->keep_alive_timeout);
3711 if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
3712 netif_err(adapter, drv, adapter->netdev,
3713 "Keep alive watchdog timeout.\n");
3714 u64_stats_update_begin(&adapter->syncp);
3715 adapter->dev_stats.wd_expired++;
3716 u64_stats_update_end(&adapter->syncp);
3717 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
3718 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3719 }
3720 }
3721
3722 static void check_for_admin_com_state(struct ena_adapter *adapter)
3723 {
3724 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
3725 netif_err(adapter, drv, adapter->netdev,
3726 "ENA admin queue is not in running state!\n");
3727 u64_stats_update_begin(&adapter->syncp);
3728 adapter->dev_stats.admin_q_pause++;
3729 u64_stats_update_end(&adapter->syncp);
3730 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
3731 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3732 }
3733 }
3734
3735 static void ena_update_hints(struct ena_adapter *adapter,
3736 struct ena_admin_ena_hw_hints *hints)
3737 {
3738 struct net_device *netdev = adapter->netdev;
3739
3740 if (hints->admin_completion_tx_timeout)
3741 adapter->ena_dev->admin_queue.completion_timeout =
3742 hints->admin_completion_tx_timeout * 1000;
3743
3744 if (hints->mmio_read_timeout)
3745 /* convert to usec */
3746 adapter->ena_dev->mmio_read.reg_read_to =
3747 hints->mmio_read_timeout * 1000;
3748
3749 if (hints->missed_tx_completion_count_threshold_to_reset)
3750 adapter->missing_tx_completion_threshold =
3751 hints->missed_tx_completion_count_threshold_to_reset;
3752
3753 if (hints->missing_tx_completion_timeout) {
3754 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3755 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
3756 else
3757 adapter->missing_tx_completion_to =
3758 msecs_to_jiffies(hints->missing_tx_completion_timeout);
3759 }
3760
3761 if (hints->netdev_wd_timeout)
3762 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
3763
3764 if (hints->driver_watchdog_timeout) {
3765 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3766 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3767 else
3768 adapter->keep_alive_timeout =
3769 msecs_to_jiffies(hints->driver_watchdog_timeout);
3770 }
3771 }
3772
3773 static void ena_update_host_info(struct ena_admin_host_info *host_info,
3774 struct net_device *netdev)
3775 {
3776 host_info->supported_network_features[0] =
3777 netdev->features & GENMASK_ULL(31, 0);
3778 host_info->supported_network_features[1] =
3779 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
3780 }
3781
3782 static void ena_timer_service(struct timer_list *t)
3783 {
3784 struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
3785 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
3786 struct ena_admin_host_info *host_info =
3787 adapter->ena_dev->host_attr.host_info;
3788
3789 check_for_missing_keep_alive(adapter);
3790
3791 check_for_admin_com_state(adapter);
3792
3793 check_for_missing_completions(adapter);
3794
3795 check_for_empty_rx_ring(adapter);
3796
3797 if (debug_area)
3798 ena_dump_stats_to_buf(adapter, debug_area);
3799
3800 if (host_info)
3801 ena_update_host_info(host_info, adapter->netdev);
3802
3803 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3804 netif_err(adapter, drv, adapter->netdev,
3805 "Trigger reset is on\n");
3806 ena_dump_stats_to_dmesg(adapter);
3807 queue_work(ena_wq, &adapter->reset_task);
3808 return;
3809 }
3810
3811 /* Reset the timer */
3812 mod_timer(&adapter->timer_service, jiffies + HZ);
3813 }
3814
3815 static int ena_calc_max_io_queue_num(struct pci_dev *pdev,
3816 struct ena_com_dev *ena_dev,
3817 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3818 {
3819 int io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues;
3820
3821 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3822 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3823 &get_feat_ctx->max_queue_ext.max_queue_ext;
3824 io_rx_num = min_t(u32, max_queue_ext->max_rx_sq_num,
3825 max_queue_ext->max_rx_cq_num);
3826
3827 io_tx_sq_num = max_queue_ext->max_tx_sq_num;
3828 io_tx_cq_num = max_queue_ext->max_tx_cq_num;
3829 } else {
3830 struct ena_admin_queue_feature_desc *max_queues =
3831 &get_feat_ctx->max_queues;
3832 io_tx_sq_num = max_queues->max_sq_num;
3833 io_tx_cq_num = max_queues->max_cq_num;
3834 io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num);
3835 }
3836
3837 /* In case of LLQ use the llq fields for the tx SQ/CQ */
3838 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3839 io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
3840
3841 max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
3842 max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num);
3843 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num);
3844 max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num);
3845 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
3846 max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1);
3847 if (unlikely(!max_num_io_queues)) {
3848 dev_err(&pdev->dev, "The device doesn't have io queues\n");
3849 return -EFAULT;
3850 }
3851
3852 return max_num_io_queues;
3853 }
3854
3855 static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3856 struct ena_com_dev *ena_dev,
3857 struct ena_admin_feature_llq_desc *llq,
3858 struct ena_llq_configurations *llq_default_configurations)
3859 {
3860 bool has_mem_bar;
3861 int rc;
3862 u32 llq_feature_mask;
3863
3864 llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3865 if (!(ena_dev->supported_features & llq_feature_mask)) {
3866 dev_err(&pdev->dev,
3867 "LLQ is not supported Fallback to host mode policy.\n");
3868 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3869 return 0;
3870 }
3871
3872 has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR);
3873
3874 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3875 if (unlikely(rc)) {
3876 dev_err(&pdev->dev,
3877 "Failed to configure the device mode. Fallback to host mode policy.\n");
3878 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3879 return 0;
3880 }
3881
3882 /* Nothing to config, exit */
3883 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
3884 return 0;
3885
3886 if (!has_mem_bar) {
3887 dev_err(&pdev->dev,
3888 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n");
3889 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3890 return 0;
3891 }
3892
3893 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3894 pci_resource_start(pdev, ENA_MEM_BAR),
3895 pci_resource_len(pdev, ENA_MEM_BAR));
3896
3897 if (!ena_dev->mem_bar)
3898 return -EFAULT;
3899
3900 return 0;
3901 }
3902
3903 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
3904 struct net_device *netdev)
3905 {
3906 netdev_features_t dev_features = 0;
3907
3908 /* Set offload features */
3909 if (feat->offload.tx &
3910 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
3911 dev_features |= NETIF_F_IP_CSUM;
3912
3913 if (feat->offload.tx &
3914 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
3915 dev_features |= NETIF_F_IPV6_CSUM;
3916
3917 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
3918 dev_features |= NETIF_F_TSO;
3919
3920 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
3921 dev_features |= NETIF_F_TSO6;
3922
3923 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
3924 dev_features |= NETIF_F_TSO_ECN;
3925
3926 if (feat->offload.rx_supported &
3927 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
3928 dev_features |= NETIF_F_RXCSUM;
3929
3930 if (feat->offload.rx_supported &
3931 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
3932 dev_features |= NETIF_F_RXCSUM;
3933
3934 netdev->features =
3935 dev_features |
3936 NETIF_F_SG |
3937 NETIF_F_RXHASH |
3938 NETIF_F_HIGHDMA;
3939
3940 netdev->hw_features |= netdev->features;
3941 netdev->vlan_features |= netdev->features;
3942 }
3943
3944 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
3945 struct ena_com_dev_get_features_ctx *feat)
3946 {
3947 struct net_device *netdev = adapter->netdev;
3948
3949 /* Copy mac address */
3950 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
3951 eth_hw_addr_random(netdev);
3952 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
3953 } else {
3954 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
3955 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
3956 }
3957
3958 /* Set offload features */
3959 ena_set_dev_offloads(feat, netdev);
3960
3961 adapter->max_mtu = feat->dev_attr.max_mtu;
3962 netdev->max_mtu = adapter->max_mtu;
3963 netdev->min_mtu = ENA_MIN_MTU;
3964 }
3965
3966 static int ena_rss_init_default(struct ena_adapter *adapter)
3967 {
3968 struct ena_com_dev *ena_dev = adapter->ena_dev;
3969 struct device *dev = &adapter->pdev->dev;
3970 int rc, i;
3971 u32 val;
3972
3973 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
3974 if (unlikely(rc)) {
3975 dev_err(dev, "Cannot init indirect table\n");
3976 goto err_rss_init;
3977 }
3978
3979 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
3980 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues);
3981 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
3982 ENA_IO_RXQ_IDX(val));
3983 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3984 dev_err(dev, "Cannot fill indirect table\n");
3985 goto err_fill_indir;
3986 }
3987 }
3988
3989 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
3990 ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
3991 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3992 dev_err(dev, "Cannot fill hash function\n");
3993 goto err_fill_indir;
3994 }
3995
3996 rc = ena_com_set_default_hash_ctrl(ena_dev);
3997 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3998 dev_err(dev, "Cannot fill hash control\n");
3999 goto err_fill_indir;
4000 }
4001
4002 return 0;
4003
4004 err_fill_indir:
4005 ena_com_rss_destroy(ena_dev);
4006 err_rss_init:
4007
4008 return rc;
4009 }
4010
4011 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
4012 {
4013 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4014
4015 pci_release_selected_regions(pdev, release_bars);
4016 }
4017
4018 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
4019 {
4020 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
4021 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
4022 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
4023 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
4024 llq_config->llq_ring_entry_size_value = 128;
4025 }
4026
4027 static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx)
4028 {
4029 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
4030 struct ena_com_dev *ena_dev = ctx->ena_dev;
4031 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
4032 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
4033 u32 max_tx_queue_size;
4034 u32 max_rx_queue_size;
4035
4036 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
4037 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
4038 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
4039 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
4040 max_queue_ext->max_rx_sq_depth);
4041 max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
4042
4043 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4044 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4045 llq->max_llq_depth);
4046 else
4047 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4048 max_queue_ext->max_tx_sq_depth);
4049
4050 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4051 max_queue_ext->max_per_packet_tx_descs);
4052 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4053 max_queue_ext->max_per_packet_rx_descs);
4054 } else {
4055 struct ena_admin_queue_feature_desc *max_queues =
4056 &ctx->get_feat_ctx->max_queues;
4057 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
4058 max_queues->max_sq_depth);
4059 max_tx_queue_size = max_queues->max_cq_depth;
4060
4061 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
4062 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4063 llq->max_llq_depth);
4064 else
4065 max_tx_queue_size = min_t(u32, max_tx_queue_size,
4066 max_queues->max_sq_depth);
4067
4068 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4069 max_queues->max_packet_tx_descs);
4070 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
4071 max_queues->max_packet_rx_descs);
4072 }
4073
4074 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
4075 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
4076
4077 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
4078 max_tx_queue_size);
4079 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
4080 max_rx_queue_size);
4081
4082 tx_queue_size = rounddown_pow_of_two(tx_queue_size);
4083 rx_queue_size = rounddown_pow_of_two(rx_queue_size);
4084
4085 ctx->max_tx_queue_size = max_tx_queue_size;
4086 ctx->max_rx_queue_size = max_rx_queue_size;
4087 ctx->tx_queue_size = tx_queue_size;
4088 ctx->rx_queue_size = rx_queue_size;
4089
4090 return 0;
4091 }
4092
4093 /* ena_probe - Device Initialization Routine
4094 * @pdev: PCI device information struct
4095 * @ent: entry in ena_pci_tbl
4096 *
4097 * Returns 0 on success, negative on failure
4098 *
4099 * ena_probe initializes an adapter identified by a pci_dev structure.
4100 * The OS initialization, configuring of the adapter private structure,
4101 * and a hardware reset occur.
4102 */
4103 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4104 {
4105 struct ena_com_dev_get_features_ctx get_feat_ctx;
4106 struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
4107 struct ena_llq_configurations llq_config;
4108 struct ena_com_dev *ena_dev = NULL;
4109 struct ena_adapter *adapter;
4110 struct net_device *netdev;
4111 static int adapters_found;
4112 u32 max_num_io_queues;
4113 char *queue_type_str;
4114 bool wd_state;
4115 int bars, rc;
4116
4117 dev_dbg(&pdev->dev, "%s\n", __func__);
4118
4119 dev_info_once(&pdev->dev, "%s", version);
4120
4121 rc = pci_enable_device_mem(pdev);
4122 if (rc) {
4123 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
4124 return rc;
4125 }
4126
4127 pci_set_master(pdev);
4128
4129 ena_dev = vzalloc(sizeof(*ena_dev));
4130 if (!ena_dev) {
4131 rc = -ENOMEM;
4132 goto err_disable_device;
4133 }
4134
4135 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
4136 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
4137 if (rc) {
4138 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
4139 rc);
4140 goto err_free_ena_dev;
4141 }
4142
4143 ena_dev->reg_bar = devm_ioremap(&pdev->dev,
4144 pci_resource_start(pdev, ENA_REG_BAR),
4145 pci_resource_len(pdev, ENA_REG_BAR));
4146 if (!ena_dev->reg_bar) {
4147 dev_err(&pdev->dev, "failed to remap regs bar\n");
4148 rc = -EFAULT;
4149 goto err_free_region;
4150 }
4151
4152 ena_dev->dmadev = &pdev->dev;
4153
4154 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
4155 if (rc) {
4156 dev_err(&pdev->dev, "ena device init failed\n");
4157 if (rc == -ETIME)
4158 rc = -EPROBE_DEFER;
4159 goto err_free_region;
4160 }
4161
4162 set_default_llq_configurations(&llq_config);
4163
4164 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx.llq,
4165 &llq_config);
4166 if (rc) {
4167 dev_err(&pdev->dev, "ena device init failed\n");
4168 goto err_device_destroy;
4169 }
4170
4171 calc_queue_ctx.ena_dev = ena_dev;
4172 calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
4173 calc_queue_ctx.pdev = pdev;
4174
4175 /* Initial Tx and RX interrupt delay. Assumes 1 usec granularity.
4176 * Updated during device initialization with the real granularity
4177 */
4178 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
4179 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;
4180 ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;
4181 max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &get_feat_ctx);
4182 rc = ena_calc_io_queue_size(&calc_queue_ctx);
4183 if (rc || !max_num_io_queues) {
4184 rc = -EFAULT;
4185 goto err_device_destroy;
4186 }
4187
4188 /* dev zeroed in init_etherdev */
4189 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), max_num_io_queues);
4190 if (!netdev) {
4191 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
4192 rc = -ENOMEM;
4193 goto err_device_destroy;
4194 }
4195
4196 SET_NETDEV_DEV(netdev, &pdev->dev);
4197
4198 adapter = netdev_priv(netdev);
4199 pci_set_drvdata(pdev, adapter);
4200
4201 adapter->ena_dev = ena_dev;
4202 adapter->netdev = netdev;
4203 adapter->pdev = pdev;
4204
4205 ena_set_conf_feat_params(adapter, &get_feat_ctx);
4206
4207 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
4208 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
4209
4210 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size;
4211 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size;
4212 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size;
4213 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size;
4214 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
4215 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
4216
4217 adapter->num_io_queues = max_num_io_queues;
4218 adapter->max_num_io_queues = max_num_io_queues;
4219
4220 adapter->xdp_first_ring = 0;
4221 adapter->xdp_num_queues = 0;
4222
4223 adapter->last_monitored_tx_qid = 0;
4224
4225 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
4226 adapter->wd_state = wd_state;
4227
4228 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
4229
4230 rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
4231 if (rc) {
4232 dev_err(&pdev->dev,
4233 "Failed to query interrupt moderation feature\n");
4234 goto err_netdev_destroy;
4235 }
4236 ena_init_io_rings(adapter,
4237 0,
4238 adapter->xdp_num_queues +
4239 adapter->num_io_queues);
4240
4241 netdev->netdev_ops = &ena_netdev_ops;
4242 netdev->watchdog_timeo = TX_TIMEOUT;
4243 ena_set_ethtool_ops(netdev);
4244
4245 netdev->priv_flags |= IFF_UNICAST_FLT;
4246
4247 u64_stats_init(&adapter->syncp);
4248
4249 rc = ena_enable_msix_and_set_admin_interrupts(adapter);
4250 if (rc) {
4251 dev_err(&pdev->dev,
4252 "Failed to enable and set the admin interrupts\n");
4253 goto err_worker_destroy;
4254 }
4255 rc = ena_rss_init_default(adapter);
4256 if (rc && (rc != -EOPNOTSUPP)) {
4257 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
4258 goto err_free_msix;
4259 }
4260
4261 ena_config_debug_area(adapter);
4262
4263 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
4264
4265 netif_carrier_off(netdev);
4266
4267 rc = register_netdev(netdev);
4268 if (rc) {
4269 dev_err(&pdev->dev, "Cannot register net device\n");
4270 goto err_rss;
4271 }
4272
4273 INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
4274
4275 adapter->last_keep_alive_jiffies = jiffies;
4276 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
4277 adapter->missing_tx_completion_to = TX_TIMEOUT;
4278 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
4279
4280 ena_update_hints(adapter, &get_feat_ctx.hw_hints);
4281
4282 timer_setup(&adapter->timer_service, ena_timer_service, 0);
4283 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
4284
4285 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
4286 queue_type_str = "Regular";
4287 else
4288 queue_type_str = "Low Latency";
4289
4290 dev_info(&pdev->dev,
4291 "%s found at mem %lx, mac addr %pM, Placement policy: %s\n",
4292 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
4293 netdev->dev_addr, queue_type_str);
4294
4295 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
4296
4297 adapters_found++;
4298
4299 return 0;
4300
4301 err_rss:
4302 ena_com_delete_debug_area(ena_dev);
4303 ena_com_rss_destroy(ena_dev);
4304 err_free_msix:
4305 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
4306 /* stop submitting admin commands on a device that was reset */
4307 ena_com_set_admin_running_state(ena_dev, false);
4308 ena_free_mgmnt_irq(adapter);
4309 ena_disable_msix(adapter);
4310 err_worker_destroy:
4311 del_timer(&adapter->timer_service);
4312 err_netdev_destroy:
4313 free_netdev(netdev);
4314 err_device_destroy:
4315 ena_com_delete_host_info(ena_dev);
4316 ena_com_admin_destroy(ena_dev);
4317 err_free_region:
4318 ena_release_bars(ena_dev, pdev);
4319 err_free_ena_dev:
4320 vfree(ena_dev);
4321 err_disable_device:
4322 pci_disable_device(pdev);
4323 return rc;
4324 }
4325
4326 /*****************************************************************************/
4327
4328 /* ena_remove - Device Removal Routine
4329 * @pdev: PCI device information struct
4330 *
4331 * ena_remove is called by the PCI subsystem to alert the driver
4332 * that it should release a PCI device.
4333 */
4334 static void ena_remove(struct pci_dev *pdev)
4335 {
4336 struct ena_adapter *adapter = pci_get_drvdata(pdev);
4337 struct ena_com_dev *ena_dev;
4338 struct net_device *netdev;
4339
4340 ena_dev = adapter->ena_dev;
4341 netdev = adapter->netdev;
4342
4343 #ifdef CONFIG_RFS_ACCEL
4344 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
4345 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
4346 netdev->rx_cpu_rmap = NULL;
4347 }
4348 #endif /* CONFIG_RFS_ACCEL */
4349 del_timer_sync(&adapter->timer_service);
4350
4351 cancel_work_sync(&adapter->reset_task);
4352
4353 rtnl_lock();
4354 ena_destroy_device(adapter, true);
4355 rtnl_unlock();
4356
4357 unregister_netdev(netdev);
4358
4359 free_netdev(netdev);
4360
4361 ena_com_rss_destroy(ena_dev);
4362
4363 ena_com_delete_debug_area(ena_dev);
4364
4365 ena_com_delete_host_info(ena_dev);
4366
4367 ena_release_bars(ena_dev, pdev);
4368
4369 pci_disable_device(pdev);
4370
4371 vfree(ena_dev);
4372 }
4373
4374 #ifdef CONFIG_PM
4375 /* ena_suspend - PM suspend callback
4376 * @pdev: PCI device information struct
4377 * @state:power state
4378 */
4379 static int ena_suspend(struct pci_dev *pdev, pm_message_t state)
4380 {
4381 struct ena_adapter *adapter = pci_get_drvdata(pdev);
4382
4383 u64_stats_update_begin(&adapter->syncp);
4384 adapter->dev_stats.suspend++;
4385 u64_stats_update_end(&adapter->syncp);
4386
4387 rtnl_lock();
4388 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
4389 dev_err(&pdev->dev,
4390 "ignoring device reset request as the device is being suspended\n");
4391 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
4392 }
4393 ena_destroy_device(adapter, true);
4394 rtnl_unlock();
4395 return 0;
4396 }
4397
4398 /* ena_resume - PM resume callback
4399 * @pdev: PCI device information struct
4400 *
4401 */
4402 static int ena_resume(struct pci_dev *pdev)
4403 {
4404 struct ena_adapter *adapter = pci_get_drvdata(pdev);
4405 int rc;
4406
4407 u64_stats_update_begin(&adapter->syncp);
4408 adapter->dev_stats.resume++;
4409 u64_stats_update_end(&adapter->syncp);
4410
4411 rtnl_lock();
4412 rc = ena_restore_device(adapter);
4413 rtnl_unlock();
4414 return rc;
4415 }
4416 #endif
4417
4418 static struct pci_driver ena_pci_driver = {
4419 .name = DRV_MODULE_NAME,
4420 .id_table = ena_pci_tbl,
4421 .probe = ena_probe,
4422 .remove = ena_remove,
4423 #ifdef CONFIG_PM
4424 .suspend = ena_suspend,
4425 .resume = ena_resume,
4426 #endif
4427 .sriov_configure = pci_sriov_configure_simple,
4428 };
4429
4430 static int __init ena_init(void)
4431 {
4432 pr_info("%s", version);
4433
4434 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
4435 if (!ena_wq) {
4436 pr_err("Failed to create workqueue\n");
4437 return -ENOMEM;
4438 }
4439
4440 return pci_register_driver(&ena_pci_driver);
4441 }
4442
4443 static void __exit ena_cleanup(void)
4444 {
4445 pci_unregister_driver(&ena_pci_driver);
4446
4447 if (ena_wq) {
4448 destroy_workqueue(ena_wq);
4449 ena_wq = NULL;
4450 }
4451 }
4452
4453 /******************************************************************************
4454 ******************************** AENQ Handlers *******************************
4455 *****************************************************************************/
4456 /* ena_update_on_link_change:
4457 * Notify the network interface about the change in link status
4458 */
4459 static void ena_update_on_link_change(void *adapter_data,
4460 struct ena_admin_aenq_entry *aenq_e)
4461 {
4462 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4463 struct ena_admin_aenq_link_change_desc *aenq_desc =
4464 (struct ena_admin_aenq_link_change_desc *)aenq_e;
4465 int status = aenq_desc->flags &
4466 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
4467
4468 if (status) {
4469 netdev_dbg(adapter->netdev, "%s\n", __func__);
4470 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4471 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
4472 netif_carrier_on(adapter->netdev);
4473 } else {
4474 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
4475 netif_carrier_off(adapter->netdev);
4476 }
4477 }
4478
4479 static void ena_keep_alive_wd(void *adapter_data,
4480 struct ena_admin_aenq_entry *aenq_e)
4481 {
4482 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4483 struct ena_admin_aenq_keep_alive_desc *desc;
4484 u64 rx_drops;
4485
4486 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
4487 adapter->last_keep_alive_jiffies = jiffies;
4488
4489 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
4490
4491 u64_stats_update_begin(&adapter->syncp);
4492 adapter->dev_stats.rx_drops = rx_drops;
4493 u64_stats_update_end(&adapter->syncp);
4494 }
4495
4496 static void ena_notification(void *adapter_data,
4497 struct ena_admin_aenq_entry *aenq_e)
4498 {
4499 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
4500 struct ena_admin_ena_hw_hints *hints;
4501
4502 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
4503 "Invalid group(%x) expected %x\n",
4504 aenq_e->aenq_common_desc.group,
4505 ENA_ADMIN_NOTIFICATION);
4506
4507 switch (aenq_e->aenq_common_desc.syndrom) {
4508 case ENA_ADMIN_UPDATE_HINTS:
4509 hints = (struct ena_admin_ena_hw_hints *)
4510 (&aenq_e->inline_data_w4);
4511 ena_update_hints(adapter, hints);
4512 break;
4513 default:
4514 netif_err(adapter, drv, adapter->netdev,
4515 "Invalid aenq notification link state %d\n",
4516 aenq_e->aenq_common_desc.syndrom);
4517 }
4518 }
4519
4520 /* This handler will called for unknown event group or unimplemented handlers*/
4521 static void unimplemented_aenq_handler(void *data,
4522 struct ena_admin_aenq_entry *aenq_e)
4523 {
4524 struct ena_adapter *adapter = (struct ena_adapter *)data;
4525
4526 netif_err(adapter, drv, adapter->netdev,
4527 "Unknown event was received or event with unimplemented handler\n");
4528 }
4529
4530 static struct ena_aenq_handlers aenq_handlers = {
4531 .handlers = {
4532 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
4533 [ENA_ADMIN_NOTIFICATION] = ena_notification,
4534 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
4535 },
4536 .unimplemented_handler = unimplemented_aenq_handler
4537 };
4538
4539 module_init(ena_init);
4540 module_exit(ena_cleanup);
Linux with added FPC-III support