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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / net / ethernet / qlogic / qed / qed_dcbx.c
blob5c6a276f69ac467cfcdb5e5c59b911ca1564d925
1 /* QLogic qed NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <linux/types.h>
34 #include <asm/byteorder.h>
35 #include <linux/bitops.h>
36 #include <linux/dcbnl.h>
37 #include <linux/errno.h>
38 #include <linux/kernel.h>
39 #include <linux/slab.h>
40 #include <linux/string.h>
41 #include "qed.h"
42 #include "qed_cxt.h"
43 #include "qed_dcbx.h"
44 #include "qed_hsi.h"
45 #include "qed_sp.h"
46 #include "qed_sriov.h"
47 #include "qed_rdma.h"
48 #ifdef CONFIG_DCB
49 #include <linux/qed/qed_eth_if.h>
50 #endif
51
52 #define QED_DCBX_MAX_MIB_READ_TRY (100)
53 #define QED_ETH_TYPE_DEFAULT (0)
54 #define QED_ETH_TYPE_ROCE (0x8915)
55 #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7)
56 #define QED_ETH_TYPE_FCOE (0x8906)
57 #define QED_TCP_PORT_ISCSI (0xCBC)
58
59 #define QED_DCBX_INVALID_PRIORITY 0xFF
60
61 /* Get Traffic Class from priority traffic class table, 4 bits represent
62 * the traffic class corresponding to the priority.
63 */
64 #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \
65 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
66
67 static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = {
68 {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI},
69 {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE},
70 {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE},
71 {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE},
72 {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH},
73 };
74
75 static bool qed_dcbx_app_ethtype(u32 app_info_bitmap)
76 {
77 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
78 DCBX_APP_SF_ETHTYPE);
79 }
80
81 static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
82 {
83 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
84
85 /* Old MFW */
86 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
87 return qed_dcbx_app_ethtype(app_info_bitmap);
88
89 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
90 }
91
92 static bool qed_dcbx_app_port(u32 app_info_bitmap)
93 {
94 return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
95 DCBX_APP_SF_PORT);
96 }
97
98 static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
99 {
100 u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
101
102 /* Old MFW */
103 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
104 return qed_dcbx_app_port(app_info_bitmap);
105
106 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
107 }
108
109 static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
110 {
111 bool ethtype;
112
113 if (ieee)
114 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
115 else
116 ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
117
118 return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT));
119 }
120
121 static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
122 {
123 bool port;
124
125 if (ieee)
126 port = qed_dcbx_ieee_app_port(app_info_bitmap,
127 DCBX_APP_SF_IEEE_TCP_PORT);
128 else
129 port = qed_dcbx_app_port(app_info_bitmap);
130
131 return !!(port && (proto_id == QED_TCP_PORT_ISCSI));
132 }
133
134 static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
135 {
136 bool ethtype;
137
138 if (ieee)
139 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
140 else
141 ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
142
143 return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE));
144 }
145
146 static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
147 {
148 bool ethtype;
149
150 if (ieee)
151 ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
152 else
153 ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
154
155 return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE));
156 }
157
158 static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
159 {
160 bool port;
161
162 if (ieee)
163 port = qed_dcbx_ieee_app_port(app_info_bitmap,
164 DCBX_APP_SF_IEEE_UDP_PORT);
165 else
166 port = qed_dcbx_app_port(app_info_bitmap);
167
168 return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2));
169 }
170
171 static void
172 qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data)
173 {
174 enum dcbx_protocol_type id;
175 int i;
176
177 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n",
178 p_data->dcbx_enabled);
179
180 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) {
181 id = qed_dcbx_app_update[i].id;
182
183 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
184 "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n",
185 qed_dcbx_app_update[i].name, p_data->arr[id].update,
186 p_data->arr[id].enable, p_data->arr[id].priority,
187 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc);
188 }
189 }
190
191 static void
192 qed_dcbx_set_params(struct qed_dcbx_results *p_data,
193 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
194 bool app_tlv, bool enable, u8 prio, u8 tc,
195 enum dcbx_protocol_type type,
196 enum qed_pci_personality personality)
197 {
198 /* PF update ramrod data */
199 p_data->arr[type].enable = enable;
200 p_data->arr[type].priority = prio;
201 p_data->arr[type].tc = tc;
202 if (enable)
203 p_data->arr[type].update = UPDATE_DCB;
204 else
205 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP;
206
207 if (test_bit(QED_MF_DONT_ADD_VLAN0_TAG, &p_hwfn->cdev->mf_bits))
208 p_data->arr[type].dont_add_vlan0 = true;
209
210 /* QM reconf data */
211 if (app_tlv && p_hwfn->hw_info.personality == personality)
212 qed_hw_info_set_offload_tc(&p_hwfn->hw_info, tc);
213
214 /* Configure dcbx vlan priority in doorbell block for roce EDPM */
215 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
216 type == DCBX_PROTOCOL_ROCE) {
217 qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);
218 qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1);
219 }
220 }
221
222 /* Update app protocol data and hw_info fields with the TLV info */
223 static void
224 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data,
225 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
226 bool app_tlv, bool enable, u8 prio, u8 tc,
227 enum dcbx_protocol_type type)
228 {
229 enum qed_pci_personality personality;
230 enum dcbx_protocol_type id;
231 int i;
232
233 for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) {
234 id = qed_dcbx_app_update[i].id;
235
236 if (type != id)
237 continue;
238
239 personality = qed_dcbx_app_update[i].personality;
240
241 qed_dcbx_set_params(p_data, p_hwfn, p_ptt, app_tlv, enable,
242 prio, tc, type, personality);
243 }
244 }
245
246 static bool
247 qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn,
248 u32 app_prio_bitmap,
249 u16 id, enum dcbx_protocol_type *type, bool ieee)
250 {
251 if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) {
252 *type = DCBX_PROTOCOL_FCOE;
253 } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) {
254 *type = DCBX_PROTOCOL_ROCE;
255 } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) {
256 *type = DCBX_PROTOCOL_ISCSI;
257 } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
258 *type = DCBX_PROTOCOL_ETH;
259 } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) {
260 *type = DCBX_PROTOCOL_ROCE_V2;
261 } else {
262 *type = DCBX_MAX_PROTOCOL_TYPE;
263 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
264 "No action required, App TLV entry = 0x%x\n",
265 app_prio_bitmap);
266 return false;
267 }
268
269 return true;
270 }
271
272 /* Parse app TLV's to update TC information in hw_info structure for
273 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
274 */
275 static int
276 qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
277 struct qed_dcbx_results *p_data,
278 struct dcbx_app_priority_entry *p_tbl,
279 u32 pri_tc_tbl, int count, u8 dcbx_version)
280 {
281 enum dcbx_protocol_type type;
282 bool enable, ieee, eth_tlv;
283 u8 tc, priority_map;
284 u16 protocol_id;
285 int priority;
286 int i;
287
288 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count);
289
290 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
291 eth_tlv = false;
292 /* Parse APP TLV */
293 for (i = 0; i < count; i++) {
294 protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry,
295 DCBX_APP_PROTOCOL_ID);
296 priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry,
297 DCBX_APP_PRI_MAP);
298 priority = ffs(priority_map) - 1;
299 if (priority < 0) {
300 DP_ERR(p_hwfn, "Invalid priority\n");
301 return -EINVAL;
302 }
303
304 tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority);
305 if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
306 protocol_id, &type, ieee)) {
307 /* ETH always have the enable bit reset, as it gets
308 * vlan information per packet. For other protocols,
309 * should be set according to the dcbx_enabled
310 * indication, but we only got here if there was an
311 * app tlv for the protocol, so dcbx must be enabled.
312 */
313 if (type == DCBX_PROTOCOL_ETH) {
314 enable = false;
315 eth_tlv = true;
316 } else {
317 enable = true;
318 }
319
320 qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, true,
321 enable, priority, tc, type);
322 }
323 }
324
325 /* If Eth TLV is not detected, use UFP TC as default TC */
326 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) && !eth_tlv)
327 p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc;
328
329 /* Update ramrod protocol data and hw_info fields
330 * with default info when corresponding APP TLV's are not detected.
331 * The enabled field has a different logic for ethernet as only for
332 * ethernet dcb should disabled by default, as the information arrives
333 * from the OS (unless an explicit app tlv was present).
334 */
335 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
336 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
337 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
338 if (p_data->arr[type].update)
339 continue;
340
341 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
342 qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, false, enable,
343 priority, tc, type);
344 }
345
346 return 0;
347 }
348
349 /* Parse app TLV's to update TC information in hw_info structure for
350 * reconfiguring QM. Get protocol specific data for PF update ramrod command.
351 */
352 static int
353 qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
354 {
355 struct dcbx_app_priority_feature *p_app;
356 struct dcbx_app_priority_entry *p_tbl;
357 struct qed_dcbx_results data = { 0 };
358 struct dcbx_ets_feature *p_ets;
359 struct qed_hw_info *p_info;
360 u32 pri_tc_tbl, flags;
361 u8 dcbx_version;
362 int num_entries;
363 int rc = 0;
364
365 flags = p_hwfn->p_dcbx_info->operational.flags;
366 dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION);
367
368 p_app = &p_hwfn->p_dcbx_info->operational.features.app;
369 p_tbl = p_app->app_pri_tbl;
370
371 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
372 pri_tc_tbl = p_ets->pri_tc_tbl[0];
373
374 p_info = &p_hwfn->hw_info;
375 num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
376
377 rc = qed_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl,
378 num_entries, dcbx_version);
379 if (rc)
380 return rc;
381
382 p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags,
383 DCBX_ETS_MAX_TCS);
384 p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC);
385 data.pf_id = p_hwfn->rel_pf_id;
386 data.dcbx_enabled = !!dcbx_version;
387
388 qed_dcbx_dp_protocol(p_hwfn, &data);
389
390 memcpy(&p_hwfn->p_dcbx_info->results, &data,
391 sizeof(struct qed_dcbx_results));
392
393 return 0;
394 }
395
396 static int
397 qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn,
398 struct qed_ptt *p_ptt,
399 struct qed_dcbx_mib_meta_data *p_data,
400 enum qed_mib_read_type type)
401 {
402 u32 prefix_seq_num, suffix_seq_num;
403 int read_count = 0;
404 int rc = 0;
405
406 /* The data is considered to be valid only if both sequence numbers are
407 * the same.
408 */
409 do {
410 if (type == QED_DCBX_REMOTE_LLDP_MIB) {
411 qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
412 p_data->addr, p_data->size);
413 prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
414 suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
415 } else {
416 qed_memcpy_from(p_hwfn, p_ptt, p_data->mib,
417 p_data->addr, p_data->size);
418 prefix_seq_num = p_data->mib->prefix_seq_num;
419 suffix_seq_num = p_data->mib->suffix_seq_num;
420 }
421 read_count++;
422
423 DP_VERBOSE(p_hwfn,
424 QED_MSG_DCB,
425 "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
426 type, read_count, prefix_seq_num, suffix_seq_num);
427 } while ((prefix_seq_num != suffix_seq_num) &&
428 (read_count < QED_DCBX_MAX_MIB_READ_TRY));
429
430 if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) {
431 DP_ERR(p_hwfn,
432 "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
433 type, read_count, prefix_seq_num, suffix_seq_num);
434 rc = -EIO;
435 }
436
437 return rc;
438 }
439
440 static void
441 qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn,
442 struct qed_dcbx_app_prio *p_prio,
443 struct qed_dcbx_results *p_results)
444 {
445 u8 val;
446
447 p_prio->roce = QED_DCBX_INVALID_PRIORITY;
448 p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY;
449 p_prio->iscsi = QED_DCBX_INVALID_PRIORITY;
450 p_prio->fcoe = QED_DCBX_INVALID_PRIORITY;
451
452 if (p_results->arr[DCBX_PROTOCOL_ROCE].update &&
453 p_results->arr[DCBX_PROTOCOL_ROCE].enable)
454 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority;
455
456 if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update &&
457 p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) {
458 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority;
459 p_prio->roce_v2 = val;
460 }
461
462 if (p_results->arr[DCBX_PROTOCOL_ISCSI].update &&
463 p_results->arr[DCBX_PROTOCOL_ISCSI].enable)
464 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority;
465
466 if (p_results->arr[DCBX_PROTOCOL_FCOE].update &&
467 p_results->arr[DCBX_PROTOCOL_FCOE].enable)
468 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority;
469
470 if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
471 p_results->arr[DCBX_PROTOCOL_ETH].enable)
472 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
473
474 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
475 "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n",
476 p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe,
477 p_prio->eth);
478 }
479
480 static void
481 qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn,
482 struct dcbx_app_priority_feature *p_app,
483 struct dcbx_app_priority_entry *p_tbl,
484 struct qed_dcbx_params *p_params, bool ieee)
485 {
486 struct qed_app_entry *entry;
487 u8 pri_map;
488 int i;
489
490 p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags,
491 DCBX_APP_WILLING);
492 p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED);
493 p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR);
494 p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags,
495 DCBX_APP_NUM_ENTRIES);
496 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
497 entry = &p_params->app_entry[i];
498 if (ieee) {
499 u8 sf_ieee;
500 u32 val;
501
502 sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry,
503 DCBX_APP_SF_IEEE);
504 switch (sf_ieee) {
505 case DCBX_APP_SF_IEEE_RESERVED:
506 /* Old MFW */
507 val = QED_MFW_GET_FIELD(p_tbl[i].entry,
508 DCBX_APP_SF);
509 entry->sf_ieee = val ?
510 QED_DCBX_SF_IEEE_TCP_UDP_PORT :
511 QED_DCBX_SF_IEEE_ETHTYPE;
512 break;
513 case DCBX_APP_SF_IEEE_ETHTYPE:
514 entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE;
515 break;
516 case DCBX_APP_SF_IEEE_TCP_PORT:
517 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT;
518 break;
519 case DCBX_APP_SF_IEEE_UDP_PORT:
520 entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT;
521 break;
522 case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
523 entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT;
524 break;
525 }
526 } else {
527 entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry,
528 DCBX_APP_SF));
529 }
530
531 pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
532 entry->prio = ffs(pri_map) - 1;
533 entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry,
534 DCBX_APP_PROTOCOL_ID);
535 qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
536 entry->proto_id,
537 &entry->proto_type, ieee);
538 }
539
540 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
541 "APP params: willing %d, valid %d error = %d\n",
542 p_params->app_willing, p_params->app_valid,
543 p_params->app_error);
544 }
545
546 static void
547 qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn,
548 u32 pfc, struct qed_dcbx_params *p_params)
549 {
550 u8 pfc_map;
551
552 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING);
553 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS);
554 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED);
555 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
556 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
557 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
558 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
559 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
560 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
561 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
562 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
563 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
564
565 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
566 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n",
567 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc,
568 p_params->pfc.enabled);
569 }
570
571 static void
572 qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn,
573 struct dcbx_ets_feature *p_ets,
574 struct qed_dcbx_params *p_params)
575 {
576 u32 bw_map[2], tsa_map[2], pri_map;
577 int i;
578
579 p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags,
580 DCBX_ETS_WILLING);
581 p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags,
582 DCBX_ETS_ENABLED);
583 p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS);
584 p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags,
585 DCBX_ETS_MAX_TCS);
586 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
587 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
588 p_params->ets_willing, p_params->ets_enabled,
589 p_params->ets_cbs, p_ets->pri_tc_tbl[0],
590 p_params->max_ets_tc);
591
592 if (p_params->ets_enabled && !p_params->max_ets_tc) {
593 p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES;
594 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
595 "ETS params: max_ets_tc is forced to %d\n",
596 p_params->max_ets_tc);
597 }
598
599 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
600 * encoded in a type u32 array of size 2.
601 */
602 bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]);
603 bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]);
604 tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]);
605 tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]);
606 pri_map = p_ets->pri_tc_tbl[0];
607 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
608 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
609 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
610 p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i);
611 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
612 "elem %d bw_tbl %x tsa_tbl %x\n",
613 i, p_params->ets_tc_bw_tbl[i],
614 p_params->ets_tc_tsa_tbl[i]);
615 }
616 }
617
618 static void
619 qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn,
620 struct dcbx_app_priority_feature *p_app,
621 struct dcbx_app_priority_entry *p_tbl,
622 struct dcbx_ets_feature *p_ets,
623 u32 pfc, struct qed_dcbx_params *p_params, bool ieee)
624 {
625 qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
626 qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
627 qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
628 }
629
630 static void
631 qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params)
632 {
633 struct dcbx_features *p_feat;
634
635 p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
636 qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
637 p_feat->app.app_pri_tbl, &p_feat->ets,
638 p_feat->pfc, &params->local.params, false);
639 params->local.valid = true;
640 }
641
642 static void
643 qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params)
644 {
645 struct dcbx_features *p_feat;
646
647 p_feat = &p_hwfn->p_dcbx_info->remote.features;
648 qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
649 p_feat->app.app_pri_tbl, &p_feat->ets,
650 p_feat->pfc, &params->remote.params, false);
651 params->remote.valid = true;
652 }
653
654 static void
655 qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn,
656 struct qed_dcbx_get *params)
657 {
658 struct qed_dcbx_operational_params *p_operational;
659 struct qed_dcbx_results *p_results;
660 struct dcbx_features *p_feat;
661 bool enabled, err;
662 u32 flags;
663 bool val;
664
665 flags = p_hwfn->p_dcbx_info->operational.flags;
666
667 /* If DCBx version is non zero, then negotiation
668 * was successfuly performed
669 */
670 p_operational = &params->operational;
671 enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) !=
672 DCBX_CONFIG_VERSION_DISABLED);
673 if (!enabled) {
674 p_operational->enabled = enabled;
675 p_operational->valid = false;
676 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n");
677 return;
678 }
679
680 p_feat = &p_hwfn->p_dcbx_info->operational.features;
681 p_results = &p_hwfn->p_dcbx_info->results;
682
683 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
684 DCBX_CONFIG_VERSION_IEEE);
685 p_operational->ieee = val;
686 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
687 DCBX_CONFIG_VERSION_CEE);
688 p_operational->cee = val;
689
690 val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
691 DCBX_CONFIG_VERSION_STATIC);
692 p_operational->local = val;
693
694 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
695 "Version support: ieee %d, cee %d, static %d\n",
696 p_operational->ieee, p_operational->cee,
697 p_operational->local);
698
699 qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
700 p_feat->app.app_pri_tbl, &p_feat->ets,
701 p_feat->pfc, &params->operational.params,
702 p_operational->ieee);
703 qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results);
704 err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
705 p_operational->err = err;
706 p_operational->enabled = enabled;
707 p_operational->valid = true;
708 }
709
710 static void
711 qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn,
712 struct qed_dcbx_get *params)
713 {
714 struct lldp_config_params_s *p_local;
715
716 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
717
718 memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id,
719 sizeof(p_local->local_chassis_id));
720 memcpy(params->lldp_local.local_port_id, p_local->local_port_id,
721 sizeof(p_local->local_port_id));
722 }
723
724 static void
725 qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn,
726 struct qed_dcbx_get *params)
727 {
728 struct lldp_status_params_s *p_remote;
729
730 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
731
732 memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id,
733 sizeof(p_remote->peer_chassis_id));
734 memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
735 sizeof(p_remote->peer_port_id));
736 }
737
738 static int
739 qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params,
740 enum qed_mib_read_type type)
741 {
742 switch (type) {
743 case QED_DCBX_REMOTE_MIB:
744 qed_dcbx_get_remote_params(p_hwfn, p_params);
745 break;
746 case QED_DCBX_LOCAL_MIB:
747 qed_dcbx_get_local_params(p_hwfn, p_params);
748 break;
749 case QED_DCBX_OPERATIONAL_MIB:
750 qed_dcbx_get_operational_params(p_hwfn, p_params);
751 break;
752 case QED_DCBX_REMOTE_LLDP_MIB:
753 qed_dcbx_get_remote_lldp_params(p_hwfn, p_params);
754 break;
755 case QED_DCBX_LOCAL_LLDP_MIB:
756 qed_dcbx_get_local_lldp_params(p_hwfn, p_params);
757 break;
758 default:
759 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
760 return -EINVAL;
761 }
762
763 return 0;
764 }
765
766 static int
767 qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
768 {
769 struct qed_dcbx_mib_meta_data data;
770 int rc = 0;
771
772 memset(&data, 0, sizeof(data));
773 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
774 lldp_config_params);
775 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
776 data.size = sizeof(struct lldp_config_params_s);
777 qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
778
779 return rc;
780 }
781
782 static int
783 qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn,
784 struct qed_ptt *p_ptt,
785 enum qed_mib_read_type type)
786 {
787 struct qed_dcbx_mib_meta_data data;
788 int rc = 0;
789
790 memset(&data, 0, sizeof(data));
791 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
792 lldp_status_params);
793 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
794 data.size = sizeof(struct lldp_status_params_s);
795 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
796
797 return rc;
798 }
799
800 static int
801 qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn,
802 struct qed_ptt *p_ptt,
803 enum qed_mib_read_type type)
804 {
805 struct qed_dcbx_mib_meta_data data;
806 int rc = 0;
807
808 memset(&data, 0, sizeof(data));
809 data.addr = p_hwfn->mcp_info->port_addr +
810 offsetof(struct public_port, operational_dcbx_mib);
811 data.mib = &p_hwfn->p_dcbx_info->operational;
812 data.size = sizeof(struct dcbx_mib);
813 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
814
815 return rc;
816 }
817
818 static int
819 qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn,
820 struct qed_ptt *p_ptt, enum qed_mib_read_type type)
821 {
822 struct qed_dcbx_mib_meta_data data;
823 int rc = 0;
824
825 memset(&data, 0, sizeof(data));
826 data.addr = p_hwfn->mcp_info->port_addr +
827 offsetof(struct public_port, remote_dcbx_mib);
828 data.mib = &p_hwfn->p_dcbx_info->remote;
829 data.size = sizeof(struct dcbx_mib);
830 rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
831
832 return rc;
833 }
834
835 static int
836 qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
837 {
838 struct qed_dcbx_mib_meta_data data;
839 int rc = 0;
840
841 memset(&data, 0, sizeof(data));
842 data.addr = p_hwfn->mcp_info->port_addr +
843 offsetof(struct public_port, local_admin_dcbx_mib);
844 data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
845 data.size = sizeof(struct dcbx_local_params);
846 qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size);
847
848 return rc;
849 }
850
851 static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn,
852 struct qed_ptt *p_ptt, enum qed_mib_read_type type)
853 {
854 int rc = -EINVAL;
855
856 switch (type) {
857 case QED_DCBX_OPERATIONAL_MIB:
858 rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
859 break;
860 case QED_DCBX_REMOTE_MIB:
861 rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
862 break;
863 case QED_DCBX_LOCAL_MIB:
864 rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt);
865 break;
866 case QED_DCBX_REMOTE_LLDP_MIB:
867 rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
868 break;
869 case QED_DCBX_LOCAL_LLDP_MIB:
870 rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
871 break;
872 default:
873 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
874 }
875
876 return rc;
877 }
878
879 static void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type)
880 {
881 struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common;
882 void *cookie = hwfn->cdev->ops_cookie;
883
884 if (cookie && op->dcbx_aen)
885 op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type);
886 }
887
888 /* Read updated MIB.
889 * Reconfigure QM and invoke PF update ramrod command if operational MIB
890 * change is detected.
891 */
892 int
893 qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn,
894 struct qed_ptt *p_ptt, enum qed_mib_read_type type)
895 {
896 int rc = 0;
897
898 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type);
899 if (rc)
900 return rc;
901
902 if (type == QED_DCBX_OPERATIONAL_MIB) {
903 rc = qed_dcbx_process_mib_info(p_hwfn, p_ptt);
904 if (!rc) {
905 /* reconfigure tcs of QM queues according
906 * to negotiation results
907 */
908 qed_qm_reconf(p_hwfn, p_ptt);
909
910 /* update storm FW with negotiation results */
911 qed_sp_pf_update(p_hwfn);
912
913 /* for roce PFs, we may want to enable/disable DPM
914 * when DCBx change occurs
915 */
916 if (p_hwfn->hw_info.personality ==
917 QED_PCI_ETH_ROCE)
918 qed_roce_dpm_dcbx(p_hwfn, p_ptt);
919 }
920 }
921
922 qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type);
923
924 if (type == QED_DCBX_OPERATIONAL_MIB) {
925 struct qed_dcbx_results *p_data;
926 u16 val;
927
928 /* Configure in NIG which protocols support EDPM and should
929 * honor PFC.
930 */
931 p_data = &p_hwfn->p_dcbx_info->results;
932 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) |
933 (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc);
934 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT;
935 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN;
936 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);
937 }
938
939 qed_dcbx_aen(p_hwfn, type);
940
941 return rc;
942 }
943
944 int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn)
945 {
946 p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL);
947 if (!p_hwfn->p_dcbx_info)
948 return -ENOMEM;
949
950 return 0;
951 }
952
953 void qed_dcbx_info_free(struct qed_hwfn *p_hwfn)
954 {
955 kfree(p_hwfn->p_dcbx_info);
956 p_hwfn->p_dcbx_info = NULL;
957 }
958
959 static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
960 struct qed_dcbx_results *p_src,
961 enum dcbx_protocol_type type)
962 {
963 p_data->dcb_enable_flag = p_src->arr[type].enable;
964 p_data->dcb_priority = p_src->arr[type].priority;
965 p_data->dcb_tc = p_src->arr[type].tc;
966 p_data->dcb_dont_add_vlan0 = p_src->arr[type].dont_add_vlan0;
967 }
968
969 /* Set pf update ramrod command params */
970 void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src,
971 struct pf_update_ramrod_data *p_dest)
972 {
973 struct protocol_dcb_data *p_dcb_data;
974 u8 update_flag;
975
976 update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update;
977 p_dest->update_fcoe_dcb_data_mode = update_flag;
978
979 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update;
980 p_dest->update_roce_dcb_data_mode = update_flag;
981
982 update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update;
983 p_dest->update_rroce_dcb_data_mode = update_flag;
984
985 update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update;
986 p_dest->update_iscsi_dcb_data_mode = update_flag;
987 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
988 p_dest->update_eth_dcb_data_mode = update_flag;
989
990 p_dcb_data = &p_dest->fcoe_dcb_data;
991 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE);
992 p_dcb_data = &p_dest->roce_dcb_data;
993 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE);
994 p_dcb_data = &p_dest->rroce_dcb_data;
995 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2);
996 p_dcb_data = &p_dest->iscsi_dcb_data;
997 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI);
998 p_dcb_data = &p_dest->eth_dcb_data;
999 qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
1000 }
1001
1002 u8 qed_dcbx_get_priority_tc(struct qed_hwfn *p_hwfn, u8 pri)
1003 {
1004 struct qed_dcbx_get *dcbx_info = &p_hwfn->p_dcbx_info->get;
1005
1006 if (pri >= QED_MAX_PFC_PRIORITIES) {
1007 DP_ERR(p_hwfn, "Invalid priority %d\n", pri);
1008 return QED_DCBX_DEFAULT_TC;
1009 }
1010
1011 if (!dcbx_info->operational.valid) {
1012 DP_VERBOSE(p_hwfn, QED_MSG_DCB,
1013 "Dcbx parameters not available\n");
1014 return QED_DCBX_DEFAULT_TC;
1015 }
1016
1017 return dcbx_info->operational.params.ets_pri_tc_tbl[pri];
1018 }
1019
1020 #ifdef CONFIG_DCB
1021 static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn,
1022 struct qed_dcbx_get *p_get,
1023 enum qed_mib_read_type type)
1024 {
1025 struct qed_ptt *p_ptt;
1026 int rc;
1027
1028 if (IS_VF(p_hwfn->cdev))
1029 return -EINVAL;
1030
1031 p_ptt = qed_ptt_acquire(p_hwfn);
1032 if (!p_ptt)
1033 return -EBUSY;
1034
1035 rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type);
1036 if (rc)
1037 goto out;
1038
1039 rc = qed_dcbx_get_params(p_hwfn, p_get, type);
1040
1041 out:
1042 qed_ptt_release(p_hwfn, p_ptt);
1043 return rc;
1044 }
1045
1046 static void
1047 qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn,
1048 u32 *pfc, struct qed_dcbx_params *p_params)
1049 {
1050 u8 pfc_map = 0;
1051 int i;
1052
1053 *pfc &= ~DCBX_PFC_ERROR_MASK;
1054
1055 if (p_params->pfc.willing)
1056 *pfc |= DCBX_PFC_WILLING_MASK;
1057 else
1058 *pfc &= ~DCBX_PFC_WILLING_MASK;
1059
1060 if (p_params->pfc.enabled)
1061 *pfc |= DCBX_PFC_ENABLED_MASK;
1062 else
1063 *pfc &= ~DCBX_PFC_ENABLED_MASK;
1064
1065 *pfc &= ~DCBX_PFC_CAPS_MASK;
1066 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT;
1067
1068 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
1069 if (p_params->pfc.prio[i])
1070 pfc_map |= BIT(i);
1071
1072 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
1073 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT);
1074
1075 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc);
1076 }
1077
1078 static void
1079 qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn,
1080 struct dcbx_ets_feature *p_ets,
1081 struct qed_dcbx_params *p_params)
1082 {
1083 u8 *bw_map, *tsa_map;
1084 u32 val;
1085 int i;
1086
1087 if (p_params->ets_willing)
1088 p_ets->flags |= DCBX_ETS_WILLING_MASK;
1089 else
1090 p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
1091
1092 if (p_params->ets_cbs)
1093 p_ets->flags |= DCBX_ETS_CBS_MASK;
1094 else
1095 p_ets->flags &= ~DCBX_ETS_CBS_MASK;
1096
1097 if (p_params->ets_enabled)
1098 p_ets->flags |= DCBX_ETS_ENABLED_MASK;
1099 else
1100 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
1101
1102 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
1103 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT;
1104
1105 bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
1106 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
1107 p_ets->pri_tc_tbl[0] = 0;
1108 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
1109 bw_map[i] = p_params->ets_tc_bw_tbl[i];
1110 tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
1111 /* Copy the priority value to the corresponding 4 bits in the
1112 * traffic class table.
1113 */
1114 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
1115 p_ets->pri_tc_tbl[0] |= val;
1116 }
1117 for (i = 0; i < 2; i++) {
1118 p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]);
1119 p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]);
1120 }
1121 }
1122
1123 static void
1124 qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn,
1125 struct dcbx_app_priority_feature *p_app,
1126 struct qed_dcbx_params *p_params, bool ieee)
1127 {
1128 u32 *entry;
1129 int i;
1130
1131 if (p_params->app_willing)
1132 p_app->flags |= DCBX_APP_WILLING_MASK;
1133 else
1134 p_app->flags &= ~DCBX_APP_WILLING_MASK;
1135
1136 if (p_params->app_valid)
1137 p_app->flags |= DCBX_APP_ENABLED_MASK;
1138 else
1139 p_app->flags &= ~DCBX_APP_ENABLED_MASK;
1140
1141 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
1142 p_app->flags |= (u32)p_params->num_app_entries <<
1143 DCBX_APP_NUM_ENTRIES_SHIFT;
1144
1145 for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
1146 entry = &p_app->app_pri_tbl[i].entry;
1147 *entry = 0;
1148 if (ieee) {
1149 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
1150 switch (p_params->app_entry[i].sf_ieee) {
1151 case QED_DCBX_SF_IEEE_ETHTYPE:
1152 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
1153 DCBX_APP_SF_IEEE_SHIFT);
1154 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1155 DCBX_APP_SF_SHIFT);
1156 break;
1157 case QED_DCBX_SF_IEEE_TCP_PORT:
1158 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
1159 DCBX_APP_SF_IEEE_SHIFT);
1160 *entry |= ((u32)DCBX_APP_SF_PORT <<
1161 DCBX_APP_SF_SHIFT);
1162 break;
1163 case QED_DCBX_SF_IEEE_UDP_PORT:
1164 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
1165 DCBX_APP_SF_IEEE_SHIFT);
1166 *entry |= ((u32)DCBX_APP_SF_PORT <<
1167 DCBX_APP_SF_SHIFT);
1168 break;
1169 case QED_DCBX_SF_IEEE_TCP_UDP_PORT:
1170 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
1171 DCBX_APP_SF_IEEE_SHIFT);
1172 *entry |= ((u32)DCBX_APP_SF_PORT <<
1173 DCBX_APP_SF_SHIFT);
1174 break;
1175 }
1176 } else {
1177 *entry &= ~DCBX_APP_SF_MASK;
1178 if (p_params->app_entry[i].ethtype)
1179 *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
1180 DCBX_APP_SF_SHIFT);
1181 else
1182 *entry |= ((u32)DCBX_APP_SF_PORT <<
1183 DCBX_APP_SF_SHIFT);
1184 }
1185
1186 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
1187 *entry |= ((u32)p_params->app_entry[i].proto_id <<
1188 DCBX_APP_PROTOCOL_ID_SHIFT);
1189 *entry &= ~DCBX_APP_PRI_MAP_MASK;
1190 *entry |= ((u32)(p_params->app_entry[i].prio) <<
1191 DCBX_APP_PRI_MAP_SHIFT);
1192 }
1193 }
1194
1195 static void
1196 qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn,
1197 struct dcbx_local_params *local_admin,
1198 struct qed_dcbx_set *params)
1199 {
1200 bool ieee = false;
1201
1202 local_admin->flags = 0;
1203 memcpy(&local_admin->features,
1204 &p_hwfn->p_dcbx_info->operational.features,
1205 sizeof(local_admin->features));
1206
1207 if (params->enabled) {
1208 local_admin->config = params->ver_num;
1209 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
1210 } else {
1211 local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
1212 }
1213
1214 DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n",
1215 local_admin->config);
1216
1217 if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG)
1218 qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
1219 &params->config.params);
1220
1221 if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG)
1222 qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
1223 &params->config.params);
1224
1225 if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG)
1226 qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
1227 &params->config.params, ieee);
1228 }
1229
1230 int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
1231 struct qed_dcbx_set *params, bool hw_commit)
1232 {
1233 struct dcbx_local_params local_admin;
1234 struct qed_dcbx_mib_meta_data data;
1235 u32 resp = 0, param = 0;
1236 int rc = 0;
1237
1238 if (!hw_commit) {
1239 memcpy(&p_hwfn->p_dcbx_info->set, params,
1240 sizeof(struct qed_dcbx_set));
1241 return 0;
1242 }
1243
1244 /* clear set-parmas cache */
1245 memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set));
1246
1247 memset(&local_admin, 0, sizeof(local_admin));
1248 qed_dcbx_set_local_params(p_hwfn, &local_admin, params);
1249
1250 data.addr = p_hwfn->mcp_info->port_addr +
1251 offsetof(struct public_port, local_admin_dcbx_mib);
1252 data.local_admin = &local_admin;
1253 data.size = sizeof(struct dcbx_local_params);
1254 qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
1255
1256 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
1257 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, &param);
1258 if (rc)
1259 DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n");
1260
1261 return rc;
1262 }
1263
1264 int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn,
1265 struct qed_dcbx_set *params)
1266 {
1267 struct qed_dcbx_get *dcbx_info;
1268 int rc;
1269
1270 if (p_hwfn->p_dcbx_info->set.config.valid) {
1271 memcpy(params, &p_hwfn->p_dcbx_info->set,
1272 sizeof(struct qed_dcbx_set));
1273 return 0;
1274 }
1275
1276 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL);
1277 if (!dcbx_info)
1278 return -ENOMEM;
1279
1280 rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB);
1281 if (rc) {
1282 kfree(dcbx_info);
1283 return rc;
1284 }
1285
1286 p_hwfn->p_dcbx_info->set.override_flags = 0;
1287 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
1288 if (dcbx_info->operational.cee)
1289 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1290 if (dcbx_info->operational.ieee)
1291 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1292 if (dcbx_info->operational.local)
1293 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
1294
1295 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
1296 memcpy(&p_hwfn->p_dcbx_info->set.config.params,
1297 &dcbx_info->operational.params,
1298 sizeof(struct qed_dcbx_admin_params));
1299 p_hwfn->p_dcbx_info->set.config.valid = true;
1300
1301 memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set));
1302
1303 kfree(dcbx_info);
1304
1305 return 0;
1306 }
1307
1308 static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn,
1309 enum qed_mib_read_type type)
1310 {
1311 struct qed_dcbx_get *dcbx_info;
1312
1313 dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_ATOMIC);
1314 if (!dcbx_info)
1315 return NULL;
1316
1317 if (qed_dcbx_query_params(hwfn, dcbx_info, type)) {
1318 kfree(dcbx_info);
1319 return NULL;
1320 }
1321
1322 if ((type == QED_DCBX_OPERATIONAL_MIB) &&
1323 !dcbx_info->operational.enabled) {
1324 DP_INFO(hwfn, "DCBX is not enabled/operational\n");
1325 kfree(dcbx_info);
1326 return NULL;
1327 }
1328
1329 return dcbx_info;
1330 }
1331
1332 static u8 qed_dcbnl_getstate(struct qed_dev *cdev)
1333 {
1334 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1335 struct qed_dcbx_get *dcbx_info;
1336 bool enabled;
1337
1338 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1339 if (!dcbx_info)
1340 return 0;
1341
1342 enabled = dcbx_info->operational.enabled;
1343 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled);
1344 kfree(dcbx_info);
1345
1346 return enabled;
1347 }
1348
1349 static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state)
1350 {
1351 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1352 struct qed_dcbx_set dcbx_set;
1353 struct qed_ptt *ptt;
1354 int rc;
1355
1356 DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state);
1357
1358 memset(&dcbx_set, 0, sizeof(dcbx_set));
1359 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1360 if (rc)
1361 return 1;
1362
1363 dcbx_set.enabled = !!state;
1364
1365 ptt = qed_ptt_acquire(hwfn);
1366 if (!ptt)
1367 return 1;
1368
1369 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1370
1371 qed_ptt_release(hwfn, ptt);
1372
1373 return rc ? 1 : 0;
1374 }
1375
1376 static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type,
1377 u8 *pgid, u8 *bw_pct, u8 *up_map)
1378 {
1379 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1380 struct qed_dcbx_get *dcbx_info;
1381
1382 DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc);
1383 *prio_type = *pgid = *bw_pct = *up_map = 0;
1384 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) {
1385 DP_INFO(hwfn, "Invalid tc %d\n", tc);
1386 return;
1387 }
1388
1389 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1390 if (!dcbx_info)
1391 return;
1392
1393 *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc];
1394 kfree(dcbx_info);
1395 }
1396
1397 static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct)
1398 {
1399 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1400 struct qed_dcbx_get *dcbx_info;
1401
1402 *bw_pct = 0;
1403 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid);
1404 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) {
1405 DP_INFO(hwfn, "Invalid pgid %d\n", pgid);
1406 return;
1407 }
1408
1409 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1410 if (!dcbx_info)
1411 return;
1412
1413 *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid];
1414 DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct);
1415 kfree(dcbx_info);
1416 }
1417
1418 static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio,
1419 u8 *bwg_id, u8 *bw_pct, u8 *up_map)
1420 {
1421 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
1422 *prio = *bwg_id = *bw_pct = *up_map = 0;
1423 }
1424
1425 static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev,
1426 int bwg_id, u8 *bw_pct)
1427 {
1428 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
1429 *bw_pct = 0;
1430 }
1431
1432 static void qed_dcbnl_getpfccfg(struct qed_dev *cdev,
1433 int priority, u8 *setting)
1434 {
1435 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1436 struct qed_dcbx_get *dcbx_info;
1437
1438 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority);
1439 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) {
1440 DP_INFO(hwfn, "Invalid priority %d\n", priority);
1441 return;
1442 }
1443
1444 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1445 if (!dcbx_info)
1446 return;
1447
1448 *setting = dcbx_info->operational.params.pfc.prio[priority];
1449 DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting);
1450 kfree(dcbx_info);
1451 }
1452
1453 static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting)
1454 {
1455 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1456 struct qed_dcbx_set dcbx_set;
1457 struct qed_ptt *ptt;
1458 int rc;
1459
1460 DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n",
1461 priority, setting);
1462 if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) {
1463 DP_INFO(hwfn, "Invalid priority %d\n", priority);
1464 return;
1465 }
1466
1467 memset(&dcbx_set, 0, sizeof(dcbx_set));
1468 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1469 if (rc)
1470 return;
1471
1472 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
1473 dcbx_set.config.params.pfc.prio[priority] = !!setting;
1474
1475 ptt = qed_ptt_acquire(hwfn);
1476 if (!ptt)
1477 return;
1478
1479 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1480
1481 qed_ptt_release(hwfn, ptt);
1482 }
1483
1484 static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap)
1485 {
1486 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1487 struct qed_dcbx_get *dcbx_info;
1488 int rc = 0;
1489
1490 DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid);
1491 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1492 if (!dcbx_info)
1493 return 1;
1494
1495 switch (capid) {
1496 case DCB_CAP_ATTR_PG:
1497 case DCB_CAP_ATTR_PFC:
1498 case DCB_CAP_ATTR_UP2TC:
1499 case DCB_CAP_ATTR_GSP:
1500 *cap = true;
1501 break;
1502 case DCB_CAP_ATTR_PG_TCS:
1503 case DCB_CAP_ATTR_PFC_TCS:
1504 *cap = 0x80;
1505 break;
1506 case DCB_CAP_ATTR_DCBX:
1507 *cap = (DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_VER_IEEE |
1508 DCB_CAP_DCBX_STATIC);
1509 break;
1510 default:
1511 *cap = false;
1512 rc = 1;
1513 }
1514
1515 DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap);
1516 kfree(dcbx_info);
1517
1518 return rc;
1519 }
1520
1521 static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num)
1522 {
1523 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1524 struct qed_dcbx_get *dcbx_info;
1525 int rc = 0;
1526
1527 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid);
1528 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1529 if (!dcbx_info)
1530 return -EINVAL;
1531
1532 switch (tcid) {
1533 case DCB_NUMTCS_ATTR_PG:
1534 *num = dcbx_info->operational.params.max_ets_tc;
1535 break;
1536 case DCB_NUMTCS_ATTR_PFC:
1537 *num = dcbx_info->operational.params.pfc.max_tc;
1538 break;
1539 default:
1540 rc = -EINVAL;
1541 }
1542
1543 kfree(dcbx_info);
1544 DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num);
1545
1546 return rc;
1547 }
1548
1549 static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev)
1550 {
1551 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1552 struct qed_dcbx_get *dcbx_info;
1553 bool enabled;
1554
1555 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1556 if (!dcbx_info)
1557 return 0;
1558
1559 enabled = dcbx_info->operational.params.pfc.enabled;
1560 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled);
1561 kfree(dcbx_info);
1562
1563 return enabled;
1564 }
1565
1566 static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev)
1567 {
1568 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1569 struct qed_dcbx_get *dcbx_info;
1570 u8 mode = 0;
1571
1572 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1573 if (!dcbx_info)
1574 return 0;
1575
1576 if (dcbx_info->operational.ieee)
1577 mode |= DCB_CAP_DCBX_VER_IEEE;
1578 if (dcbx_info->operational.cee)
1579 mode |= DCB_CAP_DCBX_VER_CEE;
1580 if (dcbx_info->operational.local)
1581 mode |= DCB_CAP_DCBX_STATIC;
1582
1583 DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode);
1584 kfree(dcbx_info);
1585
1586 return mode;
1587 }
1588
1589 static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev,
1590 int tc,
1591 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map)
1592 {
1593 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1594 struct qed_dcbx_set dcbx_set;
1595 struct qed_ptt *ptt;
1596 int rc;
1597
1598 DP_VERBOSE(hwfn, QED_MSG_DCB,
1599 "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n",
1600 tc, pri_type, pgid, bw_pct, up_map);
1601
1602 if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) {
1603 DP_INFO(hwfn, "Invalid tc %d\n", tc);
1604 return;
1605 }
1606
1607 memset(&dcbx_set, 0, sizeof(dcbx_set));
1608 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1609 if (rc)
1610 return;
1611
1612 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
1613 dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid;
1614
1615 ptt = qed_ptt_acquire(hwfn);
1616 if (!ptt)
1617 return;
1618
1619 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1620
1621 qed_ptt_release(hwfn, ptt);
1622 }
1623
1624 static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio,
1625 u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map)
1626 {
1627 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
1628 }
1629
1630 static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct)
1631 {
1632 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1633 struct qed_dcbx_set dcbx_set;
1634 struct qed_ptt *ptt;
1635 int rc;
1636
1637 DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct);
1638 if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) {
1639 DP_INFO(hwfn, "Invalid pgid %d\n", pgid);
1640 return;
1641 }
1642
1643 memset(&dcbx_set, 0, sizeof(dcbx_set));
1644 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1645 if (rc)
1646 return;
1647
1648 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
1649 dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct;
1650
1651 ptt = qed_ptt_acquire(hwfn);
1652 if (!ptt)
1653 return;
1654
1655 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1656
1657 qed_ptt_release(hwfn, ptt);
1658 }
1659
1660 static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct)
1661 {
1662 DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
1663 }
1664
1665 static u8 qed_dcbnl_setall(struct qed_dev *cdev)
1666 {
1667 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1668 struct qed_dcbx_set dcbx_set;
1669 struct qed_ptt *ptt;
1670 int rc;
1671
1672 memset(&dcbx_set, 0, sizeof(dcbx_set));
1673 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1674 if (rc)
1675 return 1;
1676
1677 ptt = qed_ptt_acquire(hwfn);
1678 if (!ptt)
1679 return 1;
1680
1681 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1);
1682
1683 qed_ptt_release(hwfn, ptt);
1684
1685 return rc;
1686 }
1687
1688 static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num)
1689 {
1690 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1691 struct qed_dcbx_set dcbx_set;
1692 struct qed_ptt *ptt;
1693 int rc;
1694
1695 DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num);
1696 memset(&dcbx_set, 0, sizeof(dcbx_set));
1697 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1698 if (rc)
1699 return 1;
1700
1701 switch (tcid) {
1702 case DCB_NUMTCS_ATTR_PG:
1703 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
1704 dcbx_set.config.params.max_ets_tc = num;
1705 break;
1706 case DCB_NUMTCS_ATTR_PFC:
1707 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
1708 dcbx_set.config.params.pfc.max_tc = num;
1709 break;
1710 default:
1711 DP_INFO(hwfn, "Invalid tcid %d\n", tcid);
1712 return -EINVAL;
1713 }
1714
1715 ptt = qed_ptt_acquire(hwfn);
1716 if (!ptt)
1717 return -EINVAL;
1718
1719 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1720
1721 qed_ptt_release(hwfn, ptt);
1722
1723 return 0;
1724 }
1725
1726 static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state)
1727 {
1728 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1729 struct qed_dcbx_set dcbx_set;
1730 struct qed_ptt *ptt;
1731 int rc;
1732
1733 DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state);
1734
1735 memset(&dcbx_set, 0, sizeof(dcbx_set));
1736 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1737 if (rc)
1738 return;
1739
1740 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
1741 dcbx_set.config.params.pfc.enabled = !!state;
1742
1743 ptt = qed_ptt_acquire(hwfn);
1744 if (!ptt)
1745 return;
1746
1747 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1748
1749 qed_ptt_release(hwfn, ptt);
1750 }
1751
1752 static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval)
1753 {
1754 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1755 struct qed_dcbx_get *dcbx_info;
1756 struct qed_app_entry *entry;
1757 bool ethtype;
1758 u8 prio = 0;
1759 int i;
1760
1761 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1762 if (!dcbx_info)
1763 return -EINVAL;
1764
1765 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE);
1766 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
1767 entry = &dcbx_info->operational.params.app_entry[i];
1768 if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) {
1769 prio = entry->prio;
1770 break;
1771 }
1772 }
1773
1774 if (i == QED_DCBX_MAX_APP_PROTOCOL) {
1775 DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval);
1776 kfree(dcbx_info);
1777 return -EINVAL;
1778 }
1779
1780 kfree(dcbx_info);
1781
1782 return prio;
1783 }
1784
1785 static int qed_dcbnl_setapp(struct qed_dev *cdev,
1786 u8 idtype, u16 idval, u8 pri_map)
1787 {
1788 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1789 struct qed_dcbx_set dcbx_set;
1790 struct qed_app_entry *entry;
1791 struct qed_ptt *ptt;
1792 bool ethtype;
1793 int rc, i;
1794
1795 memset(&dcbx_set, 0, sizeof(dcbx_set));
1796 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1797 if (rc)
1798 return -EINVAL;
1799
1800 ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE);
1801 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
1802 entry = &dcbx_set.config.params.app_entry[i];
1803 if ((entry->ethtype == ethtype) && (entry->proto_id == idval))
1804 break;
1805 /* First empty slot */
1806 if (!entry->proto_id) {
1807 dcbx_set.config.params.num_app_entries++;
1808 break;
1809 }
1810 }
1811
1812 if (i == QED_DCBX_MAX_APP_PROTOCOL) {
1813 DP_ERR(cdev, "App table is full\n");
1814 return -EBUSY;
1815 }
1816
1817 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
1818 dcbx_set.config.params.app_entry[i].ethtype = ethtype;
1819 dcbx_set.config.params.app_entry[i].proto_id = idval;
1820 dcbx_set.config.params.app_entry[i].prio = pri_map;
1821
1822 ptt = qed_ptt_acquire(hwfn);
1823 if (!ptt)
1824 return -EBUSY;
1825
1826 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1827
1828 qed_ptt_release(hwfn, ptt);
1829
1830 return rc;
1831 }
1832
1833 static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode)
1834 {
1835 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1836 struct qed_dcbx_set dcbx_set;
1837 struct qed_ptt *ptt;
1838 int rc;
1839
1840 DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode);
1841
1842 if (!(mode & DCB_CAP_DCBX_VER_IEEE) &&
1843 !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) {
1844 DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n");
1845 return 1;
1846 }
1847
1848 memset(&dcbx_set, 0, sizeof(dcbx_set));
1849 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1850 if (rc)
1851 return 1;
1852
1853 dcbx_set.ver_num = 0;
1854 if (mode & DCB_CAP_DCBX_VER_CEE) {
1855 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1856 dcbx_set.enabled = true;
1857 }
1858
1859 if (mode & DCB_CAP_DCBX_VER_IEEE) {
1860 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1861 dcbx_set.enabled = true;
1862 }
1863
1864 if (mode & DCB_CAP_DCBX_STATIC) {
1865 dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
1866 dcbx_set.enabled = true;
1867 }
1868
1869 ptt = qed_ptt_acquire(hwfn);
1870 if (!ptt)
1871 return 1;
1872
1873 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1874
1875 qed_ptt_release(hwfn, ptt);
1876
1877 return rc;
1878 }
1879
1880 static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags)
1881 {
1882 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1883 struct qed_dcbx_get *dcbx_info;
1884
1885 DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid);
1886 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
1887 if (!dcbx_info)
1888 return 1;
1889
1890 *flags = 0;
1891 switch (featid) {
1892 case DCB_FEATCFG_ATTR_PG:
1893 if (dcbx_info->operational.params.ets_enabled)
1894 *flags = DCB_FEATCFG_ENABLE;
1895 else
1896 *flags = DCB_FEATCFG_ERROR;
1897 break;
1898 case DCB_FEATCFG_ATTR_PFC:
1899 if (dcbx_info->operational.params.pfc.enabled)
1900 *flags = DCB_FEATCFG_ENABLE;
1901 else
1902 *flags = DCB_FEATCFG_ERROR;
1903 break;
1904 case DCB_FEATCFG_ATTR_APP:
1905 if (dcbx_info->operational.params.app_valid)
1906 *flags = DCB_FEATCFG_ENABLE;
1907 else
1908 *flags = DCB_FEATCFG_ERROR;
1909 break;
1910 default:
1911 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid);
1912 kfree(dcbx_info);
1913 return 1;
1914 }
1915
1916 DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags);
1917 kfree(dcbx_info);
1918
1919 return 0;
1920 }
1921
1922 static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags)
1923 {
1924 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1925 struct qed_dcbx_set dcbx_set;
1926 bool enabled, willing;
1927 struct qed_ptt *ptt;
1928 int rc;
1929
1930 DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n",
1931 featid, flags);
1932 memset(&dcbx_set, 0, sizeof(dcbx_set));
1933 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
1934 if (rc)
1935 return 1;
1936
1937 enabled = !!(flags & DCB_FEATCFG_ENABLE);
1938 willing = !!(flags & DCB_FEATCFG_WILLING);
1939 switch (featid) {
1940 case DCB_FEATCFG_ATTR_PG:
1941 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
1942 dcbx_set.config.params.ets_enabled = enabled;
1943 dcbx_set.config.params.ets_willing = willing;
1944 break;
1945 case DCB_FEATCFG_ATTR_PFC:
1946 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
1947 dcbx_set.config.params.pfc.enabled = enabled;
1948 dcbx_set.config.params.pfc.willing = willing;
1949 break;
1950 case DCB_FEATCFG_ATTR_APP:
1951 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
1952 dcbx_set.config.params.app_willing = willing;
1953 break;
1954 default:
1955 DP_INFO(hwfn, "Invalid feature-ID %d\n", featid);
1956 return 1;
1957 }
1958
1959 ptt = qed_ptt_acquire(hwfn);
1960 if (!ptt)
1961 return 1;
1962
1963 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
1964
1965 qed_ptt_release(hwfn, ptt);
1966
1967 return 0;
1968 }
1969
1970 static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev,
1971 struct dcb_peer_app_info *info,
1972 u16 *app_count)
1973 {
1974 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1975 struct qed_dcbx_get *dcbx_info;
1976
1977 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
1978 if (!dcbx_info)
1979 return -EINVAL;
1980
1981 info->willing = dcbx_info->remote.params.app_willing;
1982 info->error = dcbx_info->remote.params.app_error;
1983 *app_count = dcbx_info->remote.params.num_app_entries;
1984 kfree(dcbx_info);
1985
1986 return 0;
1987 }
1988
1989 static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev,
1990 struct dcb_app *table)
1991 {
1992 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1993 struct qed_dcbx_get *dcbx_info;
1994 int i;
1995
1996 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
1997 if (!dcbx_info)
1998 return -EINVAL;
1999
2000 for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) {
2001 if (dcbx_info->remote.params.app_entry[i].ethtype)
2002 table[i].selector = DCB_APP_IDTYPE_ETHTYPE;
2003 else
2004 table[i].selector = DCB_APP_IDTYPE_PORTNUM;
2005 table[i].priority = dcbx_info->remote.params.app_entry[i].prio;
2006 table[i].protocol =
2007 dcbx_info->remote.params.app_entry[i].proto_id;
2008 }
2009
2010 kfree(dcbx_info);
2011
2012 return 0;
2013 }
2014
2015 static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc)
2016 {
2017 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2018 struct qed_dcbx_get *dcbx_info;
2019 int i;
2020
2021 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
2022 if (!dcbx_info)
2023 return -EINVAL;
2024
2025 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
2026 if (dcbx_info->remote.params.pfc.prio[i])
2027 pfc->pfc_en |= BIT(i);
2028
2029 pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc;
2030 DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n",
2031 pfc->pfc_en, pfc->tcs_supported);
2032 kfree(dcbx_info);
2033
2034 return 0;
2035 }
2036
2037 static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg)
2038 {
2039 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2040 struct qed_dcbx_get *dcbx_info;
2041 int i;
2042
2043 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
2044 if (!dcbx_info)
2045 return -EINVAL;
2046
2047 pg->willing = dcbx_info->remote.params.ets_willing;
2048 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
2049 pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i];
2050 pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i];
2051 }
2052
2053 DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing);
2054 kfree(dcbx_info);
2055
2056 return 0;
2057 }
2058
2059 static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev,
2060 struct ieee_pfc *pfc, bool remote)
2061 {
2062 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2063 struct qed_dcbx_params *params;
2064 struct qed_dcbx_get *dcbx_info;
2065 int rc, i;
2066
2067 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2068 if (!dcbx_info)
2069 return -EINVAL;
2070
2071 if (!dcbx_info->operational.ieee) {
2072 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2073 kfree(dcbx_info);
2074 return -EINVAL;
2075 }
2076
2077 if (remote) {
2078 memset(dcbx_info, 0, sizeof(*dcbx_info));
2079 rc = qed_dcbx_query_params(hwfn, dcbx_info,
2080 QED_DCBX_REMOTE_MIB);
2081 if (rc) {
2082 kfree(dcbx_info);
2083 return -EINVAL;
2084 }
2085
2086 params = &dcbx_info->remote.params;
2087 } else {
2088 params = &dcbx_info->operational.params;
2089 }
2090
2091 pfc->pfc_cap = params->pfc.max_tc;
2092 pfc->pfc_en = 0;
2093 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
2094 if (params->pfc.prio[i])
2095 pfc->pfc_en |= BIT(i);
2096
2097 kfree(dcbx_info);
2098
2099 return 0;
2100 }
2101
2102 static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
2103 {
2104 return qed_dcbnl_get_ieee_pfc(cdev, pfc, false);
2105 }
2106
2107 static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
2108 {
2109 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2110 struct qed_dcbx_get *dcbx_info;
2111 struct qed_dcbx_set dcbx_set;
2112 struct qed_ptt *ptt;
2113 int rc, i;
2114
2115 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2116 if (!dcbx_info)
2117 return -EINVAL;
2118
2119 if (!dcbx_info->operational.ieee) {
2120 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2121 kfree(dcbx_info);
2122 return -EINVAL;
2123 }
2124
2125 kfree(dcbx_info);
2126
2127 memset(&dcbx_set, 0, sizeof(dcbx_set));
2128 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
2129 if (rc)
2130 return -EINVAL;
2131
2132 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
2133 for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
2134 dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i));
2135
2136 dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap;
2137
2138 ptt = qed_ptt_acquire(hwfn);
2139 if (!ptt)
2140 return -EINVAL;
2141
2142 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
2143
2144 qed_ptt_release(hwfn, ptt);
2145
2146 return rc;
2147 }
2148
2149 static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev,
2150 struct ieee_ets *ets, bool remote)
2151 {
2152 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2153 struct qed_dcbx_get *dcbx_info;
2154 struct qed_dcbx_params *params;
2155 int rc;
2156
2157 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2158 if (!dcbx_info)
2159 return -EINVAL;
2160
2161 if (!dcbx_info->operational.ieee) {
2162 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2163 kfree(dcbx_info);
2164 return -EINVAL;
2165 }
2166
2167 if (remote) {
2168 memset(dcbx_info, 0, sizeof(*dcbx_info));
2169 rc = qed_dcbx_query_params(hwfn, dcbx_info,
2170 QED_DCBX_REMOTE_MIB);
2171 if (rc) {
2172 kfree(dcbx_info);
2173 return -EINVAL;
2174 }
2175
2176 params = &dcbx_info->remote.params;
2177 } else {
2178 params = &dcbx_info->operational.params;
2179 }
2180
2181 ets->ets_cap = params->max_ets_tc;
2182 ets->willing = params->ets_willing;
2183 ets->cbs = params->ets_cbs;
2184 memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw));
2185 memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa));
2186 memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc));
2187 kfree(dcbx_info);
2188
2189 return 0;
2190 }
2191
2192 static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets)
2193 {
2194 return qed_dcbnl_get_ieee_ets(cdev, ets, false);
2195 }
2196
2197 static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets)
2198 {
2199 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2200 struct qed_dcbx_get *dcbx_info;
2201 struct qed_dcbx_set dcbx_set;
2202 struct qed_ptt *ptt;
2203 int rc;
2204
2205 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2206 if (!dcbx_info)
2207 return -EINVAL;
2208
2209 if (!dcbx_info->operational.ieee) {
2210 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2211 kfree(dcbx_info);
2212 return -EINVAL;
2213 }
2214
2215 kfree(dcbx_info);
2216
2217 memset(&dcbx_set, 0, sizeof(dcbx_set));
2218 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
2219 if (rc)
2220 return -EINVAL;
2221
2222 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
2223 dcbx_set.config.params.max_ets_tc = ets->ets_cap;
2224 dcbx_set.config.params.ets_willing = ets->willing;
2225 dcbx_set.config.params.ets_cbs = ets->cbs;
2226 memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw,
2227 sizeof(ets->tc_tx_bw));
2228 memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa,
2229 sizeof(ets->tc_tsa));
2230 memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc,
2231 sizeof(ets->prio_tc));
2232
2233 ptt = qed_ptt_acquire(hwfn);
2234 if (!ptt)
2235 return -EINVAL;
2236
2237 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
2238
2239 qed_ptt_release(hwfn, ptt);
2240
2241 return rc;
2242 }
2243
2244 static int
2245 qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets)
2246 {
2247 return qed_dcbnl_get_ieee_ets(cdev, ets, true);
2248 }
2249
2250 static int
2251 qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
2252 {
2253 return qed_dcbnl_get_ieee_pfc(cdev, pfc, true);
2254 }
2255
2256 static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee)
2257 {
2258 switch (selector) {
2259 case IEEE_8021QAZ_APP_SEL_ETHERTYPE:
2260 *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE;
2261 break;
2262 case IEEE_8021QAZ_APP_SEL_STREAM:
2263 *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT;
2264 break;
2265 case IEEE_8021QAZ_APP_SEL_DGRAM:
2266 *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT;
2267 break;
2268 case IEEE_8021QAZ_APP_SEL_ANY:
2269 *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT;
2270 break;
2271 default:
2272 return -EINVAL;
2273 }
2274
2275 return 0;
2276 }
2277
2278 static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app)
2279 {
2280 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2281 struct qed_dcbx_get *dcbx_info;
2282 struct qed_app_entry *entry;
2283 u8 prio = 0;
2284 u8 sf_ieee;
2285 int i;
2286
2287 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n",
2288 app->selector, app->protocol);
2289
2290 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) {
2291 DP_INFO(cdev, "Invalid selector field value %d\n",
2292 app->selector);
2293 return -EINVAL;
2294 }
2295
2296 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2297 if (!dcbx_info)
2298 return -EINVAL;
2299
2300 if (!dcbx_info->operational.ieee) {
2301 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2302 kfree(dcbx_info);
2303 return -EINVAL;
2304 }
2305
2306 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
2307 entry = &dcbx_info->operational.params.app_entry[i];
2308 if ((entry->sf_ieee == sf_ieee) &&
2309 (entry->proto_id == app->protocol)) {
2310 prio = entry->prio;
2311 break;
2312 }
2313 }
2314
2315 if (i == QED_DCBX_MAX_APP_PROTOCOL) {
2316 DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector,
2317 app->protocol);
2318 kfree(dcbx_info);
2319 return -EINVAL;
2320 }
2321
2322 app->priority = ffs(prio) - 1;
2323
2324 kfree(dcbx_info);
2325
2326 return 0;
2327 }
2328
2329 static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app)
2330 {
2331 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2332 struct qed_dcbx_get *dcbx_info;
2333 struct qed_dcbx_set dcbx_set;
2334 struct qed_app_entry *entry;
2335 struct qed_ptt *ptt;
2336 u8 sf_ieee;
2337 int rc, i;
2338
2339 DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n",
2340 app->selector, app->protocol, app->priority);
2341 if (app->priority >= QED_MAX_PFC_PRIORITIES) {
2342 DP_INFO(hwfn, "Invalid priority %d\n", app->priority);
2343 return -EINVAL;
2344 }
2345
2346 if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) {
2347 DP_INFO(cdev, "Invalid selector field value %d\n",
2348 app->selector);
2349 return -EINVAL;
2350 }
2351
2352 dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
2353 if (!dcbx_info)
2354 return -EINVAL;
2355
2356 if (!dcbx_info->operational.ieee) {
2357 DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
2358 kfree(dcbx_info);
2359 return -EINVAL;
2360 }
2361
2362 kfree(dcbx_info);
2363
2364 memset(&dcbx_set, 0, sizeof(dcbx_set));
2365 rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
2366 if (rc)
2367 return -EINVAL;
2368
2369 for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
2370 entry = &dcbx_set.config.params.app_entry[i];
2371 if ((entry->sf_ieee == sf_ieee) &&
2372 (entry->proto_id == app->protocol))
2373 break;
2374 /* First empty slot */
2375 if (!entry->proto_id) {
2376 dcbx_set.config.params.num_app_entries++;
2377 break;
2378 }
2379 }
2380
2381 if (i == QED_DCBX_MAX_APP_PROTOCOL) {
2382 DP_ERR(cdev, "App table is full\n");
2383 return -EBUSY;
2384 }
2385
2386 dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
2387 dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee;
2388 dcbx_set.config.params.app_entry[i].proto_id = app->protocol;
2389 dcbx_set.config.params.app_entry[i].prio = BIT(app->priority);
2390
2391 ptt = qed_ptt_acquire(hwfn);
2392 if (!ptt)
2393 return -EBUSY;
2394
2395 rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
2396
2397 qed_ptt_release(hwfn, ptt);
2398
2399 return rc;
2400 }
2401
2402 const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = {
2403 .getstate = qed_dcbnl_getstate,
2404 .setstate = qed_dcbnl_setstate,
2405 .getpgtccfgtx = qed_dcbnl_getpgtccfgtx,
2406 .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx,
2407 .getpgtccfgrx = qed_dcbnl_getpgtccfgrx,
2408 .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx,
2409 .getpfccfg = qed_dcbnl_getpfccfg,
2410 .setpfccfg = qed_dcbnl_setpfccfg,
2411 .getcap = qed_dcbnl_getcap,
2412 .getnumtcs = qed_dcbnl_getnumtcs,
2413 .getpfcstate = qed_dcbnl_getpfcstate,
2414 .getdcbx = qed_dcbnl_getdcbx,
2415 .setpgtccfgtx = qed_dcbnl_setpgtccfgtx,
2416 .setpgtccfgrx = qed_dcbnl_setpgtccfgrx,
2417 .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx,
2418 .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx,
2419 .setall = qed_dcbnl_setall,
2420 .setnumtcs = qed_dcbnl_setnumtcs,
2421 .setpfcstate = qed_dcbnl_setpfcstate,
2422 .setapp = qed_dcbnl_setapp,
2423 .setdcbx = qed_dcbnl_setdcbx,
2424 .setfeatcfg = qed_dcbnl_setfeatcfg,
2425 .getfeatcfg = qed_dcbnl_getfeatcfg,
2426 .getapp = qed_dcbnl_getapp,
2427 .peer_getappinfo = qed_dcbnl_peer_getappinfo,
2428 .peer_getapptable = qed_dcbnl_peer_getapptable,
2429 .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc,
2430 .cee_peer_getpg = qed_dcbnl_cee_peer_getpg,
2431 .ieee_getpfc = qed_dcbnl_ieee_getpfc,
2432 .ieee_setpfc = qed_dcbnl_ieee_setpfc,
2433 .ieee_getets = qed_dcbnl_ieee_getets,
2434 .ieee_setets = qed_dcbnl_ieee_setets,
2435 .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc,
2436 .ieee_peer_getets = qed_dcbnl_ieee_peer_getets,
2437 .ieee_getapp = qed_dcbnl_ieee_getapp,
2438 .ieee_setapp = qed_dcbnl_ieee_setapp,
2439 };
2440
2441 #endif
Linux with added FPC-III support