drivers/net/phy/mdio-moxart.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* MOXA ART Ethernet (RTL8201CP) MDIO interface driver
   3  *
   4  * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
   5  */
   6
   7 #include <linux/delay.h>
   8 #include <linux/kernel.h>
   9 #include <linux/module.h>
  10 #include <linux/mutex.h>
  11 #include <linux/of_address.h>
  12 #include <linux/of_mdio.h>
  13 #include <linux/phy.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/regulator/consumer.h>
  16
  17 #define REG_PHY_CTRL            0
  18 #define REG_PHY_WRITE_DATA      4
  19
  20 /* REG_PHY_CTRL */
  21 #define MIIWR                   BIT(27) /* init write sequence (auto cleared)*/
  22 #define MIIRD                   BIT(26)
  23 #define REGAD_MASK              0x3e00000
  24 #define PHYAD_MASK              0x1f0000
  25 #define MIIRDATA_MASK           0xffff
  26
  27 /* REG_PHY_WRITE_DATA */
  28 #define MIIWDATA_MASK           0xffff
  29
  30 struct moxart_mdio_data {
  31         void __iomem            *base;
  32 };
  33
  34 static int moxart_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
  35 {
  36         struct moxart_mdio_data *data = bus->priv;
  37         u32 ctrl = 0;
  38         unsigned int count = 5;
  39
  40         dev_dbg(&bus->dev, "%s\n", __func__);
  41
  42         ctrl |= MIIRD | ((mii_id << 16) & PHYAD_MASK) |
  43                 ((regnum << 21) & REGAD_MASK);
  44
  45         writel(ctrl, data->base + REG_PHY_CTRL);
  46
  47         do {
  48                 ctrl = readl(data->base + REG_PHY_CTRL);
  49
  50                 if (!(ctrl & MIIRD))
  51                         return ctrl & MIIRDATA_MASK;
  52
  53                 mdelay(10);
  54                 count--;
  55         } while (count > 0);
  56
  57         dev_dbg(&bus->dev, "%s timed out\n", __func__);
  58
  59         return -ETIMEDOUT;
  60 }
  61
  62 static int moxart_mdio_write(struct mii_bus *bus, int mii_id,
  63                              int regnum, u16 value)
  64 {
  65         struct moxart_mdio_data *data = bus->priv;
  66         u32 ctrl = 0;
  67         unsigned int count = 5;
  68
  69         dev_dbg(&bus->dev, "%s\n", __func__);
  70
  71         ctrl |= MIIWR | ((mii_id << 16) & PHYAD_MASK) |
  72                 ((regnum << 21) & REGAD_MASK);
  73
  74         value &= MIIWDATA_MASK;
  75
  76         writel(value, data->base + REG_PHY_WRITE_DATA);
  77         writel(ctrl, data->base + REG_PHY_CTRL);
  78
  79         do {
  80                 ctrl = readl(data->base + REG_PHY_CTRL);
  81
  82                 if (!(ctrl & MIIWR))
  83                         return 0;
  84
  85                 mdelay(10);
  86                 count--;
  87         } while (count > 0);
  88
  89         dev_dbg(&bus->dev, "%s timed out\n", __func__);
  90
  91         return -ETIMEDOUT;
  92 }
  93
  94 static int moxart_mdio_reset(struct mii_bus *bus)
  95 {
  96         int data, i;
  97
  98         for (i = 0; i < PHY_MAX_ADDR; i++) {
  99                 data = moxart_mdio_read(bus, i, MII_BMCR);
 100                 if (data < 0)
 101                         continue;
 102
 103                 data |= BMCR_RESET;
 104                 if (moxart_mdio_write(bus, i, MII_BMCR, data) < 0)
 105                         continue;
 106         }
 107
 108         return 0;
 109 }
 110
 111 static int moxart_mdio_probe(struct platform_device *pdev)
 112 {
 113         struct device_node *np = pdev->dev.of_node;
 114         struct mii_bus *bus;
 115         struct moxart_mdio_data *data;
 116         int ret, i;
 117
 118         bus = mdiobus_alloc_size(sizeof(*data));
 119         if (!bus)
 120                 return -ENOMEM;
 121
 122         bus->name = "MOXA ART Ethernet MII";
 123         bus->read = &moxart_mdio_read;
 124         bus->write = &moxart_mdio_write;
 125         bus->reset = &moxart_mdio_reset;
 126         snprintf(bus->id, MII_BUS_ID_SIZE, "%s-%d-mii", pdev->name, pdev->id);
 127         bus->parent = &pdev->dev;
 128
 129         /* Setting PHY_IGNORE_INTERRUPT here even if it has no effect,
 130          * of_mdiobus_register() sets these PHY_POLL.
 131          * Ideally, the interrupt from MAC controller could be used to
 132          * detect link state changes, not polling, i.e. if there was
 133          * a way phy_driver could set PHY_HAS_INTERRUPT but have that
 134          * interrupt handled in ethernet drivercode.
 135          */
 136         for (i = 0; i < PHY_MAX_ADDR; i++)
 137                 bus->irq[i] = PHY_IGNORE_INTERRUPT;
 138
 139         data = bus->priv;
 140         data->base = devm_platform_ioremap_resource(pdev, 0);
 141         if (IS_ERR(data->base)) {
 142                 ret = PTR_ERR(data->base);
 143                 goto err_out_free_mdiobus;
 144         }
 145
 146         ret = of_mdiobus_register(bus, np);
 147         if (ret < 0)
 148                 goto err_out_free_mdiobus;
 149
 150         platform_set_drvdata(pdev, bus);
 151
 152         return 0;
 153
 154 err_out_free_mdiobus:
 155         mdiobus_free(bus);
 156         return ret;
 157 }
 158
 159 static int moxart_mdio_remove(struct platform_device *pdev)
 160 {
 161         struct mii_bus *bus = platform_get_drvdata(pdev);
 162
 163         mdiobus_unregister(bus);
 164         mdiobus_free(bus);
 165
 166         return 0;
 167 }
 168
 169 static const struct of_device_id moxart_mdio_dt_ids[] = {
 170         { .compatible = "moxa,moxart-mdio" },
 171         { }
 172 };
 173 MODULE_DEVICE_TABLE(of, moxart_mdio_dt_ids);
 174
 175 static struct platform_driver moxart_mdio_driver = {
 176         .probe = moxart_mdio_probe,
 177         .remove = moxart_mdio_remove,
 178         .driver = {
 179                 .name = "moxart-mdio",
 180                 .of_match_table = moxart_mdio_dt_ids,
 181         },
 182 };
 183
 184 module_platform_driver(moxart_mdio_driver);
 185
 186 MODULE_DESCRIPTION("MOXA ART MDIO interface driver");
 187 MODULE_AUTHOR("Jonas Jensen <jonas.jensen@gmail.com>");
 188 MODULE_LICENSE("GPL v2");