drivers/net/wireless/ath/ath11k/hw.h

   1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
   2 /*
   3  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
   4  */
   5
   6 #ifndef ATH11K_HW_H
   7 #define ATH11K_HW_H
   8
   9 /* Target configuration defines */
  10
  11 /* Num VDEVS per radio */
  12 #define TARGET_NUM_VDEVS        (16 + 1)
  13
  14 #define TARGET_NUM_PEERS_PDEV   (512 + TARGET_NUM_VDEVS)
  15
  16 /* Num of peers for Single Radio mode */
  17 #define TARGET_NUM_PEERS_SINGLE         (TARGET_NUM_PEERS_PDEV)
  18
  19 /* Num of peers for DBS */
  20 #define TARGET_NUM_PEERS_DBS            (2 * TARGET_NUM_PEERS_PDEV)
  21
  22 /* Num of peers for DBS_SBS */
  23 #define TARGET_NUM_PEERS_DBS_SBS        (3 * TARGET_NUM_PEERS_PDEV)
  24
  25 /* Max num of stations (per radio) */
  26 #define TARGET_NUM_STATIONS     512
  27
  28 #define TARGET_NUM_PEERS(x)     TARGET_NUM_PEERS_##x
  29 #define TARGET_NUM_PEER_KEYS    2
  30 #define TARGET_NUM_TIDS(x)      (2 * TARGET_NUM_PEERS(x) + \
  31                                  4 * TARGET_NUM_VDEVS + 8)
  32
  33 #define TARGET_AST_SKID_LIMIT   16
  34 #define TARGET_NUM_OFFLD_PEERS  4
  35 #define TARGET_NUM_OFFLD_REORDER_BUFFS 4
  36
  37 #define TARGET_TX_CHAIN_MASK    (BIT(0) | BIT(1) | BIT(2) | BIT(4))
  38 #define TARGET_RX_CHAIN_MASK    (BIT(0) | BIT(1) | BIT(2) | BIT(4))
  39 #define TARGET_RX_TIMEOUT_LO_PRI        100
  40 #define TARGET_RX_TIMEOUT_HI_PRI        40
  41
  42 #define TARGET_DECAP_MODE_RAW           0
  43 #define TARGET_DECAP_MODE_NATIVE_WIFI   1
  44 #define TARGET_DECAP_MODE_ETH           2
  45
  46 #define TARGET_SCAN_MAX_PENDING_REQS    4
  47 #define TARGET_BMISS_OFFLOAD_MAX_VDEV   3
  48 #define TARGET_ROAM_OFFLOAD_MAX_VDEV    3
  49 #define TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES     8
  50 #define TARGET_GTK_OFFLOAD_MAX_VDEV     3
  51 #define TARGET_NUM_MCAST_GROUPS         12
  52 #define TARGET_NUM_MCAST_TABLE_ELEMS    64
  53 #define TARGET_MCAST2UCAST_MODE         2
  54 #define TARGET_TX_DBG_LOG_SIZE          1024
  55 #define TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK 1
  56 #define TARGET_VOW_CONFIG               0
  57 #define TARGET_NUM_MSDU_DESC            (2500)
  58 #define TARGET_MAX_FRAG_ENTRIES         6
  59 #define TARGET_MAX_BCN_OFFLD            16
  60 #define TARGET_NUM_WDS_ENTRIES          32
  61 #define TARGET_DMA_BURST_SIZE           1
  62 #define TARGET_RX_BATCHMODE             1
  63
  64 #define ATH11K_HW_MAX_QUEUES            4
  65
  66 #define ATH11k_HW_RATECODE_CCK_SHORT_PREAM_MASK  0x4
  67
  68 #define ATH11K_FW_DIR                   "ath11k"
  69
  70 /* IPQ8074 definitions */
  71 #define IPQ8074_FW_DIR                  "IPQ8074"
  72 #define IPQ8074_MAX_BOARD_DATA_SZ       (256 * 1024)
  73 #define IPQ8074_MAX_CAL_DATA_SZ         IPQ8074_MAX_BOARD_DATA_SZ
  74
  75 #define ATH11K_BOARD_MAGIC              "QCA-ATH11K-BOARD"
  76 #define ATH11K_BOARD_API2_FILE          "board-2.bin"
  77 #define ATH11K_DEFAULT_BOARD_FILE       "bdwlan.bin"
  78 #define ATH11K_DEFAULT_CAL_FILE         "caldata.bin"
  79
  80 enum ath11k_hw_rate_cck {
  81         ATH11K_HW_RATE_CCK_LP_11M = 0,
  82         ATH11K_HW_RATE_CCK_LP_5_5M,
  83         ATH11K_HW_RATE_CCK_LP_2M,
  84         ATH11K_HW_RATE_CCK_LP_1M,
  85         ATH11K_HW_RATE_CCK_SP_11M,
  86         ATH11K_HW_RATE_CCK_SP_5_5M,
  87         ATH11K_HW_RATE_CCK_SP_2M,
  88 };
  89
  90 enum ath11k_hw_rate_ofdm {
  91         ATH11K_HW_RATE_OFDM_48M = 0,
  92         ATH11K_HW_RATE_OFDM_24M,
  93         ATH11K_HW_RATE_OFDM_12M,
  94         ATH11K_HW_RATE_OFDM_6M,
  95         ATH11K_HW_RATE_OFDM_54M,
  96         ATH11K_HW_RATE_OFDM_36M,
  97         ATH11K_HW_RATE_OFDM_18M,
  98         ATH11K_HW_RATE_OFDM_9M,
  99 };
 100
 101 struct ath11k_hw_params {
 102         const char *name;
 103         struct {
 104                 const char *dir;
 105                 size_t board_size;
 106                 size_t cal_size;
 107         } fw;
 108 };
 109
 110 struct ath11k_fw_ie {
 111         __le32 id;
 112         __le32 len;
 113         u8 data[0];
 114 };
 115
 116 enum ath11k_bd_ie_board_type {
 117         ATH11K_BD_IE_BOARD_NAME = 0,
 118         ATH11K_BD_IE_BOARD_DATA = 1,
 119 };
 120
 121 enum ath11k_bd_ie_type {
 122         /* contains sub IEs of enum ath11k_bd_ie_board_type */
 123         ATH11K_BD_IE_BOARD = 0,
 124         ATH11K_BD_IE_BOARD_EXT = 1,
 125 };
 126
 127 #endif