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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / net / wireless / intel / iwlegacy / common.c
blob348c17ce72f5cd57b66fb5ae161b2381b3585bf3
1 // SPDX-License-Identifier: GPL-2.0-only
2 /******************************************************************************
3 *
4 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
5 *
6 * Contact Information:
7 * Intel Linux Wireless <ilw@linux.intel.com>
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
9 *****************************************************************************/
10
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/etherdevice.h>
14 #include <linux/sched.h>
15 #include <linux/slab.h>
16 #include <linux/types.h>
17 #include <linux/lockdep.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/delay.h>
21 #include <linux/skbuff.h>
22 #include <net/mac80211.h>
23
24 #include "common.h"
25
26 int
27 _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
28 {
29 const int interval = 10; /* microseconds */
30 int t = 0;
31
32 do {
33 if ((_il_rd(il, addr) & mask) == (bits & mask))
34 return t;
35 udelay(interval);
36 t += interval;
37 } while (t < timeout);
38
39 return -ETIMEDOUT;
40 }
41 EXPORT_SYMBOL(_il_poll_bit);
42
43 void
44 il_set_bit(struct il_priv *p, u32 r, u32 m)
45 {
46 unsigned long reg_flags;
47
48 spin_lock_irqsave(&p->reg_lock, reg_flags);
49 _il_set_bit(p, r, m);
50 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
51 }
52 EXPORT_SYMBOL(il_set_bit);
53
54 void
55 il_clear_bit(struct il_priv *p, u32 r, u32 m)
56 {
57 unsigned long reg_flags;
58
59 spin_lock_irqsave(&p->reg_lock, reg_flags);
60 _il_clear_bit(p, r, m);
61 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
62 }
63 EXPORT_SYMBOL(il_clear_bit);
64
65 bool
66 _il_grab_nic_access(struct il_priv *il)
67 {
68 int ret;
69 u32 val;
70
71 /* this bit wakes up the NIC */
72 _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
73
74 /*
75 * These bits say the device is running, and should keep running for
76 * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
77 * but they do not indicate that embedded SRAM is restored yet;
78 * 3945 and 4965 have volatile SRAM, and must save/restore contents
79 * to/from host DRAM when sleeping/waking for power-saving.
80 * Each direction takes approximately 1/4 millisecond; with this
81 * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
82 * series of register accesses are expected (e.g. reading Event Log),
83 * to keep device from sleeping.
84 *
85 * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
86 * SRAM is okay/restored. We don't check that here because this call
87 * is just for hardware register access; but GP1 MAC_SLEEP check is a
88 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
89 *
90 */
91 ret =
92 _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
93 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
94 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
95 if (unlikely(ret < 0)) {
96 val = _il_rd(il, CSR_GP_CNTRL);
97 WARN_ONCE(1, "Timeout waiting for ucode processor access "
98 "(CSR_GP_CNTRL 0x%08x)\n", val);
99 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
100 return false;
101 }
102
103 return true;
104 }
105 EXPORT_SYMBOL_GPL(_il_grab_nic_access);
106
107 int
108 il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
109 {
110 const int interval = 10; /* microseconds */
111 int t = 0;
112
113 do {
114 if ((il_rd(il, addr) & mask) == mask)
115 return t;
116 udelay(interval);
117 t += interval;
118 } while (t < timeout);
119
120 return -ETIMEDOUT;
121 }
122 EXPORT_SYMBOL(il_poll_bit);
123
124 u32
125 il_rd_prph(struct il_priv *il, u32 reg)
126 {
127 unsigned long reg_flags;
128 u32 val;
129
130 spin_lock_irqsave(&il->reg_lock, reg_flags);
131 _il_grab_nic_access(il);
132 val = _il_rd_prph(il, reg);
133 _il_release_nic_access(il);
134 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
135 return val;
136 }
137 EXPORT_SYMBOL(il_rd_prph);
138
139 void
140 il_wr_prph(struct il_priv *il, u32 addr, u32 val)
141 {
142 unsigned long reg_flags;
143
144 spin_lock_irqsave(&il->reg_lock, reg_flags);
145 if (likely(_il_grab_nic_access(il))) {
146 _il_wr_prph(il, addr, val);
147 _il_release_nic_access(il);
148 }
149 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
150 }
151 EXPORT_SYMBOL(il_wr_prph);
152
153 u32
154 il_read_targ_mem(struct il_priv *il, u32 addr)
155 {
156 unsigned long reg_flags;
157 u32 value;
158
159 spin_lock_irqsave(&il->reg_lock, reg_flags);
160 _il_grab_nic_access(il);
161
162 _il_wr(il, HBUS_TARG_MEM_RADDR, addr);
163 value = _il_rd(il, HBUS_TARG_MEM_RDAT);
164
165 _il_release_nic_access(il);
166 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
167 return value;
168 }
169 EXPORT_SYMBOL(il_read_targ_mem);
170
171 void
172 il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
173 {
174 unsigned long reg_flags;
175
176 spin_lock_irqsave(&il->reg_lock, reg_flags);
177 if (likely(_il_grab_nic_access(il))) {
178 _il_wr(il, HBUS_TARG_MEM_WADDR, addr);
179 _il_wr(il, HBUS_TARG_MEM_WDAT, val);
180 _il_release_nic_access(il);
181 }
182 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
183 }
184 EXPORT_SYMBOL(il_write_targ_mem);
185
186 const char *
187 il_get_cmd_string(u8 cmd)
188 {
189 switch (cmd) {
190 IL_CMD(N_ALIVE);
191 IL_CMD(N_ERROR);
192 IL_CMD(C_RXON);
193 IL_CMD(C_RXON_ASSOC);
194 IL_CMD(C_QOS_PARAM);
195 IL_CMD(C_RXON_TIMING);
196 IL_CMD(C_ADD_STA);
197 IL_CMD(C_REM_STA);
198 IL_CMD(C_WEPKEY);
199 IL_CMD(N_3945_RX);
200 IL_CMD(C_TX);
201 IL_CMD(C_RATE_SCALE);
202 IL_CMD(C_LEDS);
203 IL_CMD(C_TX_LINK_QUALITY_CMD);
204 IL_CMD(C_CHANNEL_SWITCH);
205 IL_CMD(N_CHANNEL_SWITCH);
206 IL_CMD(C_SPECTRUM_MEASUREMENT);
207 IL_CMD(N_SPECTRUM_MEASUREMENT);
208 IL_CMD(C_POWER_TBL);
209 IL_CMD(N_PM_SLEEP);
210 IL_CMD(N_PM_DEBUG_STATS);
211 IL_CMD(C_SCAN);
212 IL_CMD(C_SCAN_ABORT);
213 IL_CMD(N_SCAN_START);
214 IL_CMD(N_SCAN_RESULTS);
215 IL_CMD(N_SCAN_COMPLETE);
216 IL_CMD(N_BEACON);
217 IL_CMD(C_TX_BEACON);
218 IL_CMD(C_TX_PWR_TBL);
219 IL_CMD(C_BT_CONFIG);
220 IL_CMD(C_STATS);
221 IL_CMD(N_STATS);
222 IL_CMD(N_CARD_STATE);
223 IL_CMD(N_MISSED_BEACONS);
224 IL_CMD(C_CT_KILL_CONFIG);
225 IL_CMD(C_SENSITIVITY);
226 IL_CMD(C_PHY_CALIBRATION);
227 IL_CMD(N_RX_PHY);
228 IL_CMD(N_RX_MPDU);
229 IL_CMD(N_RX);
230 IL_CMD(N_COMPRESSED_BA);
231 default:
232 return "UNKNOWN";
233
234 }
235 }
236 EXPORT_SYMBOL(il_get_cmd_string);
237
238 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
239
240 static void
241 il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd,
242 struct il_rx_pkt *pkt)
243 {
244 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
245 IL_ERR("Bad return from %s (0x%08X)\n",
246 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
247 return;
248 }
249 #ifdef CONFIG_IWLEGACY_DEBUG
250 switch (cmd->hdr.cmd) {
251 case C_TX_LINK_QUALITY_CMD:
252 case C_SENSITIVITY:
253 D_HC_DUMP("back from %s (0x%08X)\n",
254 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
255 break;
256 default:
257 D_HC("back from %s (0x%08X)\n", il_get_cmd_string(cmd->hdr.cmd),
258 pkt->hdr.flags);
259 }
260 #endif
261 }
262
263 static int
264 il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
265 {
266 int ret;
267
268 BUG_ON(!(cmd->flags & CMD_ASYNC));
269
270 /* An asynchronous command can not expect an SKB to be set. */
271 BUG_ON(cmd->flags & CMD_WANT_SKB);
272
273 /* Assign a generic callback if one is not provided */
274 if (!cmd->callback)
275 cmd->callback = il_generic_cmd_callback;
276
277 if (test_bit(S_EXIT_PENDING, &il->status))
278 return -EBUSY;
279
280 ret = il_enqueue_hcmd(il, cmd);
281 if (ret < 0) {
282 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
283 il_get_cmd_string(cmd->id), ret);
284 return ret;
285 }
286 return 0;
287 }
288
289 int
290 il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
291 {
292 int cmd_idx;
293 int ret;
294
295 lockdep_assert_held(&il->mutex);
296
297 BUG_ON(cmd->flags & CMD_ASYNC);
298
299 /* A synchronous command can not have a callback set. */
300 BUG_ON(cmd->callback);
301
302 D_INFO("Attempting to send sync command %s\n",
303 il_get_cmd_string(cmd->id));
304
305 set_bit(S_HCMD_ACTIVE, &il->status);
306 D_INFO("Setting HCMD_ACTIVE for command %s\n",
307 il_get_cmd_string(cmd->id));
308
309 cmd_idx = il_enqueue_hcmd(il, cmd);
310 if (cmd_idx < 0) {
311 ret = cmd_idx;
312 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
313 il_get_cmd_string(cmd->id), ret);
314 goto out;
315 }
316
317 ret = wait_event_timeout(il->wait_command_queue,
318 !test_bit(S_HCMD_ACTIVE, &il->status),
319 HOST_COMPLETE_TIMEOUT);
320 if (!ret) {
321 if (test_bit(S_HCMD_ACTIVE, &il->status)) {
322 IL_ERR("Error sending %s: time out after %dms.\n",
323 il_get_cmd_string(cmd->id),
324 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
325
326 clear_bit(S_HCMD_ACTIVE, &il->status);
327 D_INFO("Clearing HCMD_ACTIVE for command %s\n",
328 il_get_cmd_string(cmd->id));
329 ret = -ETIMEDOUT;
330 goto cancel;
331 }
332 }
333
334 if (test_bit(S_RFKILL, &il->status)) {
335 IL_ERR("Command %s aborted: RF KILL Switch\n",
336 il_get_cmd_string(cmd->id));
337 ret = -ECANCELED;
338 goto fail;
339 }
340 if (test_bit(S_FW_ERROR, &il->status)) {
341 IL_ERR("Command %s failed: FW Error\n",
342 il_get_cmd_string(cmd->id));
343 ret = -EIO;
344 goto fail;
345 }
346 if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
347 IL_ERR("Error: Response NULL in '%s'\n",
348 il_get_cmd_string(cmd->id));
349 ret = -EIO;
350 goto cancel;
351 }
352
353 ret = 0;
354 goto out;
355
356 cancel:
357 if (cmd->flags & CMD_WANT_SKB) {
358 /*
359 * Cancel the CMD_WANT_SKB flag for the cmd in the
360 * TX cmd queue. Otherwise in case the cmd comes
361 * in later, it will possibly set an invalid
362 * address (cmd->meta.source).
363 */
364 il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB;
365 }
366 fail:
367 if (cmd->reply_page) {
368 il_free_pages(il, cmd->reply_page);
369 cmd->reply_page = 0;
370 }
371 out:
372 return ret;
373 }
374 EXPORT_SYMBOL(il_send_cmd_sync);
375
376 int
377 il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
378 {
379 if (cmd->flags & CMD_ASYNC)
380 return il_send_cmd_async(il, cmd);
381
382 return il_send_cmd_sync(il, cmd);
383 }
384 EXPORT_SYMBOL(il_send_cmd);
385
386 int
387 il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
388 {
389 struct il_host_cmd cmd = {
390 .id = id,
391 .len = len,
392 .data = data,
393 };
394
395 return il_send_cmd_sync(il, &cmd);
396 }
397 EXPORT_SYMBOL(il_send_cmd_pdu);
398
399 int
400 il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
401 void (*callback) (struct il_priv *il,
402 struct il_device_cmd *cmd,
403 struct il_rx_pkt *pkt))
404 {
405 struct il_host_cmd cmd = {
406 .id = id,
407 .len = len,
408 .data = data,
409 };
410
411 cmd.flags |= CMD_ASYNC;
412 cmd.callback = callback;
413
414 return il_send_cmd_async(il, &cmd);
415 }
416 EXPORT_SYMBOL(il_send_cmd_pdu_async);
417
418 /* default: IL_LED_BLINK(0) using blinking idx table */
419 static int led_mode;
420 module_param(led_mode, int, 0444);
421 MODULE_PARM_DESC(led_mode,
422 "0=system default, " "1=On(RF On)/Off(RF Off), 2=blinking");
423
424 /* Throughput OFF time(ms) ON time (ms)
425 * >300 25 25
426 * >200 to 300 40 40
427 * >100 to 200 55 55
428 * >70 to 100 65 65
429 * >50 to 70 75 75
430 * >20 to 50 85 85
431 * >10 to 20 95 95
432 * >5 to 10 110 110
433 * >1 to 5 130 130
434 * >0 to 1 167 167
435 * <=0 SOLID ON
436 */
437 static const struct ieee80211_tpt_blink il_blink[] = {
438 {.throughput = 0, .blink_time = 334},
439 {.throughput = 1 * 1024 - 1, .blink_time = 260},
440 {.throughput = 5 * 1024 - 1, .blink_time = 220},
441 {.throughput = 10 * 1024 - 1, .blink_time = 190},
442 {.throughput = 20 * 1024 - 1, .blink_time = 170},
443 {.throughput = 50 * 1024 - 1, .blink_time = 150},
444 {.throughput = 70 * 1024 - 1, .blink_time = 130},
445 {.throughput = 100 * 1024 - 1, .blink_time = 110},
446 {.throughput = 200 * 1024 - 1, .blink_time = 80},
447 {.throughput = 300 * 1024 - 1, .blink_time = 50},
448 };
449
450 /*
451 * Adjust led blink rate to compensate on a MAC Clock difference on every HW
452 * Led blink rate analysis showed an average deviation of 0% on 3945,
453 * 5% on 4965 HW.
454 * Need to compensate on the led on/off time per HW according to the deviation
455 * to achieve the desired led frequency
456 * The calculation is: (100-averageDeviation)/100 * blinkTime
457 * For code efficiency the calculation will be:
458 * compensation = (100 - averageDeviation) * 64 / 100
459 * NewBlinkTime = (compensation * BlinkTime) / 64
460 */
461 static inline u8
462 il_blink_compensation(struct il_priv *il, u8 time, u16 compensation)
463 {
464 if (!compensation) {
465 IL_ERR("undefined blink compensation: "
466 "use pre-defined blinking time\n");
467 return time;
468 }
469
470 return (u8) ((time * compensation) >> 6);
471 }
472
473 /* Set led pattern command */
474 static int
475 il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off)
476 {
477 struct il_led_cmd led_cmd = {
478 .id = IL_LED_LINK,
479 .interval = IL_DEF_LED_INTRVL
480 };
481 int ret;
482
483 if (!test_bit(S_READY, &il->status))
484 return -EBUSY;
485
486 if (il->blink_on == on && il->blink_off == off)
487 return 0;
488
489 if (off == 0) {
490 /* led is SOLID_ON */
491 on = IL_LED_SOLID;
492 }
493
494 D_LED("Led blink time compensation=%u\n",
495 il->cfg->led_compensation);
496 led_cmd.on =
497 il_blink_compensation(il, on,
498 il->cfg->led_compensation);
499 led_cmd.off =
500 il_blink_compensation(il, off,
501 il->cfg->led_compensation);
502
503 ret = il->ops->send_led_cmd(il, &led_cmd);
504 if (!ret) {
505 il->blink_on = on;
506 il->blink_off = off;
507 }
508 return ret;
509 }
510
511 static void
512 il_led_brightness_set(struct led_classdev *led_cdev,
513 enum led_brightness brightness)
514 {
515 struct il_priv *il = container_of(led_cdev, struct il_priv, led);
516 unsigned long on = 0;
517
518 if (brightness > 0)
519 on = IL_LED_SOLID;
520
521 il_led_cmd(il, on, 0);
522 }
523
524 static int
525 il_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on,
526 unsigned long *delay_off)
527 {
528 struct il_priv *il = container_of(led_cdev, struct il_priv, led);
529
530 return il_led_cmd(il, *delay_on, *delay_off);
531 }
532
533 void
534 il_leds_init(struct il_priv *il)
535 {
536 int mode = led_mode;
537 int ret;
538
539 if (mode == IL_LED_DEFAULT)
540 mode = il->cfg->led_mode;
541
542 il->led.name =
543 kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy));
544 il->led.brightness_set = il_led_brightness_set;
545 il->led.blink_set = il_led_blink_set;
546 il->led.max_brightness = 1;
547
548 switch (mode) {
549 case IL_LED_DEFAULT:
550 WARN_ON(1);
551 break;
552 case IL_LED_BLINK:
553 il->led.default_trigger =
554 ieee80211_create_tpt_led_trigger(il->hw,
555 IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
556 il_blink,
557 ARRAY_SIZE(il_blink));
558 break;
559 case IL_LED_RF_STATE:
560 il->led.default_trigger = ieee80211_get_radio_led_name(il->hw);
561 break;
562 }
563
564 ret = led_classdev_register(&il->pci_dev->dev, &il->led);
565 if (ret) {
566 kfree(il->led.name);
567 return;
568 }
569
570 il->led_registered = true;
571 }
572 EXPORT_SYMBOL(il_leds_init);
573
574 void
575 il_leds_exit(struct il_priv *il)
576 {
577 if (!il->led_registered)
578 return;
579
580 led_classdev_unregister(&il->led);
581 kfree(il->led.name);
582 }
583 EXPORT_SYMBOL(il_leds_exit);
584
585 /************************** EEPROM BANDS ****************************
586 *
587 * The il_eeprom_band definitions below provide the mapping from the
588 * EEPROM contents to the specific channel number supported for each
589 * band.
590 *
591 * For example, il_priv->eeprom.band_3_channels[4] from the band_3
592 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
593 * The specific geography and calibration information for that channel
594 * is contained in the eeprom map itself.
595 *
596 * During init, we copy the eeprom information and channel map
597 * information into il->channel_info_24/52 and il->channel_map_24/52
598 *
599 * channel_map_24/52 provides the idx in the channel_info array for a
600 * given channel. We have to have two separate maps as there is channel
601 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
602 * band_2
603 *
604 * A value of 0xff stored in the channel_map indicates that the channel
605 * is not supported by the hardware at all.
606 *
607 * A value of 0xfe in the channel_map indicates that the channel is not
608 * valid for Tx with the current hardware. This means that
609 * while the system can tune and receive on a given channel, it may not
610 * be able to associate or transmit any frames on that
611 * channel. There is no corresponding channel information for that
612 * entry.
613 *
614 *********************************************************************/
615
616 /* 2.4 GHz */
617 const u8 il_eeprom_band_1[14] = {
618 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
619 };
620
621 /* 5.2 GHz bands */
622 static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
623 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
624 };
625
626 static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
627 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
628 };
629
630 static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
631 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
632 };
633
634 static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
635 145, 149, 153, 157, 161, 165
636 };
637
638 static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
639 1, 2, 3, 4, 5, 6, 7
640 };
641
642 static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
643 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
644 };
645
646 /******************************************************************************
647 *
648 * EEPROM related functions
649 *
650 ******************************************************************************/
651
652 static int
653 il_eeprom_verify_signature(struct il_priv *il)
654 {
655 u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
656 int ret = 0;
657
658 D_EEPROM("EEPROM signature=0x%08x\n", gp);
659 switch (gp) {
660 case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
661 case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
662 break;
663 default:
664 IL_ERR("bad EEPROM signature," "EEPROM_GP=0x%08x\n", gp);
665 ret = -ENOENT;
666 break;
667 }
668 return ret;
669 }
670
671 const u8 *
672 il_eeprom_query_addr(const struct il_priv *il, size_t offset)
673 {
674 BUG_ON(offset >= il->cfg->eeprom_size);
675 return &il->eeprom[offset];
676 }
677 EXPORT_SYMBOL(il_eeprom_query_addr);
678
679 u16
680 il_eeprom_query16(const struct il_priv *il, size_t offset)
681 {
682 if (!il->eeprom)
683 return 0;
684 return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8);
685 }
686 EXPORT_SYMBOL(il_eeprom_query16);
687
688 /**
689 * il_eeprom_init - read EEPROM contents
690 *
691 * Load the EEPROM contents from adapter into il->eeprom
692 *
693 * NOTE: This routine uses the non-debug IO access functions.
694 */
695 int
696 il_eeprom_init(struct il_priv *il)
697 {
698 __le16 *e;
699 u32 gp = _il_rd(il, CSR_EEPROM_GP);
700 int sz;
701 int ret;
702 int addr;
703
704 /* allocate eeprom */
705 sz = il->cfg->eeprom_size;
706 D_EEPROM("NVM size = %d\n", sz);
707 il->eeprom = kzalloc(sz, GFP_KERNEL);
708 if (!il->eeprom)
709 return -ENOMEM;
710
711 e = (__le16 *) il->eeprom;
712
713 il->ops->apm_init(il);
714
715 ret = il_eeprom_verify_signature(il);
716 if (ret < 0) {
717 IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
718 ret = -ENOENT;
719 goto err;
720 }
721
722 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
723 ret = il->ops->eeprom_acquire_semaphore(il);
724 if (ret < 0) {
725 IL_ERR("Failed to acquire EEPROM semaphore.\n");
726 ret = -ENOENT;
727 goto err;
728 }
729
730 /* eeprom is an array of 16bit values */
731 for (addr = 0; addr < sz; addr += sizeof(u16)) {
732 u32 r;
733
734 _il_wr(il, CSR_EEPROM_REG,
735 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
736
737 ret =
738 _il_poll_bit(il, CSR_EEPROM_REG,
739 CSR_EEPROM_REG_READ_VALID_MSK,
740 CSR_EEPROM_REG_READ_VALID_MSK,
741 IL_EEPROM_ACCESS_TIMEOUT);
742 if (ret < 0) {
743 IL_ERR("Time out reading EEPROM[%d]\n", addr);
744 goto done;
745 }
746 r = _il_rd(il, CSR_EEPROM_REG);
747 e[addr / 2] = cpu_to_le16(r >> 16);
748 }
749
750 D_EEPROM("NVM Type: %s, version: 0x%x\n", "EEPROM",
751 il_eeprom_query16(il, EEPROM_VERSION));
752
753 ret = 0;
754 done:
755 il->ops->eeprom_release_semaphore(il);
756
757 err:
758 if (ret)
759 il_eeprom_free(il);
760 /* Reset chip to save power until we load uCode during "up". */
761 il_apm_stop(il);
762 return ret;
763 }
764 EXPORT_SYMBOL(il_eeprom_init);
765
766 void
767 il_eeprom_free(struct il_priv *il)
768 {
769 kfree(il->eeprom);
770 il->eeprom = NULL;
771 }
772 EXPORT_SYMBOL(il_eeprom_free);
773
774 static void
775 il_init_band_reference(const struct il_priv *il, int eep_band,
776 int *eeprom_ch_count,
777 const struct il_eeprom_channel **eeprom_ch_info,
778 const u8 **eeprom_ch_idx)
779 {
780 u32 offset = il->cfg->regulatory_bands[eep_band - 1];
781
782 switch (eep_band) {
783 case 1: /* 2.4GHz band */
784 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
785 *eeprom_ch_info =
786 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
787 offset);
788 *eeprom_ch_idx = il_eeprom_band_1;
789 break;
790 case 2: /* 4.9GHz band */
791 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
792 *eeprom_ch_info =
793 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
794 offset);
795 *eeprom_ch_idx = il_eeprom_band_2;
796 break;
797 case 3: /* 5.2GHz band */
798 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
799 *eeprom_ch_info =
800 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
801 offset);
802 *eeprom_ch_idx = il_eeprom_band_3;
803 break;
804 case 4: /* 5.5GHz band */
805 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
806 *eeprom_ch_info =
807 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
808 offset);
809 *eeprom_ch_idx = il_eeprom_band_4;
810 break;
811 case 5: /* 5.7GHz band */
812 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
813 *eeprom_ch_info =
814 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
815 offset);
816 *eeprom_ch_idx = il_eeprom_band_5;
817 break;
818 case 6: /* 2.4GHz ht40 channels */
819 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
820 *eeprom_ch_info =
821 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
822 offset);
823 *eeprom_ch_idx = il_eeprom_band_6;
824 break;
825 case 7: /* 5 GHz ht40 channels */
826 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
827 *eeprom_ch_info =
828 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
829 offset);
830 *eeprom_ch_idx = il_eeprom_band_7;
831 break;
832 default:
833 BUG();
834 }
835 }
836
837 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
838 ? # x " " : "")
839 /**
840 * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
841 *
842 * Does not set up a command, or touch hardware.
843 */
844 static int
845 il_mod_ht40_chan_info(struct il_priv *il, enum nl80211_band band, u16 channel,
846 const struct il_eeprom_channel *eeprom_ch,
847 u8 clear_ht40_extension_channel)
848 {
849 struct il_channel_info *ch_info;
850
851 ch_info =
852 (struct il_channel_info *)il_get_channel_info(il, band, channel);
853
854 if (!il_is_channel_valid(ch_info))
855 return -1;
856
857 D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
858 " Ad-Hoc %ssupported\n", ch_info->channel,
859 il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
860 CHECK_AND_PRINT(IBSS), CHECK_AND_PRINT(ACTIVE),
861 CHECK_AND_PRINT(RADAR), CHECK_AND_PRINT(WIDE),
862 CHECK_AND_PRINT(DFS), eeprom_ch->flags,
863 eeprom_ch->max_power_avg,
864 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
865 !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" : "not ");
866
867 ch_info->ht40_eeprom = *eeprom_ch;
868 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
869 ch_info->ht40_flags = eeprom_ch->flags;
870 if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
871 ch_info->ht40_extension_channel &=
872 ~clear_ht40_extension_channel;
873
874 return 0;
875 }
876
877 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
878 ? # x " " : "")
879
880 /**
881 * il_init_channel_map - Set up driver's info for all possible channels
882 */
883 int
884 il_init_channel_map(struct il_priv *il)
885 {
886 int eeprom_ch_count = 0;
887 const u8 *eeprom_ch_idx = NULL;
888 const struct il_eeprom_channel *eeprom_ch_info = NULL;
889 int band, ch;
890 struct il_channel_info *ch_info;
891
892 if (il->channel_count) {
893 D_EEPROM("Channel map already initialized.\n");
894 return 0;
895 }
896
897 D_EEPROM("Initializing regulatory info from EEPROM\n");
898
899 il->channel_count =
900 ARRAY_SIZE(il_eeprom_band_1) + ARRAY_SIZE(il_eeprom_band_2) +
901 ARRAY_SIZE(il_eeprom_band_3) + ARRAY_SIZE(il_eeprom_band_4) +
902 ARRAY_SIZE(il_eeprom_band_5);
903
904 D_EEPROM("Parsing data for %d channels.\n", il->channel_count);
905
906 il->channel_info =
907 kcalloc(il->channel_count, sizeof(struct il_channel_info),
908 GFP_KERNEL);
909 if (!il->channel_info) {
910 IL_ERR("Could not allocate channel_info\n");
911 il->channel_count = 0;
912 return -ENOMEM;
913 }
914
915 ch_info = il->channel_info;
916
917 /* Loop through the 5 EEPROM bands adding them in order to the
918 * channel map we maintain (that contains additional information than
919 * what just in the EEPROM) */
920 for (band = 1; band <= 5; band++) {
921
922 il_init_band_reference(il, band, &eeprom_ch_count,
923 &eeprom_ch_info, &eeprom_ch_idx);
924
925 /* Loop through each band adding each of the channels */
926 for (ch = 0; ch < eeprom_ch_count; ch++) {
927 ch_info->channel = eeprom_ch_idx[ch];
928 ch_info->band =
929 (band ==
930 1) ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
931
932 /* permanently store EEPROM's channel regulatory flags
933 * and max power in channel info database. */
934 ch_info->eeprom = eeprom_ch_info[ch];
935
936 /* Copy the run-time flags so they are there even on
937 * invalid channels */
938 ch_info->flags = eeprom_ch_info[ch].flags;
939 /* First write that ht40 is not enabled, and then enable
940 * one by one */
941 ch_info->ht40_extension_channel =
942 IEEE80211_CHAN_NO_HT40;
943
944 if (!(il_is_channel_valid(ch_info))) {
945 D_EEPROM("Ch. %d Flags %x [%sGHz] - "
946 "No traffic\n", ch_info->channel,
947 ch_info->flags,
948 il_is_channel_a_band(ch_info) ? "5.2" :
949 "2.4");
950 ch_info++;
951 continue;
952 }
953
954 /* Initialize regulatory-based run-time data */
955 ch_info->max_power_avg = ch_info->curr_txpow =
956 eeprom_ch_info[ch].max_power_avg;
957 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
958 ch_info->min_power = 0;
959
960 D_EEPROM("Ch. %d [%sGHz] " "%s%s%s%s%s%s(0x%02x %ddBm):"
961 " Ad-Hoc %ssupported\n", ch_info->channel,
962 il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
963 CHECK_AND_PRINT_I(VALID),
964 CHECK_AND_PRINT_I(IBSS),
965 CHECK_AND_PRINT_I(ACTIVE),
966 CHECK_AND_PRINT_I(RADAR),
967 CHECK_AND_PRINT_I(WIDE),
968 CHECK_AND_PRINT_I(DFS),
969 eeprom_ch_info[ch].flags,
970 eeprom_ch_info[ch].max_power_avg,
971 ((eeprom_ch_info[ch].
972 flags & EEPROM_CHANNEL_IBSS) &&
973 !(eeprom_ch_info[ch].
974 flags & EEPROM_CHANNEL_RADAR)) ? "" :
975 "not ");
976
977 ch_info++;
978 }
979 }
980
981 /* Check if we do have HT40 channels */
982 if (il->cfg->regulatory_bands[5] == EEPROM_REGULATORY_BAND_NO_HT40 &&
983 il->cfg->regulatory_bands[6] == EEPROM_REGULATORY_BAND_NO_HT40)
984 return 0;
985
986 /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
987 for (band = 6; band <= 7; band++) {
988 enum nl80211_band ieeeband;
989
990 il_init_band_reference(il, band, &eeprom_ch_count,
991 &eeprom_ch_info, &eeprom_ch_idx);
992
993 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
994 ieeeband =
995 (band == 6) ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
996
997 /* Loop through each band adding each of the channels */
998 for (ch = 0; ch < eeprom_ch_count; ch++) {
999 /* Set up driver's info for lower half */
1000 il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch],
1001 &eeprom_ch_info[ch],
1002 IEEE80211_CHAN_NO_HT40PLUS);
1003
1004 /* Set up driver's info for upper half */
1005 il_mod_ht40_chan_info(il, ieeeband,
1006 eeprom_ch_idx[ch] + 4,
1007 &eeprom_ch_info[ch],
1008 IEEE80211_CHAN_NO_HT40MINUS);
1009 }
1010 }
1011
1012 return 0;
1013 }
1014 EXPORT_SYMBOL(il_init_channel_map);
1015
1016 /*
1017 * il_free_channel_map - undo allocations in il_init_channel_map
1018 */
1019 void
1020 il_free_channel_map(struct il_priv *il)
1021 {
1022 kfree(il->channel_info);
1023 il->channel_count = 0;
1024 }
1025 EXPORT_SYMBOL(il_free_channel_map);
1026
1027 /**
1028 * il_get_channel_info - Find driver's ilate channel info
1029 *
1030 * Based on band and channel number.
1031 */
1032 const struct il_channel_info *
1033 il_get_channel_info(const struct il_priv *il, enum nl80211_band band,
1034 u16 channel)
1035 {
1036 int i;
1037
1038 switch (band) {
1039 case NL80211_BAND_5GHZ:
1040 for (i = 14; i < il->channel_count; i++) {
1041 if (il->channel_info[i].channel == channel)
1042 return &il->channel_info[i];
1043 }
1044 break;
1045 case NL80211_BAND_2GHZ:
1046 if (channel >= 1 && channel <= 14)
1047 return &il->channel_info[channel - 1];
1048 break;
1049 default:
1050 BUG();
1051 }
1052
1053 return NULL;
1054 }
1055 EXPORT_SYMBOL(il_get_channel_info);
1056
1057 /*
1058 * Setting power level allows the card to go to sleep when not busy.
1059 *
1060 * We calculate a sleep command based on the required latency, which
1061 * we get from mac80211.
1062 */
1063
1064 #define SLP_VEC(X0, X1, X2, X3, X4) { \
1065 cpu_to_le32(X0), \
1066 cpu_to_le32(X1), \
1067 cpu_to_le32(X2), \
1068 cpu_to_le32(X3), \
1069 cpu_to_le32(X4) \
1070 }
1071
1072 static void
1073 il_build_powertable_cmd(struct il_priv *il, struct il_powertable_cmd *cmd)
1074 {
1075 static const __le32 interval[3][IL_POWER_VEC_SIZE] = {
1076 SLP_VEC(2, 2, 4, 6, 0xFF),
1077 SLP_VEC(2, 4, 7, 10, 10),
1078 SLP_VEC(4, 7, 10, 10, 0xFF)
1079 };
1080 int i, dtim_period, no_dtim;
1081 u32 max_sleep;
1082 bool skip;
1083
1084 memset(cmd, 0, sizeof(*cmd));
1085
1086 if (il->power_data.pci_pm)
1087 cmd->flags |= IL_POWER_PCI_PM_MSK;
1088
1089 /* if no Power Save, we are done */
1090 if (il->power_data.ps_disabled)
1091 return;
1092
1093 cmd->flags = IL_POWER_DRIVER_ALLOW_SLEEP_MSK;
1094 cmd->keep_alive_seconds = 0;
1095 cmd->debug_flags = 0;
1096 cmd->rx_data_timeout = cpu_to_le32(25 * 1024);
1097 cmd->tx_data_timeout = cpu_to_le32(25 * 1024);
1098 cmd->keep_alive_beacons = 0;
1099
1100 dtim_period = il->vif ? il->vif->bss_conf.dtim_period : 0;
1101
1102 if (dtim_period <= 2) {
1103 memcpy(cmd->sleep_interval, interval[0], sizeof(interval[0]));
1104 no_dtim = 2;
1105 } else if (dtim_period <= 10) {
1106 memcpy(cmd->sleep_interval, interval[1], sizeof(interval[1]));
1107 no_dtim = 2;
1108 } else {
1109 memcpy(cmd->sleep_interval, interval[2], sizeof(interval[2]));
1110 no_dtim = 0;
1111 }
1112
1113 if (dtim_period == 0) {
1114 dtim_period = 1;
1115 skip = false;
1116 } else {
1117 skip = !!no_dtim;
1118 }
1119
1120 if (skip) {
1121 __le32 tmp = cmd->sleep_interval[IL_POWER_VEC_SIZE - 1];
1122
1123 max_sleep = le32_to_cpu(tmp);
1124 if (max_sleep == 0xFF)
1125 max_sleep = dtim_period * (skip + 1);
1126 else if (max_sleep > dtim_period)
1127 max_sleep = (max_sleep / dtim_period) * dtim_period;
1128 cmd->flags |= IL_POWER_SLEEP_OVER_DTIM_MSK;
1129 } else {
1130 max_sleep = dtim_period;
1131 cmd->flags &= ~IL_POWER_SLEEP_OVER_DTIM_MSK;
1132 }
1133
1134 for (i = 0; i < IL_POWER_VEC_SIZE; i++)
1135 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1136 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1137 }
1138
1139 static int
1140 il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
1141 {
1142 D_POWER("Sending power/sleep command\n");
1143 D_POWER("Flags value = 0x%08X\n", cmd->flags);
1144 D_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1145 D_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1146 D_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1147 le32_to_cpu(cmd->sleep_interval[0]),
1148 le32_to_cpu(cmd->sleep_interval[1]),
1149 le32_to_cpu(cmd->sleep_interval[2]),
1150 le32_to_cpu(cmd->sleep_interval[3]),
1151 le32_to_cpu(cmd->sleep_interval[4]));
1152
1153 return il_send_cmd_pdu(il, C_POWER_TBL,
1154 sizeof(struct il_powertable_cmd), cmd);
1155 }
1156
1157 static int
1158 il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force)
1159 {
1160 int ret;
1161 bool update_chains;
1162
1163 lockdep_assert_held(&il->mutex);
1164
1165 /* Don't update the RX chain when chain noise calibration is running */
1166 update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
1167 il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
1168
1169 if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
1170 return 0;
1171
1172 if (!il_is_ready_rf(il))
1173 return -EIO;
1174
1175 /* scan complete use sleep_power_next, need to be updated */
1176 memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
1177 if (test_bit(S_SCANNING, &il->status) && !force) {
1178 D_INFO("Defer power set mode while scanning\n");
1179 return 0;
1180 }
1181
1182 if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
1183 set_bit(S_POWER_PMI, &il->status);
1184
1185 ret = il_set_power(il, cmd);
1186 if (!ret) {
1187 if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
1188 clear_bit(S_POWER_PMI, &il->status);
1189
1190 if (il->ops->update_chain_flags && update_chains)
1191 il->ops->update_chain_flags(il);
1192 else if (il->ops->update_chain_flags)
1193 D_POWER("Cannot update the power, chain noise "
1194 "calibration running: %d\n",
1195 il->chain_noise_data.state);
1196
1197 memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
1198 } else
1199 IL_ERR("set power fail, ret = %d", ret);
1200
1201 return ret;
1202 }
1203
1204 int
1205 il_power_update_mode(struct il_priv *il, bool force)
1206 {
1207 struct il_powertable_cmd cmd;
1208
1209 il_build_powertable_cmd(il, &cmd);
1210
1211 return il_power_set_mode(il, &cmd, force);
1212 }
1213 EXPORT_SYMBOL(il_power_update_mode);
1214
1215 /* initialize to default */
1216 void
1217 il_power_initialize(struct il_priv *il)
1218 {
1219 u16 lctl;
1220
1221 pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
1222 il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S);
1223
1224 il->power_data.debug_sleep_level_override = -1;
1225
1226 memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd));
1227 }
1228 EXPORT_SYMBOL(il_power_initialize);
1229
1230 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
1231 * sending probe req. This should be set long enough to hear probe responses
1232 * from more than one AP. */
1233 #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
1234 #define IL_ACTIVE_DWELL_TIME_52 (20)
1235
1236 #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
1237 #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
1238
1239 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
1240 * Must be set longer than active dwell time.
1241 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
1242 #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
1243 #define IL_PASSIVE_DWELL_TIME_52 (10)
1244 #define IL_PASSIVE_DWELL_BASE (100)
1245 #define IL_CHANNEL_TUNE_TIME 5
1246
1247 static int
1248 il_send_scan_abort(struct il_priv *il)
1249 {
1250 int ret;
1251 struct il_rx_pkt *pkt;
1252 struct il_host_cmd cmd = {
1253 .id = C_SCAN_ABORT,
1254 .flags = CMD_WANT_SKB,
1255 };
1256
1257 /* Exit instantly with error when device is not ready
1258 * to receive scan abort command or it does not perform
1259 * hardware scan currently */
1260 if (!test_bit(S_READY, &il->status) ||
1261 !test_bit(S_GEO_CONFIGURED, &il->status) ||
1262 !test_bit(S_SCAN_HW, &il->status) ||
1263 test_bit(S_FW_ERROR, &il->status) ||
1264 test_bit(S_EXIT_PENDING, &il->status))
1265 return -EIO;
1266
1267 ret = il_send_cmd_sync(il, &cmd);
1268 if (ret)
1269 return ret;
1270
1271 pkt = (struct il_rx_pkt *)cmd.reply_page;
1272 if (pkt->u.status != CAN_ABORT_STATUS) {
1273 /* The scan abort will return 1 for success or
1274 * 2 for "failure". A failure condition can be
1275 * due to simply not being in an active scan which
1276 * can occur if we send the scan abort before we
1277 * the microcode has notified us that a scan is
1278 * completed. */
1279 D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
1280 ret = -EIO;
1281 }
1282
1283 il_free_pages(il, cmd.reply_page);
1284 return ret;
1285 }
1286
1287 static void
1288 il_complete_scan(struct il_priv *il, bool aborted)
1289 {
1290 struct cfg80211_scan_info info = {
1291 .aborted = aborted,
1292 };
1293
1294 /* check if scan was requested from mac80211 */
1295 if (il->scan_request) {
1296 D_SCAN("Complete scan in mac80211\n");
1297 ieee80211_scan_completed(il->hw, &info);
1298 }
1299
1300 il->scan_vif = NULL;
1301 il->scan_request = NULL;
1302 }
1303
1304 void
1305 il_force_scan_end(struct il_priv *il)
1306 {
1307 lockdep_assert_held(&il->mutex);
1308
1309 if (!test_bit(S_SCANNING, &il->status)) {
1310 D_SCAN("Forcing scan end while not scanning\n");
1311 return;
1312 }
1313
1314 D_SCAN("Forcing scan end\n");
1315 clear_bit(S_SCANNING, &il->status);
1316 clear_bit(S_SCAN_HW, &il->status);
1317 clear_bit(S_SCAN_ABORTING, &il->status);
1318 il_complete_scan(il, true);
1319 }
1320
1321 static void
1322 il_do_scan_abort(struct il_priv *il)
1323 {
1324 int ret;
1325
1326 lockdep_assert_held(&il->mutex);
1327
1328 if (!test_bit(S_SCANNING, &il->status)) {
1329 D_SCAN("Not performing scan to abort\n");
1330 return;
1331 }
1332
1333 if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
1334 D_SCAN("Scan abort in progress\n");
1335 return;
1336 }
1337
1338 ret = il_send_scan_abort(il);
1339 if (ret) {
1340 D_SCAN("Send scan abort failed %d\n", ret);
1341 il_force_scan_end(il);
1342 } else
1343 D_SCAN("Successfully send scan abort\n");
1344 }
1345
1346 /**
1347 * il_scan_cancel - Cancel any currently executing HW scan
1348 */
1349 int
1350 il_scan_cancel(struct il_priv *il)
1351 {
1352 D_SCAN("Queuing abort scan\n");
1353 queue_work(il->workqueue, &il->abort_scan);
1354 return 0;
1355 }
1356 EXPORT_SYMBOL(il_scan_cancel);
1357
1358 /**
1359 * il_scan_cancel_timeout - Cancel any currently executing HW scan
1360 * @ms: amount of time to wait (in milliseconds) for scan to abort
1361 *
1362 */
1363 int
1364 il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
1365 {
1366 unsigned long timeout = jiffies + msecs_to_jiffies(ms);
1367
1368 lockdep_assert_held(&il->mutex);
1369
1370 D_SCAN("Scan cancel timeout\n");
1371
1372 il_do_scan_abort(il);
1373
1374 while (time_before_eq(jiffies, timeout)) {
1375 if (!test_bit(S_SCAN_HW, &il->status))
1376 break;
1377 msleep(20);
1378 }
1379
1380 return test_bit(S_SCAN_HW, &il->status);
1381 }
1382 EXPORT_SYMBOL(il_scan_cancel_timeout);
1383
1384 /* Service response to C_SCAN (0x80) */
1385 static void
1386 il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb)
1387 {
1388 #ifdef CONFIG_IWLEGACY_DEBUG
1389 struct il_rx_pkt *pkt = rxb_addr(rxb);
1390 struct il_scanreq_notification *notif =
1391 (struct il_scanreq_notification *)pkt->u.raw;
1392
1393 D_SCAN("Scan request status = 0x%x\n", notif->status);
1394 #endif
1395 }
1396
1397 /* Service N_SCAN_START (0x82) */
1398 static void
1399 il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb)
1400 {
1401 struct il_rx_pkt *pkt = rxb_addr(rxb);
1402 struct il_scanstart_notification *notif =
1403 (struct il_scanstart_notification *)pkt->u.raw;
1404 il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
1405 D_SCAN("Scan start: " "%d [802.11%s] "
1406 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", notif->channel,
1407 notif->band ? "bg" : "a", le32_to_cpu(notif->tsf_high),
1408 le32_to_cpu(notif->tsf_low), notif->status, notif->beacon_timer);
1409 }
1410
1411 /* Service N_SCAN_RESULTS (0x83) */
1412 static void
1413 il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb)
1414 {
1415 #ifdef CONFIG_IWLEGACY_DEBUG
1416 struct il_rx_pkt *pkt = rxb_addr(rxb);
1417 struct il_scanresults_notification *notif =
1418 (struct il_scanresults_notification *)pkt->u.raw;
1419
1420 D_SCAN("Scan ch.res: " "%d [802.11%s] " "(TSF: 0x%08X:%08X) - %d "
1421 "elapsed=%lu usec\n", notif->channel, notif->band ? "bg" : "a",
1422 le32_to_cpu(notif->tsf_high), le32_to_cpu(notif->tsf_low),
1423 le32_to_cpu(notif->stats[0]),
1424 le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
1425 #endif
1426 }
1427
1428 /* Service N_SCAN_COMPLETE (0x84) */
1429 static void
1430 il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb)
1431 {
1432
1433 #ifdef CONFIG_IWLEGACY_DEBUG
1434 struct il_rx_pkt *pkt = rxb_addr(rxb);
1435 struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
1436 #endif
1437
1438 D_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
1439 scan_notif->scanned_channels, scan_notif->tsf_low,
1440 scan_notif->tsf_high, scan_notif->status);
1441
1442 /* The HW is no longer scanning */
1443 clear_bit(S_SCAN_HW, &il->status);
1444
1445 D_SCAN("Scan on %sGHz took %dms\n",
1446 (il->scan_band == NL80211_BAND_2GHZ) ? "2.4" : "5.2",
1447 jiffies_to_msecs(jiffies - il->scan_start));
1448
1449 queue_work(il->workqueue, &il->scan_completed);
1450 }
1451
1452 void
1453 il_setup_rx_scan_handlers(struct il_priv *il)
1454 {
1455 /* scan handlers */
1456 il->handlers[C_SCAN] = il_hdl_scan;
1457 il->handlers[N_SCAN_START] = il_hdl_scan_start;
1458 il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results;
1459 il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete;
1460 }
1461 EXPORT_SYMBOL(il_setup_rx_scan_handlers);
1462
1463 u16
1464 il_get_active_dwell_time(struct il_priv *il, enum nl80211_band band,
1465 u8 n_probes)
1466 {
1467 if (band == NL80211_BAND_5GHZ)
1468 return IL_ACTIVE_DWELL_TIME_52 +
1469 IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
1470 else
1471 return IL_ACTIVE_DWELL_TIME_24 +
1472 IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
1473 }
1474 EXPORT_SYMBOL(il_get_active_dwell_time);
1475
1476 u16
1477 il_get_passive_dwell_time(struct il_priv *il, enum nl80211_band band,
1478 struct ieee80211_vif *vif)
1479 {
1480 u16 value;
1481
1482 u16 passive =
1483 (band ==
1484 NL80211_BAND_2GHZ) ? IL_PASSIVE_DWELL_BASE +
1485 IL_PASSIVE_DWELL_TIME_24 : IL_PASSIVE_DWELL_BASE +
1486 IL_PASSIVE_DWELL_TIME_52;
1487
1488 if (il_is_any_associated(il)) {
1489 /*
1490 * If we're associated, we clamp the maximum passive
1491 * dwell time to be 98% of the smallest beacon interval
1492 * (minus 2 * channel tune time)
1493 */
1494 value = il->vif ? il->vif->bss_conf.beacon_int : 0;
1495 if (value > IL_PASSIVE_DWELL_BASE || !value)
1496 value = IL_PASSIVE_DWELL_BASE;
1497 value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
1498 passive = min(value, passive);
1499 }
1500
1501 return passive;
1502 }
1503 EXPORT_SYMBOL(il_get_passive_dwell_time);
1504
1505 void
1506 il_init_scan_params(struct il_priv *il)
1507 {
1508 u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
1509 if (!il->scan_tx_ant[NL80211_BAND_5GHZ])
1510 il->scan_tx_ant[NL80211_BAND_5GHZ] = ant_idx;
1511 if (!il->scan_tx_ant[NL80211_BAND_2GHZ])
1512 il->scan_tx_ant[NL80211_BAND_2GHZ] = ant_idx;
1513 }
1514 EXPORT_SYMBOL(il_init_scan_params);
1515
1516 static int
1517 il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif)
1518 {
1519 int ret;
1520
1521 lockdep_assert_held(&il->mutex);
1522
1523 cancel_delayed_work(&il->scan_check);
1524
1525 if (!il_is_ready_rf(il)) {
1526 IL_WARN("Request scan called when driver not ready.\n");
1527 return -EIO;
1528 }
1529
1530 if (test_bit(S_SCAN_HW, &il->status)) {
1531 D_SCAN("Multiple concurrent scan requests in parallel.\n");
1532 return -EBUSY;
1533 }
1534
1535 if (test_bit(S_SCAN_ABORTING, &il->status)) {
1536 D_SCAN("Scan request while abort pending.\n");
1537 return -EBUSY;
1538 }
1539
1540 D_SCAN("Starting scan...\n");
1541
1542 set_bit(S_SCANNING, &il->status);
1543 il->scan_start = jiffies;
1544
1545 ret = il->ops->request_scan(il, vif);
1546 if (ret) {
1547 clear_bit(S_SCANNING, &il->status);
1548 return ret;
1549 }
1550
1551 queue_delayed_work(il->workqueue, &il->scan_check,
1552 IL_SCAN_CHECK_WATCHDOG);
1553
1554 return 0;
1555 }
1556
1557 int
1558 il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1559 struct ieee80211_scan_request *hw_req)
1560 {
1561 struct cfg80211_scan_request *req = &hw_req->req;
1562 struct il_priv *il = hw->priv;
1563 int ret;
1564
1565 if (req->n_channels == 0) {
1566 IL_ERR("Can not scan on no channels.\n");
1567 return -EINVAL;
1568 }
1569
1570 mutex_lock(&il->mutex);
1571 D_MAC80211("enter\n");
1572
1573 if (test_bit(S_SCANNING, &il->status)) {
1574 D_SCAN("Scan already in progress.\n");
1575 ret = -EAGAIN;
1576 goto out_unlock;
1577 }
1578
1579 /* mac80211 will only ask for one band at a time */
1580 il->scan_request = req;
1581 il->scan_vif = vif;
1582 il->scan_band = req->channels[0]->band;
1583
1584 ret = il_scan_initiate(il, vif);
1585
1586 out_unlock:
1587 D_MAC80211("leave ret %d\n", ret);
1588 mutex_unlock(&il->mutex);
1589
1590 return ret;
1591 }
1592 EXPORT_SYMBOL(il_mac_hw_scan);
1593
1594 static void
1595 il_bg_scan_check(struct work_struct *data)
1596 {
1597 struct il_priv *il =
1598 container_of(data, struct il_priv, scan_check.work);
1599
1600 D_SCAN("Scan check work\n");
1601
1602 /* Since we are here firmware does not finish scan and
1603 * most likely is in bad shape, so we don't bother to
1604 * send abort command, just force scan complete to mac80211 */
1605 mutex_lock(&il->mutex);
1606 il_force_scan_end(il);
1607 mutex_unlock(&il->mutex);
1608 }
1609
1610 /**
1611 * il_fill_probe_req - fill in all required fields and IE for probe request
1612 */
1613
1614 u16
1615 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1616 const u8 *ta, const u8 *ies, int ie_len, int left)
1617 {
1618 int len = 0;
1619 u8 *pos = NULL;
1620
1621 /* Make sure there is enough space for the probe request,
1622 * two mandatory IEs and the data */
1623 left -= 24;
1624 if (left < 0)
1625 return 0;
1626
1627 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1628 eth_broadcast_addr(frame->da);
1629 memcpy(frame->sa, ta, ETH_ALEN);
1630 eth_broadcast_addr(frame->bssid);
1631 frame->seq_ctrl = 0;
1632
1633 len += 24;
1634
1635 /* ...next IE... */
1636 pos = &frame->u.probe_req.variable[0];
1637
1638 /* fill in our indirect SSID IE */
1639 left -= 2;
1640 if (left < 0)
1641 return 0;
1642 *pos++ = WLAN_EID_SSID;
1643 *pos++ = 0;
1644
1645 len += 2;
1646
1647 if (WARN_ON(left < ie_len))
1648 return len;
1649
1650 if (ies && ie_len) {
1651 memcpy(pos, ies, ie_len);
1652 len += ie_len;
1653 }
1654
1655 return (u16) len;
1656 }
1657 EXPORT_SYMBOL(il_fill_probe_req);
1658
1659 static void
1660 il_bg_abort_scan(struct work_struct *work)
1661 {
1662 struct il_priv *il = container_of(work, struct il_priv, abort_scan);
1663
1664 D_SCAN("Abort scan work\n");
1665
1666 /* We keep scan_check work queued in case when firmware will not
1667 * report back scan completed notification */
1668 mutex_lock(&il->mutex);
1669 il_scan_cancel_timeout(il, 200);
1670 mutex_unlock(&il->mutex);
1671 }
1672
1673 static void
1674 il_bg_scan_completed(struct work_struct *work)
1675 {
1676 struct il_priv *il = container_of(work, struct il_priv, scan_completed);
1677 bool aborted;
1678
1679 D_SCAN("Completed scan.\n");
1680
1681 cancel_delayed_work(&il->scan_check);
1682
1683 mutex_lock(&il->mutex);
1684
1685 aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
1686 if (aborted)
1687 D_SCAN("Aborted scan completed.\n");
1688
1689 if (!test_and_clear_bit(S_SCANNING, &il->status)) {
1690 D_SCAN("Scan already completed.\n");
1691 goto out_settings;
1692 }
1693
1694 il_complete_scan(il, aborted);
1695
1696 out_settings:
1697 /* Can we still talk to firmware ? */
1698 if (!il_is_ready_rf(il))
1699 goto out;
1700
1701 /*
1702 * We do not commit power settings while scan is pending,
1703 * do it now if the settings changed.
1704 */
1705 il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
1706 il_set_tx_power(il, il->tx_power_next, false);
1707
1708 il->ops->post_scan(il);
1709
1710 out:
1711 mutex_unlock(&il->mutex);
1712 }
1713
1714 void
1715 il_setup_scan_deferred_work(struct il_priv *il)
1716 {
1717 INIT_WORK(&il->scan_completed, il_bg_scan_completed);
1718 INIT_WORK(&il->abort_scan, il_bg_abort_scan);
1719 INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
1720 }
1721 EXPORT_SYMBOL(il_setup_scan_deferred_work);
1722
1723 void
1724 il_cancel_scan_deferred_work(struct il_priv *il)
1725 {
1726 cancel_work_sync(&il->abort_scan);
1727 cancel_work_sync(&il->scan_completed);
1728
1729 if (cancel_delayed_work_sync(&il->scan_check)) {
1730 mutex_lock(&il->mutex);
1731 il_force_scan_end(il);
1732 mutex_unlock(&il->mutex);
1733 }
1734 }
1735 EXPORT_SYMBOL(il_cancel_scan_deferred_work);
1736
1737 /* il->sta_lock must be held */
1738 static void
1739 il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
1740 {
1741
1742 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
1743 IL_ERR("ACTIVATE a non DRIVER active station id %u addr %pM\n",
1744 sta_id, il->stations[sta_id].sta.sta.addr);
1745
1746 if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
1747 D_ASSOC("STA id %u addr %pM already present"
1748 " in uCode (according to driver)\n", sta_id,
1749 il->stations[sta_id].sta.sta.addr);
1750 } else {
1751 il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
1752 D_ASSOC("Added STA id %u addr %pM to uCode\n", sta_id,
1753 il->stations[sta_id].sta.sta.addr);
1754 }
1755 }
1756
1757 static int
1758 il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta,
1759 struct il_rx_pkt *pkt, bool sync)
1760 {
1761 u8 sta_id = addsta->sta.sta_id;
1762 unsigned long flags;
1763 int ret = -EIO;
1764
1765 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1766 IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", pkt->hdr.flags);
1767 return ret;
1768 }
1769
1770 D_INFO("Processing response for adding station %u\n", sta_id);
1771
1772 spin_lock_irqsave(&il->sta_lock, flags);
1773
1774 switch (pkt->u.add_sta.status) {
1775 case ADD_STA_SUCCESS_MSK:
1776 D_INFO("C_ADD_STA PASSED\n");
1777 il_sta_ucode_activate(il, sta_id);
1778 ret = 0;
1779 break;
1780 case ADD_STA_NO_ROOM_IN_TBL:
1781 IL_ERR("Adding station %d failed, no room in table.\n", sta_id);
1782 break;
1783 case ADD_STA_NO_BLOCK_ACK_RESOURCE:
1784 IL_ERR("Adding station %d failed, no block ack resource.\n",
1785 sta_id);
1786 break;
1787 case ADD_STA_MODIFY_NON_EXIST_STA:
1788 IL_ERR("Attempting to modify non-existing station %d\n",
1789 sta_id);
1790 break;
1791 default:
1792 D_ASSOC("Received C_ADD_STA:(0x%08X)\n", pkt->u.add_sta.status);
1793 break;
1794 }
1795
1796 D_INFO("%s station id %u addr %pM\n",
1797 il->stations[sta_id].sta.mode ==
1798 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", sta_id,
1799 il->stations[sta_id].sta.sta.addr);
1800
1801 /*
1802 * XXX: The MAC address in the command buffer is often changed from
1803 * the original sent to the device. That is, the MAC address
1804 * written to the command buffer often is not the same MAC address
1805 * read from the command buffer when the command returns. This
1806 * issue has not yet been resolved and this debugging is left to
1807 * observe the problem.
1808 */
1809 D_INFO("%s station according to cmd buffer %pM\n",
1810 il->stations[sta_id].sta.mode ==
1811 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", addsta->sta.addr);
1812 spin_unlock_irqrestore(&il->sta_lock, flags);
1813
1814 return ret;
1815 }
1816
1817 static void
1818 il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd,
1819 struct il_rx_pkt *pkt)
1820 {
1821 struct il_addsta_cmd *addsta = (struct il_addsta_cmd *)cmd->cmd.payload;
1822
1823 il_process_add_sta_resp(il, addsta, pkt, false);
1824
1825 }
1826
1827 int
1828 il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags)
1829 {
1830 struct il_rx_pkt *pkt = NULL;
1831 int ret = 0;
1832 u8 data[sizeof(*sta)];
1833 struct il_host_cmd cmd = {
1834 .id = C_ADD_STA,
1835 .flags = flags,
1836 .data = data,
1837 };
1838 u8 sta_id __maybe_unused = sta->sta.sta_id;
1839
1840 D_INFO("Adding sta %u (%pM) %ssynchronously\n", sta_id, sta->sta.addr,
1841 flags & CMD_ASYNC ? "a" : "");
1842
1843 if (flags & CMD_ASYNC)
1844 cmd.callback = il_add_sta_callback;
1845 else {
1846 cmd.flags |= CMD_WANT_SKB;
1847 might_sleep();
1848 }
1849
1850 cmd.len = il->ops->build_addsta_hcmd(sta, data);
1851 ret = il_send_cmd(il, &cmd);
1852 if (ret)
1853 return ret;
1854 if (flags & CMD_ASYNC)
1855 return 0;
1856
1857 pkt = (struct il_rx_pkt *)cmd.reply_page;
1858 ret = il_process_add_sta_resp(il, sta, pkt, true);
1859
1860 il_free_pages(il, cmd.reply_page);
1861
1862 return ret;
1863 }
1864 EXPORT_SYMBOL(il_send_add_sta);
1865
1866 static void
1867 il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta)
1868 {
1869 struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
1870 __le32 sta_flags;
1871
1872 if (!sta || !sta_ht_inf->ht_supported)
1873 goto done;
1874
1875 D_ASSOC("spatial multiplexing power save mode: %s\n",
1876 (sta->smps_mode == IEEE80211_SMPS_STATIC) ? "static" :
1877 (sta->smps_mode == IEEE80211_SMPS_DYNAMIC) ? "dynamic" :
1878 "disabled");
1879
1880 sta_flags = il->stations[idx].sta.station_flags;
1881
1882 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
1883
1884 switch (sta->smps_mode) {
1885 case IEEE80211_SMPS_STATIC:
1886 sta_flags |= STA_FLG_MIMO_DIS_MSK;
1887 break;
1888 case IEEE80211_SMPS_DYNAMIC:
1889 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
1890 break;
1891 case IEEE80211_SMPS_OFF:
1892 break;
1893 default:
1894 IL_WARN("Invalid MIMO PS mode %d\n", sta->smps_mode);
1895 break;
1896 }
1897
1898 sta_flags |=
1899 cpu_to_le32((u32) sta_ht_inf->
1900 ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
1901
1902 sta_flags |=
1903 cpu_to_le32((u32) sta_ht_inf->
1904 ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
1905
1906 if (il_is_ht40_tx_allowed(il, &sta->ht_cap))
1907 sta_flags |= STA_FLG_HT40_EN_MSK;
1908 else
1909 sta_flags &= ~STA_FLG_HT40_EN_MSK;
1910
1911 il->stations[idx].sta.station_flags = sta_flags;
1912 done:
1913 return;
1914 }
1915
1916 /**
1917 * il_prep_station - Prepare station information for addition
1918 *
1919 * should be called with sta_lock held
1920 */
1921 u8
1922 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
1923 struct ieee80211_sta *sta)
1924 {
1925 struct il_station_entry *station;
1926 int i;
1927 u8 sta_id = IL_INVALID_STATION;
1928 u16 rate;
1929
1930 if (is_ap)
1931 sta_id = IL_AP_ID;
1932 else if (is_broadcast_ether_addr(addr))
1933 sta_id = il->hw_params.bcast_id;
1934 else
1935 for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
1936 if (ether_addr_equal(il->stations[i].sta.sta.addr,
1937 addr)) {
1938 sta_id = i;
1939 break;
1940 }
1941
1942 if (!il->stations[i].used &&
1943 sta_id == IL_INVALID_STATION)
1944 sta_id = i;
1945 }
1946
1947 /*
1948 * These two conditions have the same outcome, but keep them
1949 * separate
1950 */
1951 if (unlikely(sta_id == IL_INVALID_STATION))
1952 return sta_id;
1953
1954 /*
1955 * uCode is not able to deal with multiple requests to add a
1956 * station. Keep track if one is in progress so that we do not send
1957 * another.
1958 */
1959 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
1960 D_INFO("STA %d already in process of being added.\n", sta_id);
1961 return sta_id;
1962 }
1963
1964 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
1965 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
1966 ether_addr_equal(il->stations[sta_id].sta.sta.addr, addr)) {
1967 D_ASSOC("STA %d (%pM) already added, not adding again.\n",
1968 sta_id, addr);
1969 return sta_id;
1970 }
1971
1972 station = &il->stations[sta_id];
1973 station->used = IL_STA_DRIVER_ACTIVE;
1974 D_ASSOC("Add STA to driver ID %d: %pM\n", sta_id, addr);
1975 il->num_stations++;
1976
1977 /* Set up the C_ADD_STA command to send to device */
1978 memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
1979 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
1980 station->sta.mode = 0;
1981 station->sta.sta.sta_id = sta_id;
1982 station->sta.station_flags = 0;
1983
1984 /*
1985 * OK to call unconditionally, since local stations (IBSS BSSID
1986 * STA and broadcast STA) pass in a NULL sta, and mac80211
1987 * doesn't allow HT IBSS.
1988 */
1989 il_set_ht_add_station(il, sta_id, sta);
1990
1991 /* 3945 only */
1992 rate = (il->band == NL80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP;
1993 /* Turn on both antennas for the station... */
1994 station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
1995
1996 return sta_id;
1997
1998 }
1999 EXPORT_SYMBOL_GPL(il_prep_station);
2000
2001 #define STA_WAIT_TIMEOUT (HZ/2)
2002
2003 /**
2004 * il_add_station_common -
2005 */
2006 int
2007 il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
2008 struct ieee80211_sta *sta, u8 *sta_id_r)
2009 {
2010 unsigned long flags_spin;
2011 int ret = 0;
2012 u8 sta_id;
2013 struct il_addsta_cmd sta_cmd;
2014
2015 *sta_id_r = 0;
2016 spin_lock_irqsave(&il->sta_lock, flags_spin);
2017 sta_id = il_prep_station(il, addr, is_ap, sta);
2018 if (sta_id == IL_INVALID_STATION) {
2019 IL_ERR("Unable to prepare station %pM for addition\n", addr);
2020 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2021 return -EINVAL;
2022 }
2023
2024 /*
2025 * uCode is not able to deal with multiple requests to add a
2026 * station. Keep track if one is in progress so that we do not send
2027 * another.
2028 */
2029 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
2030 D_INFO("STA %d already in process of being added.\n", sta_id);
2031 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2032 return -EEXIST;
2033 }
2034
2035 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
2036 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
2037 D_ASSOC("STA %d (%pM) already added, not adding again.\n",
2038 sta_id, addr);
2039 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2040 return -EEXIST;
2041 }
2042
2043 il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
2044 memcpy(&sta_cmd, &il->stations[sta_id].sta,
2045 sizeof(struct il_addsta_cmd));
2046 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2047
2048 /* Add station to device's station table */
2049 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2050 if (ret) {
2051 spin_lock_irqsave(&il->sta_lock, flags_spin);
2052 IL_ERR("Adding station %pM failed.\n",
2053 il->stations[sta_id].sta.sta.addr);
2054 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2055 il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2056 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2057 }
2058 *sta_id_r = sta_id;
2059 return ret;
2060 }
2061 EXPORT_SYMBOL(il_add_station_common);
2062
2063 /**
2064 * il_sta_ucode_deactivate - deactivate ucode status for a station
2065 *
2066 * il->sta_lock must be held
2067 */
2068 static void
2069 il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
2070 {
2071 /* Ucode must be active and driver must be non active */
2072 if ((il->stations[sta_id].
2073 used & (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
2074 IL_STA_UCODE_ACTIVE)
2075 IL_ERR("removed non active STA %u\n", sta_id);
2076
2077 il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
2078
2079 memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
2080 D_ASSOC("Removed STA %u\n", sta_id);
2081 }
2082
2083 static int
2084 il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id,
2085 bool temporary)
2086 {
2087 struct il_rx_pkt *pkt;
2088 int ret;
2089
2090 unsigned long flags_spin;
2091 struct il_rem_sta_cmd rm_sta_cmd;
2092
2093 struct il_host_cmd cmd = {
2094 .id = C_REM_STA,
2095 .len = sizeof(struct il_rem_sta_cmd),
2096 .flags = CMD_SYNC,
2097 .data = &rm_sta_cmd,
2098 };
2099
2100 memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
2101 rm_sta_cmd.num_sta = 1;
2102 memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
2103
2104 cmd.flags |= CMD_WANT_SKB;
2105
2106 ret = il_send_cmd(il, &cmd);
2107
2108 if (ret)
2109 return ret;
2110
2111 pkt = (struct il_rx_pkt *)cmd.reply_page;
2112 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
2113 IL_ERR("Bad return from C_REM_STA (0x%08X)\n", pkt->hdr.flags);
2114 ret = -EIO;
2115 }
2116
2117 if (!ret) {
2118 switch (pkt->u.rem_sta.status) {
2119 case REM_STA_SUCCESS_MSK:
2120 if (!temporary) {
2121 spin_lock_irqsave(&il->sta_lock, flags_spin);
2122 il_sta_ucode_deactivate(il, sta_id);
2123 spin_unlock_irqrestore(&il->sta_lock,
2124 flags_spin);
2125 }
2126 D_ASSOC("C_REM_STA PASSED\n");
2127 break;
2128 default:
2129 ret = -EIO;
2130 IL_ERR("C_REM_STA failed\n");
2131 break;
2132 }
2133 }
2134 il_free_pages(il, cmd.reply_page);
2135
2136 return ret;
2137 }
2138
2139 /**
2140 * il_remove_station - Remove driver's knowledge of station.
2141 */
2142 int
2143 il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr)
2144 {
2145 unsigned long flags;
2146
2147 if (!il_is_ready(il)) {
2148 D_INFO("Unable to remove station %pM, device not ready.\n",
2149 addr);
2150 /*
2151 * It is typical for stations to be removed when we are
2152 * going down. Return success since device will be down
2153 * soon anyway
2154 */
2155 return 0;
2156 }
2157
2158 D_ASSOC("Removing STA from driver:%d %pM\n", sta_id, addr);
2159
2160 if (WARN_ON(sta_id == IL_INVALID_STATION))
2161 return -EINVAL;
2162
2163 spin_lock_irqsave(&il->sta_lock, flags);
2164
2165 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2166 D_INFO("Removing %pM but non DRIVER active\n", addr);
2167 goto out_err;
2168 }
2169
2170 if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
2171 D_INFO("Removing %pM but non UCODE active\n", addr);
2172 goto out_err;
2173 }
2174
2175 if (il->stations[sta_id].used & IL_STA_LOCAL) {
2176 kfree(il->stations[sta_id].lq);
2177 il->stations[sta_id].lq = NULL;
2178 }
2179
2180 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2181
2182 il->num_stations--;
2183
2184 BUG_ON(il->num_stations < 0);
2185
2186 spin_unlock_irqrestore(&il->sta_lock, flags);
2187
2188 return il_send_remove_station(il, addr, sta_id, false);
2189 out_err:
2190 spin_unlock_irqrestore(&il->sta_lock, flags);
2191 return -EINVAL;
2192 }
2193 EXPORT_SYMBOL_GPL(il_remove_station);
2194
2195 /**
2196 * il_clear_ucode_stations - clear ucode station table bits
2197 *
2198 * This function clears all the bits in the driver indicating
2199 * which stations are active in the ucode. Call when something
2200 * other than explicit station management would cause this in
2201 * the ucode, e.g. unassociated RXON.
2202 */
2203 void
2204 il_clear_ucode_stations(struct il_priv *il)
2205 {
2206 int i;
2207 unsigned long flags_spin;
2208 bool cleared = false;
2209
2210 D_INFO("Clearing ucode stations in driver\n");
2211
2212 spin_lock_irqsave(&il->sta_lock, flags_spin);
2213 for (i = 0; i < il->hw_params.max_stations; i++) {
2214 if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
2215 D_INFO("Clearing ucode active for station %d\n", i);
2216 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2217 cleared = true;
2218 }
2219 }
2220 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2221
2222 if (!cleared)
2223 D_INFO("No active stations found to be cleared\n");
2224 }
2225 EXPORT_SYMBOL(il_clear_ucode_stations);
2226
2227 /**
2228 * il_restore_stations() - Restore driver known stations to device
2229 *
2230 * All stations considered active by driver, but not present in ucode, is
2231 * restored.
2232 *
2233 * Function sleeps.
2234 */
2235 void
2236 il_restore_stations(struct il_priv *il)
2237 {
2238 struct il_addsta_cmd sta_cmd;
2239 struct il_link_quality_cmd lq;
2240 unsigned long flags_spin;
2241 int i;
2242 bool found = false;
2243 int ret;
2244 bool send_lq;
2245
2246 if (!il_is_ready(il)) {
2247 D_INFO("Not ready yet, not restoring any stations.\n");
2248 return;
2249 }
2250
2251 D_ASSOC("Restoring all known stations ... start.\n");
2252 spin_lock_irqsave(&il->sta_lock, flags_spin);
2253 for (i = 0; i < il->hw_params.max_stations; i++) {
2254 if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
2255 !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
2256 D_ASSOC("Restoring sta %pM\n",
2257 il->stations[i].sta.sta.addr);
2258 il->stations[i].sta.mode = 0;
2259 il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
2260 found = true;
2261 }
2262 }
2263
2264 for (i = 0; i < il->hw_params.max_stations; i++) {
2265 if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
2266 memcpy(&sta_cmd, &il->stations[i].sta,
2267 sizeof(struct il_addsta_cmd));
2268 send_lq = false;
2269 if (il->stations[i].lq) {
2270 memcpy(&lq, il->stations[i].lq,
2271 sizeof(struct il_link_quality_cmd));
2272 send_lq = true;
2273 }
2274 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2275 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2276 if (ret) {
2277 spin_lock_irqsave(&il->sta_lock, flags_spin);
2278 IL_ERR("Adding station %pM failed.\n",
2279 il->stations[i].sta.sta.addr);
2280 il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE;
2281 il->stations[i].used &=
2282 ~IL_STA_UCODE_INPROGRESS;
2283 spin_unlock_irqrestore(&il->sta_lock,
2284 flags_spin);
2285 }
2286 /*
2287 * Rate scaling has already been initialized, send
2288 * current LQ command
2289 */
2290 if (send_lq)
2291 il_send_lq_cmd(il, &lq, CMD_SYNC, true);
2292 spin_lock_irqsave(&il->sta_lock, flags_spin);
2293 il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
2294 }
2295 }
2296
2297 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2298 if (!found)
2299 D_INFO("Restoring all known stations"
2300 " .... no stations to be restored.\n");
2301 else
2302 D_INFO("Restoring all known stations" " .... complete.\n");
2303 }
2304 EXPORT_SYMBOL(il_restore_stations);
2305
2306 int
2307 il_get_free_ucode_key_idx(struct il_priv *il)
2308 {
2309 int i;
2310
2311 for (i = 0; i < il->sta_key_max_num; i++)
2312 if (!test_and_set_bit(i, &il->ucode_key_table))
2313 return i;
2314
2315 return WEP_INVALID_OFFSET;
2316 }
2317 EXPORT_SYMBOL(il_get_free_ucode_key_idx);
2318
2319 void
2320 il_dealloc_bcast_stations(struct il_priv *il)
2321 {
2322 unsigned long flags;
2323 int i;
2324
2325 spin_lock_irqsave(&il->sta_lock, flags);
2326 for (i = 0; i < il->hw_params.max_stations; i++) {
2327 if (!(il->stations[i].used & IL_STA_BCAST))
2328 continue;
2329
2330 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2331 il->num_stations--;
2332 BUG_ON(il->num_stations < 0);
2333 kfree(il->stations[i].lq);
2334 il->stations[i].lq = NULL;
2335 }
2336 spin_unlock_irqrestore(&il->sta_lock, flags);
2337 }
2338 EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
2339
2340 #ifdef CONFIG_IWLEGACY_DEBUG
2341 static void
2342 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
2343 {
2344 int i;
2345 D_RATE("lq station id 0x%x\n", lq->sta_id);
2346 D_RATE("lq ant 0x%X 0x%X\n", lq->general_params.single_stream_ant_msk,
2347 lq->general_params.dual_stream_ant_msk);
2348
2349 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
2350 D_RATE("lq idx %d 0x%X\n", i, lq->rs_table[i].rate_n_flags);
2351 }
2352 #else
2353 static inline void
2354 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
2355 {
2356 }
2357 #endif
2358
2359 /**
2360 * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
2361 *
2362 * It sometimes happens when a HT rate has been in use and we
2363 * loose connectivity with AP then mac80211 will first tell us that the
2364 * current channel is not HT anymore before removing the station. In such a
2365 * scenario the RXON flags will be updated to indicate we are not
2366 * communicating HT anymore, but the LQ command may still contain HT rates.
2367 * Test for this to prevent driver from sending LQ command between the time
2368 * RXON flags are updated and when LQ command is updated.
2369 */
2370 static bool
2371 il_is_lq_table_valid(struct il_priv *il, struct il_link_quality_cmd *lq)
2372 {
2373 int i;
2374
2375 if (il->ht.enabled)
2376 return true;
2377
2378 D_INFO("Channel %u is not an HT channel\n", il->active.channel);
2379 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
2380 if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & RATE_MCS_HT_MSK) {
2381 D_INFO("idx %d of LQ expects HT channel\n", i);
2382 return false;
2383 }
2384 }
2385 return true;
2386 }
2387
2388 /**
2389 * il_send_lq_cmd() - Send link quality command
2390 * @init: This command is sent as part of station initialization right
2391 * after station has been added.
2392 *
2393 * The link quality command is sent as the last step of station creation.
2394 * This is the special case in which init is set and we call a callback in
2395 * this case to clear the state indicating that station creation is in
2396 * progress.
2397 */
2398 int
2399 il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
2400 u8 flags, bool init)
2401 {
2402 int ret = 0;
2403 unsigned long flags_spin;
2404
2405 struct il_host_cmd cmd = {
2406 .id = C_TX_LINK_QUALITY_CMD,
2407 .len = sizeof(struct il_link_quality_cmd),
2408 .flags = flags,
2409 .data = lq,
2410 };
2411
2412 if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
2413 return -EINVAL;
2414
2415 spin_lock_irqsave(&il->sta_lock, flags_spin);
2416 if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2417 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2418 return -EINVAL;
2419 }
2420 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2421
2422 il_dump_lq_cmd(il, lq);
2423 BUG_ON(init && (cmd.flags & CMD_ASYNC));
2424
2425 if (il_is_lq_table_valid(il, lq))
2426 ret = il_send_cmd(il, &cmd);
2427 else
2428 ret = -EINVAL;
2429
2430 if (cmd.flags & CMD_ASYNC)
2431 return ret;
2432
2433 if (init) {
2434 D_INFO("init LQ command complete,"
2435 " clearing sta addition status for sta %d\n",
2436 lq->sta_id);
2437 spin_lock_irqsave(&il->sta_lock, flags_spin);
2438 il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2439 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2440 }
2441 return ret;
2442 }
2443 EXPORT_SYMBOL(il_send_lq_cmd);
2444
2445 int
2446 il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2447 struct ieee80211_sta *sta)
2448 {
2449 struct il_priv *il = hw->priv;
2450 struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
2451 int ret;
2452
2453 mutex_lock(&il->mutex);
2454 D_MAC80211("enter station %pM\n", sta->addr);
2455
2456 ret = il_remove_station(il, sta_common->sta_id, sta->addr);
2457 if (ret)
2458 IL_ERR("Error removing station %pM\n", sta->addr);
2459
2460 D_MAC80211("leave ret %d\n", ret);
2461 mutex_unlock(&il->mutex);
2462
2463 return ret;
2464 }
2465 EXPORT_SYMBOL(il_mac_sta_remove);
2466
2467 /************************** RX-FUNCTIONS ****************************/
2468 /*
2469 * Rx theory of operation
2470 *
2471 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
2472 * each of which point to Receive Buffers to be filled by the NIC. These get
2473 * used not only for Rx frames, but for any command response or notification
2474 * from the NIC. The driver and NIC manage the Rx buffers by means
2475 * of idxes into the circular buffer.
2476 *
2477 * Rx Queue Indexes
2478 * The host/firmware share two idx registers for managing the Rx buffers.
2479 *
2480 * The READ idx maps to the first position that the firmware may be writing
2481 * to -- the driver can read up to (but not including) this position and get
2482 * good data.
2483 * The READ idx is managed by the firmware once the card is enabled.
2484 *
2485 * The WRITE idx maps to the last position the driver has read from -- the
2486 * position preceding WRITE is the last slot the firmware can place a packet.
2487 *
2488 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
2489 * WRITE = READ.
2490 *
2491 * During initialization, the host sets up the READ queue position to the first
2492 * IDX position, and WRITE to the last (READ - 1 wrapped)
2493 *
2494 * When the firmware places a packet in a buffer, it will advance the READ idx
2495 * and fire the RX interrupt. The driver can then query the READ idx and
2496 * process as many packets as possible, moving the WRITE idx forward as it
2497 * resets the Rx queue buffers with new memory.
2498 *
2499 * The management in the driver is as follows:
2500 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
2501 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
2502 * to replenish the iwl->rxq->rx_free.
2503 * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
2504 * iwl->rxq is replenished and the READ IDX is updated (updating the
2505 * 'processed' and 'read' driver idxes as well)
2506 * + A received packet is processed and handed to the kernel network stack,
2507 * detached from the iwl->rxq. The driver 'processed' idx is updated.
2508 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
2509 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
2510 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
2511 * were enough free buffers and RX_STALLED is set it is cleared.
2512 *
2513 *
2514 * Driver sequence:
2515 *
2516 * il_rx_queue_alloc() Allocates rx_free
2517 * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
2518 * il_rx_queue_restock
2519 * il_rx_queue_restock() Moves available buffers from rx_free into Rx
2520 * queue, updates firmware pointers, and updates
2521 * the WRITE idx. If insufficient rx_free buffers
2522 * are available, schedules il_rx_replenish
2523 *
2524 * -- enable interrupts --
2525 * ISR - il_rx() Detach il_rx_bufs from pool up to the
2526 * READ IDX, detaching the SKB from the pool.
2527 * Moves the packet buffer from queue to rx_used.
2528 * Calls il_rx_queue_restock to refill any empty
2529 * slots.
2530 * ...
2531 *
2532 */
2533
2534 /**
2535 * il_rx_queue_space - Return number of free slots available in queue.
2536 */
2537 int
2538 il_rx_queue_space(const struct il_rx_queue *q)
2539 {
2540 int s = q->read - q->write;
2541 if (s <= 0)
2542 s += RX_QUEUE_SIZE;
2543 /* keep some buffer to not confuse full and empty queue */
2544 s -= 2;
2545 if (s < 0)
2546 s = 0;
2547 return s;
2548 }
2549 EXPORT_SYMBOL(il_rx_queue_space);
2550
2551 /**
2552 * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
2553 */
2554 void
2555 il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q)
2556 {
2557 unsigned long flags;
2558 u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
2559 u32 reg;
2560
2561 spin_lock_irqsave(&q->lock, flags);
2562
2563 if (q->need_update == 0)
2564 goto exit_unlock;
2565
2566 /* If power-saving is in use, make sure device is awake */
2567 if (test_bit(S_POWER_PMI, &il->status)) {
2568 reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2569
2570 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2571 D_INFO("Rx queue requesting wakeup," " GP1 = 0x%x\n",
2572 reg);
2573 il_set_bit(il, CSR_GP_CNTRL,
2574 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2575 goto exit_unlock;
2576 }
2577
2578 q->write_actual = (q->write & ~0x7);
2579 il_wr(il, rx_wrt_ptr_reg, q->write_actual);
2580
2581 /* Else device is assumed to be awake */
2582 } else {
2583 /* Device expects a multiple of 8 */
2584 q->write_actual = (q->write & ~0x7);
2585 il_wr(il, rx_wrt_ptr_reg, q->write_actual);
2586 }
2587
2588 q->need_update = 0;
2589
2590 exit_unlock:
2591 spin_unlock_irqrestore(&q->lock, flags);
2592 }
2593 EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
2594
2595 int
2596 il_rx_queue_alloc(struct il_priv *il)
2597 {
2598 struct il_rx_queue *rxq = &il->rxq;
2599 struct device *dev = &il->pci_dev->dev;
2600 int i;
2601
2602 spin_lock_init(&rxq->lock);
2603 INIT_LIST_HEAD(&rxq->rx_free);
2604 INIT_LIST_HEAD(&rxq->rx_used);
2605
2606 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
2607 rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
2608 GFP_KERNEL);
2609 if (!rxq->bd)
2610 goto err_bd;
2611
2612 rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status),
2613 &rxq->rb_stts_dma, GFP_KERNEL);
2614 if (!rxq->rb_stts)
2615 goto err_rb;
2616
2617 /* Fill the rx_used queue with _all_ of the Rx buffers */
2618 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
2619 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
2620
2621 /* Set us so that we have processed and used all buffers, but have
2622 * not restocked the Rx queue with fresh buffers */
2623 rxq->read = rxq->write = 0;
2624 rxq->write_actual = 0;
2625 rxq->free_count = 0;
2626 rxq->need_update = 0;
2627 return 0;
2628
2629 err_rb:
2630 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
2631 rxq->bd_dma);
2632 err_bd:
2633 return -ENOMEM;
2634 }
2635 EXPORT_SYMBOL(il_rx_queue_alloc);
2636
2637 void
2638 il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb)
2639 {
2640 struct il_rx_pkt *pkt = rxb_addr(rxb);
2641 struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
2642
2643 if (!report->state) {
2644 D_11H("Spectrum Measure Notification: Start\n");
2645 return;
2646 }
2647
2648 memcpy(&il->measure_report, report, sizeof(*report));
2649 il->measurement_status |= MEASUREMENT_READY;
2650 }
2651 EXPORT_SYMBOL(il_hdl_spectrum_measurement);
2652
2653 /*
2654 * returns non-zero if packet should be dropped
2655 */
2656 int
2657 il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
2658 u32 decrypt_res, struct ieee80211_rx_status *stats)
2659 {
2660 u16 fc = le16_to_cpu(hdr->frame_control);
2661
2662 /*
2663 * All contexts have the same setting here due to it being
2664 * a module parameter, so OK to check any context.
2665 */
2666 if (il->active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2667 return 0;
2668
2669 if (!(fc & IEEE80211_FCTL_PROTECTED))
2670 return 0;
2671
2672 D_RX("decrypt_res:0x%x\n", decrypt_res);
2673 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2674 case RX_RES_STATUS_SEC_TYPE_TKIP:
2675 /* The uCode has got a bad phase 1 Key, pushes the packet.
2676 * Decryption will be done in SW. */
2677 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2678 RX_RES_STATUS_BAD_KEY_TTAK)
2679 break;
2680 /* fall through */
2681
2682 case RX_RES_STATUS_SEC_TYPE_WEP:
2683 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2684 RX_RES_STATUS_BAD_ICV_MIC) {
2685 /* bad ICV, the packet is destroyed since the
2686 * decryption is inplace, drop it */
2687 D_RX("Packet destroyed\n");
2688 return -1;
2689 }
2690 /* fall through */
2691 case RX_RES_STATUS_SEC_TYPE_CCMP:
2692 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2693 RX_RES_STATUS_DECRYPT_OK) {
2694 D_RX("hw decrypt successfully!!!\n");
2695 stats->flag |= RX_FLAG_DECRYPTED;
2696 }
2697 break;
2698
2699 default:
2700 break;
2701 }
2702 return 0;
2703 }
2704 EXPORT_SYMBOL(il_set_decrypted_flag);
2705
2706 /**
2707 * il_txq_update_write_ptr - Send new write idx to hardware
2708 */
2709 void
2710 il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
2711 {
2712 u32 reg = 0;
2713 int txq_id = txq->q.id;
2714
2715 if (txq->need_update == 0)
2716 return;
2717
2718 /* if we're trying to save power */
2719 if (test_bit(S_POWER_PMI, &il->status)) {
2720 /* wake up nic if it's powered down ...
2721 * uCode will wake up, and interrupt us again, so next
2722 * time we'll skip this part. */
2723 reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2724
2725 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2726 D_INFO("Tx queue %d requesting wakeup," " GP1 = 0x%x\n",
2727 txq_id, reg);
2728 il_set_bit(il, CSR_GP_CNTRL,
2729 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2730 return;
2731 }
2732
2733 il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
2734
2735 /*
2736 * else not in power-save mode,
2737 * uCode will never sleep when we're
2738 * trying to tx (during RFKILL, we're not trying to tx).
2739 */
2740 } else
2741 _il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
2742 txq->need_update = 0;
2743 }
2744 EXPORT_SYMBOL(il_txq_update_write_ptr);
2745
2746 /**
2747 * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
2748 */
2749 void
2750 il_tx_queue_unmap(struct il_priv *il, int txq_id)
2751 {
2752 struct il_tx_queue *txq = &il->txq[txq_id];
2753 struct il_queue *q = &txq->q;
2754
2755 if (q->n_bd == 0)
2756 return;
2757
2758 while (q->write_ptr != q->read_ptr) {
2759 il->ops->txq_free_tfd(il, txq);
2760 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2761 }
2762 }
2763 EXPORT_SYMBOL(il_tx_queue_unmap);
2764
2765 /**
2766 * il_tx_queue_free - Deallocate DMA queue.
2767 * @txq: Transmit queue to deallocate.
2768 *
2769 * Empty queue by removing and destroying all BD's.
2770 * Free all buffers.
2771 * 0-fill, but do not free "txq" descriptor structure.
2772 */
2773 void
2774 il_tx_queue_free(struct il_priv *il, int txq_id)
2775 {
2776 struct il_tx_queue *txq = &il->txq[txq_id];
2777 struct device *dev = &il->pci_dev->dev;
2778 int i;
2779
2780 il_tx_queue_unmap(il, txq_id);
2781
2782 /* De-alloc array of command/tx buffers */
2783 if (txq->cmd) {
2784 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
2785 kfree(txq->cmd[i]);
2786 }
2787
2788 /* De-alloc circular buffer of TFDs */
2789 if (txq->q.n_bd)
2790 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2791 txq->tfds, txq->q.dma_addr);
2792
2793 /* De-alloc array of per-TFD driver data */
2794 kfree(txq->skbs);
2795 txq->skbs = NULL;
2796
2797 /* deallocate arrays */
2798 kfree(txq->cmd);
2799 kfree(txq->meta);
2800 txq->cmd = NULL;
2801 txq->meta = NULL;
2802
2803 /* 0-fill queue descriptor structure */
2804 memset(txq, 0, sizeof(*txq));
2805 }
2806 EXPORT_SYMBOL(il_tx_queue_free);
2807
2808 /**
2809 * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
2810 */
2811 void
2812 il_cmd_queue_unmap(struct il_priv *il)
2813 {
2814 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2815 struct il_queue *q = &txq->q;
2816 int i;
2817
2818 if (q->n_bd == 0)
2819 return;
2820
2821 while (q->read_ptr != q->write_ptr) {
2822 i = il_get_cmd_idx(q, q->read_ptr, 0);
2823
2824 if (txq->meta[i].flags & CMD_MAPPED) {
2825 pci_unmap_single(il->pci_dev,
2826 dma_unmap_addr(&txq->meta[i], mapping),
2827 dma_unmap_len(&txq->meta[i], len),
2828 PCI_DMA_BIDIRECTIONAL);
2829 txq->meta[i].flags = 0;
2830 }
2831
2832 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2833 }
2834
2835 i = q->n_win;
2836 if (txq->meta[i].flags & CMD_MAPPED) {
2837 pci_unmap_single(il->pci_dev,
2838 dma_unmap_addr(&txq->meta[i], mapping),
2839 dma_unmap_len(&txq->meta[i], len),
2840 PCI_DMA_BIDIRECTIONAL);
2841 txq->meta[i].flags = 0;
2842 }
2843 }
2844 EXPORT_SYMBOL(il_cmd_queue_unmap);
2845
2846 /**
2847 * il_cmd_queue_free - Deallocate DMA queue.
2848 * @txq: Transmit queue to deallocate.
2849 *
2850 * Empty queue by removing and destroying all BD's.
2851 * Free all buffers.
2852 * 0-fill, but do not free "txq" descriptor structure.
2853 */
2854 void
2855 il_cmd_queue_free(struct il_priv *il)
2856 {
2857 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2858 struct device *dev = &il->pci_dev->dev;
2859 int i;
2860
2861 il_cmd_queue_unmap(il);
2862
2863 /* De-alloc array of command/tx buffers */
2864 if (txq->cmd) {
2865 for (i = 0; i <= TFD_CMD_SLOTS; i++)
2866 kfree(txq->cmd[i]);
2867 }
2868
2869 /* De-alloc circular buffer of TFDs */
2870 if (txq->q.n_bd)
2871 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2872 txq->tfds, txq->q.dma_addr);
2873
2874 /* deallocate arrays */
2875 kfree(txq->cmd);
2876 kfree(txq->meta);
2877 txq->cmd = NULL;
2878 txq->meta = NULL;
2879
2880 /* 0-fill queue descriptor structure */
2881 memset(txq, 0, sizeof(*txq));
2882 }
2883 EXPORT_SYMBOL(il_cmd_queue_free);
2884
2885 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
2886 * DMA services
2887 *
2888 * Theory of operation
2889 *
2890 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
2891 * of buffer descriptors, each of which points to one or more data buffers for
2892 * the device to read from or fill. Driver and device exchange status of each
2893 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
2894 * entries in each circular buffer, to protect against confusing empty and full
2895 * queue states.
2896 *
2897 * The device reads or writes the data in the queues via the device's several
2898 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
2899 *
2900 * For Tx queue, there are low mark and high mark limits. If, after queuing
2901 * the packet for Tx, free space become < low mark, Tx queue stopped. When
2902 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
2903 * Tx queue resumed.
2904 *
2905 * See more detailed info in 4965.h.
2906 ***************************************************/
2907
2908 int
2909 il_queue_space(const struct il_queue *q)
2910 {
2911 int s = q->read_ptr - q->write_ptr;
2912
2913 if (q->read_ptr > q->write_ptr)
2914 s -= q->n_bd;
2915
2916 if (s <= 0)
2917 s += q->n_win;
2918 /* keep some reserve to not confuse empty and full situations */
2919 s -= 2;
2920 if (s < 0)
2921 s = 0;
2922 return s;
2923 }
2924 EXPORT_SYMBOL(il_queue_space);
2925
2926
2927 /**
2928 * il_queue_init - Initialize queue's high/low-water and read/write idxes
2929 */
2930 static int
2931 il_queue_init(struct il_priv *il, struct il_queue *q, int slots, u32 id)
2932 {
2933 /*
2934 * TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
2935 * il_queue_inc_wrap and il_queue_dec_wrap are broken.
2936 */
2937 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
2938 /* FIXME: remove q->n_bd */
2939 q->n_bd = TFD_QUEUE_SIZE_MAX;
2940
2941 q->n_win = slots;
2942 q->id = id;
2943
2944 /* slots_must be power-of-two size, otherwise
2945 * il_get_cmd_idx is broken. */
2946 BUG_ON(!is_power_of_2(slots));
2947
2948 q->low_mark = q->n_win / 4;
2949 if (q->low_mark < 4)
2950 q->low_mark = 4;
2951
2952 q->high_mark = q->n_win / 8;
2953 if (q->high_mark < 2)
2954 q->high_mark = 2;
2955
2956 q->write_ptr = q->read_ptr = 0;
2957
2958 return 0;
2959 }
2960
2961 /**
2962 * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
2963 */
2964 static int
2965 il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id)
2966 {
2967 struct device *dev = &il->pci_dev->dev;
2968 size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
2969
2970 /* Driver ilate data, only for Tx (not command) queues,
2971 * not shared with device. */
2972 if (id != il->cmd_queue) {
2973 txq->skbs = kcalloc(TFD_QUEUE_SIZE_MAX,
2974 sizeof(struct sk_buff *),
2975 GFP_KERNEL);
2976 if (!txq->skbs) {
2977 IL_ERR("Fail to alloc skbs\n");
2978 goto error;
2979 }
2980 } else
2981 txq->skbs = NULL;
2982
2983 /* Circular buffer of transmit frame descriptors (TFDs),
2984 * shared with device */
2985 txq->tfds =
2986 dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, GFP_KERNEL);
2987 if (!txq->tfds)
2988 goto error;
2989
2990 txq->q.id = id;
2991
2992 return 0;
2993
2994 error:
2995 kfree(txq->skbs);
2996 txq->skbs = NULL;
2997
2998 return -ENOMEM;
2999 }
3000
3001 /**
3002 * il_tx_queue_init - Allocate and initialize one tx/cmd queue
3003 */
3004 int
3005 il_tx_queue_init(struct il_priv *il, u32 txq_id)
3006 {
3007 int i, len, ret;
3008 int slots, actual_slots;
3009 struct il_tx_queue *txq = &il->txq[txq_id];
3010
3011 /*
3012 * Alloc buffer array for commands (Tx or other types of commands).
3013 * For the command queue (#4/#9), allocate command space + one big
3014 * command for scan, since scan command is very huge; the system will
3015 * not have two scans at the same time, so only one is needed.
3016 * For normal Tx queues (all other queues), no super-size command
3017 * space is needed.
3018 */
3019 if (txq_id == il->cmd_queue) {
3020 slots = TFD_CMD_SLOTS;
3021 actual_slots = slots + 1;
3022 } else {
3023 slots = TFD_TX_CMD_SLOTS;
3024 actual_slots = slots;
3025 }
3026
3027 txq->meta =
3028 kcalloc(actual_slots, sizeof(struct il_cmd_meta), GFP_KERNEL);
3029 txq->cmd =
3030 kcalloc(actual_slots, sizeof(struct il_device_cmd *), GFP_KERNEL);
3031
3032 if (!txq->meta || !txq->cmd)
3033 goto out_free_arrays;
3034
3035 len = sizeof(struct il_device_cmd);
3036 for (i = 0; i < actual_slots; i++) {
3037 /* only happens for cmd queue */
3038 if (i == slots)
3039 len = IL_MAX_CMD_SIZE;
3040
3041 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
3042 if (!txq->cmd[i])
3043 goto err;
3044 }
3045
3046 /* Alloc driver data array and TFD circular buffer */
3047 ret = il_tx_queue_alloc(il, txq, txq_id);
3048 if (ret)
3049 goto err;
3050
3051 txq->need_update = 0;
3052
3053 /*
3054 * For the default queues 0-3, set up the swq_id
3055 * already -- all others need to get one later
3056 * (if they need one at all).
3057 */
3058 if (txq_id < 4)
3059 il_set_swq_id(txq, txq_id, txq_id);
3060
3061 /* Initialize queue's high/low-water marks, and head/tail idxes */
3062 il_queue_init(il, &txq->q, slots, txq_id);
3063
3064 /* Tell device where to find queue */
3065 il->ops->txq_init(il, txq);
3066
3067 return 0;
3068 err:
3069 for (i = 0; i < actual_slots; i++)
3070 kfree(txq->cmd[i]);
3071 out_free_arrays:
3072 kfree(txq->meta);
3073 txq->meta = NULL;
3074 kfree(txq->cmd);
3075 txq->cmd = NULL;
3076
3077 return -ENOMEM;
3078 }
3079 EXPORT_SYMBOL(il_tx_queue_init);
3080
3081 void
3082 il_tx_queue_reset(struct il_priv *il, u32 txq_id)
3083 {
3084 int slots, actual_slots;
3085 struct il_tx_queue *txq = &il->txq[txq_id];
3086
3087 if (txq_id == il->cmd_queue) {
3088 slots = TFD_CMD_SLOTS;
3089 actual_slots = TFD_CMD_SLOTS + 1;
3090 } else {
3091 slots = TFD_TX_CMD_SLOTS;
3092 actual_slots = TFD_TX_CMD_SLOTS;
3093 }
3094
3095 memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
3096 txq->need_update = 0;
3097
3098 /* Initialize queue's high/low-water marks, and head/tail idxes */
3099 il_queue_init(il, &txq->q, slots, txq_id);
3100
3101 /* Tell device where to find queue */
3102 il->ops->txq_init(il, txq);
3103 }
3104 EXPORT_SYMBOL(il_tx_queue_reset);
3105
3106 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
3107
3108 /**
3109 * il_enqueue_hcmd - enqueue a uCode command
3110 * @il: device ilate data point
3111 * @cmd: a point to the ucode command structure
3112 *
3113 * The function returns < 0 values to indicate the operation is
3114 * failed. On success, it turns the idx (> 0) of command in the
3115 * command queue.
3116 */
3117 int
3118 il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
3119 {
3120 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3121 struct il_queue *q = &txq->q;
3122 struct il_device_cmd *out_cmd;
3123 struct il_cmd_meta *out_meta;
3124 dma_addr_t phys_addr;
3125 unsigned long flags;
3126 int len;
3127 u32 idx;
3128 u16 fix_size;
3129
3130 cmd->len = il->ops->get_hcmd_size(cmd->id, cmd->len);
3131 fix_size = (u16) (cmd->len + sizeof(out_cmd->hdr));
3132
3133 /* If any of the command structures end up being larger than
3134 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
3135 * we will need to increase the size of the TFD entries
3136 * Also, check to see if command buffer should not exceed the size
3137 * of device_cmd and max_cmd_size. */
3138 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
3139 !(cmd->flags & CMD_SIZE_HUGE));
3140 BUG_ON(fix_size > IL_MAX_CMD_SIZE);
3141
3142 if (il_is_rfkill(il) || il_is_ctkill(il)) {
3143 IL_WARN("Not sending command - %s KILL\n",
3144 il_is_rfkill(il) ? "RF" : "CT");
3145 return -EIO;
3146 }
3147
3148 spin_lock_irqsave(&il->hcmd_lock, flags);
3149
3150 if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
3151 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3152
3153 IL_ERR("Restarting adapter due to command queue full\n");
3154 queue_work(il->workqueue, &il->restart);
3155 return -ENOSPC;
3156 }
3157
3158 idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
3159 out_cmd = txq->cmd[idx];
3160 out_meta = &txq->meta[idx];
3161
3162 if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
3163 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3164 return -ENOSPC;
3165 }
3166
3167 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
3168 out_meta->flags = cmd->flags | CMD_MAPPED;
3169 if (cmd->flags & CMD_WANT_SKB)
3170 out_meta->source = cmd;
3171 if (cmd->flags & CMD_ASYNC)
3172 out_meta->callback = cmd->callback;
3173
3174 out_cmd->hdr.cmd = cmd->id;
3175 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
3176
3177 /* At this point, the out_cmd now has all of the incoming cmd
3178 * information */
3179
3180 out_cmd->hdr.flags = 0;
3181 out_cmd->hdr.sequence =
3182 cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr));
3183 if (cmd->flags & CMD_SIZE_HUGE)
3184 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
3185 len = sizeof(struct il_device_cmd);
3186 if (idx == TFD_CMD_SLOTS)
3187 len = IL_MAX_CMD_SIZE;
3188
3189 #ifdef CONFIG_IWLEGACY_DEBUG
3190 switch (out_cmd->hdr.cmd) {
3191 case C_TX_LINK_QUALITY_CMD:
3192 case C_SENSITIVITY:
3193 D_HC_DUMP("Sending command %s (#%x), seq: 0x%04X, "
3194 "%d bytes at %d[%d]:%d\n",
3195 il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
3196 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
3197 q->write_ptr, idx, il->cmd_queue);
3198 break;
3199 default:
3200 D_HC("Sending command %s (#%x), seq: 0x%04X, "
3201 "%d bytes at %d[%d]:%d\n",
3202 il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
3203 le16_to_cpu(out_cmd->hdr.sequence), fix_size, q->write_ptr,
3204 idx, il->cmd_queue);
3205 }
3206 #endif
3207
3208 phys_addr =
3209 pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size,
3210 PCI_DMA_BIDIRECTIONAL);
3211 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) {
3212 idx = -ENOMEM;
3213 goto out;
3214 }
3215 dma_unmap_addr_set(out_meta, mapping, phys_addr);
3216 dma_unmap_len_set(out_meta, len, fix_size);
3217
3218 txq->need_update = 1;
3219
3220 if (il->ops->txq_update_byte_cnt_tbl)
3221 /* Set up entry in queue's byte count circular buffer */
3222 il->ops->txq_update_byte_cnt_tbl(il, txq, 0);
3223
3224 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size, 1,
3225 U32_PAD(cmd->len));
3226
3227 /* Increment and update queue's write idx */
3228 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
3229 il_txq_update_write_ptr(il, txq);
3230
3231 out:
3232 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3233 return idx;
3234 }
3235
3236 /**
3237 * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
3238 *
3239 * When FW advances 'R' idx, all entries between old and new 'R' idx
3240 * need to be reclaimed. As result, some free space forms. If there is
3241 * enough free space (> low mark), wake the stack that feeds us.
3242 */
3243 static void
3244 il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx)
3245 {
3246 struct il_tx_queue *txq = &il->txq[txq_id];
3247 struct il_queue *q = &txq->q;
3248 int nfreed = 0;
3249
3250 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
3251 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
3252 "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
3253 q->write_ptr, q->read_ptr);
3254 return;
3255 }
3256
3257 for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
3258 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3259
3260 if (nfreed++ > 0) {
3261 IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
3262 q->write_ptr, q->read_ptr);
3263 queue_work(il->workqueue, &il->restart);
3264 }
3265
3266 }
3267 }
3268
3269 /**
3270 * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3271 * @rxb: Rx buffer to reclaim
3272 *
3273 * If an Rx buffer has an async callback associated with it the callback
3274 * will be executed. The attached skb (if present) will only be freed
3275 * if the callback returns 1
3276 */
3277 void
3278 il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
3279 {
3280 struct il_rx_pkt *pkt = rxb_addr(rxb);
3281 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3282 int txq_id = SEQ_TO_QUEUE(sequence);
3283 int idx = SEQ_TO_IDX(sequence);
3284 int cmd_idx;
3285 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3286 struct il_device_cmd *cmd;
3287 struct il_cmd_meta *meta;
3288 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3289 unsigned long flags;
3290
3291 /* If a Tx command is being handled and it isn't in the actual
3292 * command queue then there a command routing bug has been introduced
3293 * in the queue management code. */
3294 if (WARN
3295 (txq_id != il->cmd_queue,
3296 "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
3297 txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr,
3298 il->txq[il->cmd_queue].q.write_ptr)) {
3299 il_print_hex_error(il, pkt, 32);
3300 return;
3301 }
3302
3303 cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
3304 cmd = txq->cmd[cmd_idx];
3305 meta = &txq->meta[cmd_idx];
3306
3307 txq->time_stamp = jiffies;
3308
3309 pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping),
3310 dma_unmap_len(meta, len), PCI_DMA_BIDIRECTIONAL);
3311
3312 /* Input error checking is done when commands are added to queue. */
3313 if (meta->flags & CMD_WANT_SKB) {
3314 meta->source->reply_page = (unsigned long)rxb_addr(rxb);
3315 rxb->page = NULL;
3316 } else if (meta->callback)
3317 meta->callback(il, cmd, pkt);
3318
3319 spin_lock_irqsave(&il->hcmd_lock, flags);
3320
3321 il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
3322
3323 if (!(meta->flags & CMD_ASYNC)) {
3324 clear_bit(S_HCMD_ACTIVE, &il->status);
3325 D_INFO("Clearing HCMD_ACTIVE for command %s\n",
3326 il_get_cmd_string(cmd->hdr.cmd));
3327 wake_up(&il->wait_command_queue);
3328 }
3329
3330 /* Mark as unmapped */
3331 meta->flags = 0;
3332
3333 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3334 }
3335 EXPORT_SYMBOL(il_tx_cmd_complete);
3336
3337 MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
3338 MODULE_VERSION(IWLWIFI_VERSION);
3339 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
3340 MODULE_LICENSE("GPL");
3341
3342 /*
3343 * set bt_coex_active to true, uCode will do kill/defer
3344 * every time the priority line is asserted (BT is sending signals on the
3345 * priority line in the PCIx).
3346 * set bt_coex_active to false, uCode will ignore the BT activity and
3347 * perform the normal operation
3348 *
3349 * User might experience transmit issue on some platform due to WiFi/BT
3350 * co-exist problem. The possible behaviors are:
3351 * Able to scan and finding all the available AP
3352 * Not able to associate with any AP
3353 * On those platforms, WiFi communication can be restored by set
3354 * "bt_coex_active" module parameter to "false"
3355 *
3356 * default: bt_coex_active = true (BT_COEX_ENABLE)
3357 */
3358 static bool bt_coex_active = true;
3359 module_param(bt_coex_active, bool, 0444);
3360 MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
3361
3362 u32 il_debug_level;
3363 EXPORT_SYMBOL(il_debug_level);
3364
3365 const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3366 EXPORT_SYMBOL(il_bcast_addr);
3367
3368 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
3369 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
3370 static void
3371 il_init_ht_hw_capab(const struct il_priv *il,
3372 struct ieee80211_sta_ht_cap *ht_info,
3373 enum nl80211_band band)
3374 {
3375 u16 max_bit_rate = 0;
3376 u8 rx_chains_num = il->hw_params.rx_chains_num;
3377 u8 tx_chains_num = il->hw_params.tx_chains_num;
3378
3379 ht_info->cap = 0;
3380 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
3381
3382 ht_info->ht_supported = true;
3383
3384 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
3385 max_bit_rate = MAX_BIT_RATE_20_MHZ;
3386 if (il->hw_params.ht40_channel & BIT(band)) {
3387 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
3388 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
3389 ht_info->mcs.rx_mask[4] = 0x01;
3390 max_bit_rate = MAX_BIT_RATE_40_MHZ;
3391 }
3392
3393 if (il->cfg->mod_params->amsdu_size_8K)
3394 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
3395
3396 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3397 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3398
3399 ht_info->mcs.rx_mask[0] = 0xFF;
3400 if (rx_chains_num >= 2)
3401 ht_info->mcs.rx_mask[1] = 0xFF;
3402 if (rx_chains_num >= 3)
3403 ht_info->mcs.rx_mask[2] = 0xFF;
3404
3405 /* Highest supported Rx data rate */
3406 max_bit_rate *= rx_chains_num;
3407 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
3408 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
3409
3410 /* Tx MCS capabilities */
3411 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
3412 if (tx_chains_num != rx_chains_num) {
3413 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
3414 ht_info->mcs.tx_params |=
3415 ((tx_chains_num -
3416 1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
3417 }
3418 }
3419
3420 /**
3421 * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
3422 */
3423 int
3424 il_init_geos(struct il_priv *il)
3425 {
3426 struct il_channel_info *ch;
3427 struct ieee80211_supported_band *sband;
3428 struct ieee80211_channel *channels;
3429 struct ieee80211_channel *geo_ch;
3430 struct ieee80211_rate *rates;
3431 int i = 0;
3432 s8 max_tx_power = 0;
3433
3434 if (il->bands[NL80211_BAND_2GHZ].n_bitrates ||
3435 il->bands[NL80211_BAND_5GHZ].n_bitrates) {
3436 D_INFO("Geography modes already initialized.\n");
3437 set_bit(S_GEO_CONFIGURED, &il->status);
3438 return 0;
3439 }
3440
3441 channels =
3442 kcalloc(il->channel_count, sizeof(struct ieee80211_channel),
3443 GFP_KERNEL);
3444 if (!channels)
3445 return -ENOMEM;
3446
3447 rates =
3448 kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
3449 GFP_KERNEL);
3450 if (!rates) {
3451 kfree(channels);
3452 return -ENOMEM;
3453 }
3454
3455 /* 5.2GHz channels start after the 2.4GHz channels */
3456 sband = &il->bands[NL80211_BAND_5GHZ];
3457 sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
3458 /* just OFDM */
3459 sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
3460 sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
3461
3462 if (il->cfg->sku & IL_SKU_N)
3463 il_init_ht_hw_capab(il, &sband->ht_cap, NL80211_BAND_5GHZ);
3464
3465 sband = &il->bands[NL80211_BAND_2GHZ];
3466 sband->channels = channels;
3467 /* OFDM & CCK */
3468 sband->bitrates = rates;
3469 sband->n_bitrates = RATE_COUNT_LEGACY;
3470
3471 if (il->cfg->sku & IL_SKU_N)
3472 il_init_ht_hw_capab(il, &sband->ht_cap, NL80211_BAND_2GHZ);
3473
3474 il->ieee_channels = channels;
3475 il->ieee_rates = rates;
3476
3477 for (i = 0; i < il->channel_count; i++) {
3478 ch = &il->channel_info[i];
3479
3480 if (!il_is_channel_valid(ch))
3481 continue;
3482
3483 sband = &il->bands[ch->band];
3484
3485 geo_ch = &sband->channels[sband->n_channels++];
3486
3487 geo_ch->center_freq =
3488 ieee80211_channel_to_frequency(ch->channel, ch->band);
3489 geo_ch->max_power = ch->max_power_avg;
3490 geo_ch->max_antenna_gain = 0xff;
3491 geo_ch->hw_value = ch->channel;
3492
3493 if (il_is_channel_valid(ch)) {
3494 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
3495 geo_ch->flags |= IEEE80211_CHAN_NO_IR;
3496
3497 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
3498 geo_ch->flags |= IEEE80211_CHAN_NO_IR;
3499
3500 if (ch->flags & EEPROM_CHANNEL_RADAR)
3501 geo_ch->flags |= IEEE80211_CHAN_RADAR;
3502
3503 geo_ch->flags |= ch->ht40_extension_channel;
3504
3505 if (ch->max_power_avg > max_tx_power)
3506 max_tx_power = ch->max_power_avg;
3507 } else {
3508 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
3509 }
3510
3511 D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", ch->channel,
3512 geo_ch->center_freq,
3513 il_is_channel_a_band(ch) ? "5.2" : "2.4",
3514 geo_ch->
3515 flags & IEEE80211_CHAN_DISABLED ? "restricted" : "valid",
3516 geo_ch->flags);
3517 }
3518
3519 il->tx_power_device_lmt = max_tx_power;
3520 il->tx_power_user_lmt = max_tx_power;
3521 il->tx_power_next = max_tx_power;
3522
3523 if (il->bands[NL80211_BAND_5GHZ].n_channels == 0 &&
3524 (il->cfg->sku & IL_SKU_A)) {
3525 IL_INFO("Incorrectly detected BG card as ABG. "
3526 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
3527 il->pci_dev->device, il->pci_dev->subsystem_device);
3528 il->cfg->sku &= ~IL_SKU_A;
3529 }
3530
3531 IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
3532 il->bands[NL80211_BAND_2GHZ].n_channels,
3533 il->bands[NL80211_BAND_5GHZ].n_channels);
3534
3535 set_bit(S_GEO_CONFIGURED, &il->status);
3536
3537 return 0;
3538 }
3539 EXPORT_SYMBOL(il_init_geos);
3540
3541 /*
3542 * il_free_geos - undo allocations in il_init_geos
3543 */
3544 void
3545 il_free_geos(struct il_priv *il)
3546 {
3547 kfree(il->ieee_channels);
3548 kfree(il->ieee_rates);
3549 clear_bit(S_GEO_CONFIGURED, &il->status);
3550 }
3551 EXPORT_SYMBOL(il_free_geos);
3552
3553 static bool
3554 il_is_channel_extension(struct il_priv *il, enum nl80211_band band,
3555 u16 channel, u8 extension_chan_offset)
3556 {
3557 const struct il_channel_info *ch_info;
3558
3559 ch_info = il_get_channel_info(il, band, channel);
3560 if (!il_is_channel_valid(ch_info))
3561 return false;
3562
3563 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
3564 return !(ch_info->
3565 ht40_extension_channel & IEEE80211_CHAN_NO_HT40PLUS);
3566 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
3567 return !(ch_info->
3568 ht40_extension_channel & IEEE80211_CHAN_NO_HT40MINUS);
3569
3570 return false;
3571 }
3572
3573 bool
3574 il_is_ht40_tx_allowed(struct il_priv *il, struct ieee80211_sta_ht_cap *ht_cap)
3575 {
3576 if (!il->ht.enabled || !il->ht.is_40mhz)
3577 return false;
3578
3579 /*
3580 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
3581 * the bit will not set if it is pure 40MHz case
3582 */
3583 if (ht_cap && !ht_cap->ht_supported)
3584 return false;
3585
3586 #ifdef CONFIG_IWLEGACY_DEBUGFS
3587 if (il->disable_ht40)
3588 return false;
3589 #endif
3590
3591 return il_is_channel_extension(il, il->band,
3592 le16_to_cpu(il->staging.channel),
3593 il->ht.extension_chan_offset);
3594 }
3595 EXPORT_SYMBOL(il_is_ht40_tx_allowed);
3596
3597 static u16 noinline
3598 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
3599 {
3600 u16 new_val;
3601 u16 beacon_factor;
3602
3603 /*
3604 * If mac80211 hasn't given us a beacon interval, program
3605 * the default into the device.
3606 */
3607 if (!beacon_val)
3608 return DEFAULT_BEACON_INTERVAL;
3609
3610 /*
3611 * If the beacon interval we obtained from the peer
3612 * is too large, we'll have to wake up more often
3613 * (and in IBSS case, we'll beacon too much)
3614 *
3615 * For example, if max_beacon_val is 4096, and the
3616 * requested beacon interval is 7000, we'll have to
3617 * use 3500 to be able to wake up on the beacons.
3618 *
3619 * This could badly influence beacon detection stats.
3620 */
3621
3622 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
3623 new_val = beacon_val / beacon_factor;
3624
3625 if (!new_val)
3626 new_val = max_beacon_val;
3627
3628 return new_val;
3629 }
3630
3631 int
3632 il_send_rxon_timing(struct il_priv *il)
3633 {
3634 u64 tsf;
3635 s32 interval_tm, rem;
3636 struct ieee80211_conf *conf = NULL;
3637 u16 beacon_int;
3638 struct ieee80211_vif *vif = il->vif;
3639
3640 conf = &il->hw->conf;
3641
3642 lockdep_assert_held(&il->mutex);
3643
3644 memset(&il->timing, 0, sizeof(struct il_rxon_time_cmd));
3645
3646 il->timing.timestamp = cpu_to_le64(il->timestamp);
3647 il->timing.listen_interval = cpu_to_le16(conf->listen_interval);
3648
3649 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
3650
3651 /*
3652 * TODO: For IBSS we need to get atim_win from mac80211,
3653 * for now just always use 0
3654 */
3655 il->timing.atim_win = 0;
3656
3657 beacon_int =
3658 il_adjust_beacon_interval(beacon_int,
3659 il->hw_params.max_beacon_itrvl *
3660 TIME_UNIT);
3661 il->timing.beacon_interval = cpu_to_le16(beacon_int);
3662
3663 tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
3664 interval_tm = beacon_int * TIME_UNIT;
3665 rem = do_div(tsf, interval_tm);
3666 il->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
3667
3668 il->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1;
3669
3670 D_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
3671 le16_to_cpu(il->timing.beacon_interval),
3672 le32_to_cpu(il->timing.beacon_init_val),
3673 le16_to_cpu(il->timing.atim_win));
3674
3675 return il_send_cmd_pdu(il, C_RXON_TIMING, sizeof(il->timing),
3676 &il->timing);
3677 }
3678 EXPORT_SYMBOL(il_send_rxon_timing);
3679
3680 void
3681 il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt)
3682 {
3683 struct il_rxon_cmd *rxon = &il->staging;
3684
3685 if (hw_decrypt)
3686 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
3687 else
3688 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
3689
3690 }
3691 EXPORT_SYMBOL(il_set_rxon_hwcrypto);
3692
3693 /* validate RXON structure is valid */
3694 int
3695 il_check_rxon_cmd(struct il_priv *il)
3696 {
3697 struct il_rxon_cmd *rxon = &il->staging;
3698 bool error = false;
3699
3700 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
3701 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
3702 IL_WARN("check 2.4G: wrong narrow\n");
3703 error = true;
3704 }
3705 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
3706 IL_WARN("check 2.4G: wrong radar\n");
3707 error = true;
3708 }
3709 } else {
3710 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
3711 IL_WARN("check 5.2G: not short slot!\n");
3712 error = true;
3713 }
3714 if (rxon->flags & RXON_FLG_CCK_MSK) {
3715 IL_WARN("check 5.2G: CCK!\n");
3716 error = true;
3717 }
3718 }
3719 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
3720 IL_WARN("mac/bssid mcast!\n");
3721 error = true;
3722 }
3723
3724 /* make sure basic rates 6Mbps and 1Mbps are supported */
3725 if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
3726 (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
3727 IL_WARN("neither 1 nor 6 are basic\n");
3728 error = true;
3729 }
3730
3731 if (le16_to_cpu(rxon->assoc_id) > 2007) {
3732 IL_WARN("aid > 2007\n");
3733 error = true;
3734 }
3735
3736 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) ==
3737 (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
3738 IL_WARN("CCK and short slot\n");
3739 error = true;
3740 }
3741
3742 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) ==
3743 (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
3744 IL_WARN("CCK and auto detect");
3745 error = true;
3746 }
3747
3748 if ((rxon->
3749 flags & (RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK)) ==
3750 RXON_FLG_TGG_PROTECT_MSK) {
3751 IL_WARN("TGg but no auto-detect\n");
3752 error = true;
3753 }
3754
3755 if (error)
3756 IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel));
3757
3758 if (error) {
3759 IL_ERR("Invalid RXON\n");
3760 return -EINVAL;
3761 }
3762 return 0;
3763 }
3764 EXPORT_SYMBOL(il_check_rxon_cmd);
3765
3766 /**
3767 * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
3768 * @il: staging_rxon is compared to active_rxon
3769 *
3770 * If the RXON structure is changing enough to require a new tune,
3771 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
3772 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
3773 */
3774 int
3775 il_full_rxon_required(struct il_priv *il)
3776 {
3777 const struct il_rxon_cmd *staging = &il->staging;
3778 const struct il_rxon_cmd *active = &il->active;
3779
3780 #define CHK(cond) \
3781 if ((cond)) { \
3782 D_INFO("need full RXON - " #cond "\n"); \
3783 return 1; \
3784 }
3785
3786 #define CHK_NEQ(c1, c2) \
3787 if ((c1) != (c2)) { \
3788 D_INFO("need full RXON - " \
3789 #c1 " != " #c2 " - %d != %d\n", \
3790 (c1), (c2)); \
3791 return 1; \
3792 }
3793
3794 /* These items are only settable from the full RXON command */
3795 CHK(!il_is_associated(il));
3796 CHK(!ether_addr_equal_64bits(staging->bssid_addr, active->bssid_addr));
3797 CHK(!ether_addr_equal_64bits(staging->node_addr, active->node_addr));
3798 CHK(!ether_addr_equal_64bits(staging->wlap_bssid_addr,
3799 active->wlap_bssid_addr));
3800 CHK_NEQ(staging->dev_type, active->dev_type);
3801 CHK_NEQ(staging->channel, active->channel);
3802 CHK_NEQ(staging->air_propagation, active->air_propagation);
3803 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
3804 active->ofdm_ht_single_stream_basic_rates);
3805 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
3806 active->ofdm_ht_dual_stream_basic_rates);
3807 CHK_NEQ(staging->assoc_id, active->assoc_id);
3808
3809 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
3810 * be updated with the RXON_ASSOC command -- however only some
3811 * flag transitions are allowed using RXON_ASSOC */
3812
3813 /* Check if we are not switching bands */
3814 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
3815 active->flags & RXON_FLG_BAND_24G_MSK);
3816
3817 /* Check if we are switching association toggle */
3818 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
3819 active->filter_flags & RXON_FILTER_ASSOC_MSK);
3820
3821 #undef CHK
3822 #undef CHK_NEQ
3823
3824 return 0;
3825 }
3826 EXPORT_SYMBOL(il_full_rxon_required);
3827
3828 u8
3829 il_get_lowest_plcp(struct il_priv *il)
3830 {
3831 /*
3832 * Assign the lowest rate -- should really get this from
3833 * the beacon skb from mac80211.
3834 */
3835 if (il->staging.flags & RXON_FLG_BAND_24G_MSK)
3836 return RATE_1M_PLCP;
3837 else
3838 return RATE_6M_PLCP;
3839 }
3840 EXPORT_SYMBOL(il_get_lowest_plcp);
3841
3842 static void
3843 _il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
3844 {
3845 struct il_rxon_cmd *rxon = &il->staging;
3846
3847 if (!il->ht.enabled) {
3848 rxon->flags &=
3849 ~(RXON_FLG_CHANNEL_MODE_MSK |
3850 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | RXON_FLG_HT40_PROT_MSK
3851 | RXON_FLG_HT_PROT_MSK);
3852 return;
3853 }
3854
3855 rxon->flags |=
3856 cpu_to_le32(il->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
3857
3858 /* Set up channel bandwidth:
3859 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
3860 /* clear the HT channel mode before set the mode */
3861 rxon->flags &=
3862 ~(RXON_FLG_CHANNEL_MODE_MSK | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3863 if (il_is_ht40_tx_allowed(il, NULL)) {
3864 /* pure ht40 */
3865 if (il->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
3866 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
3867 /* Note: control channel is opposite of extension channel */
3868 switch (il->ht.extension_chan_offset) {
3869 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
3870 rxon->flags &=
3871 ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3872 break;
3873 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
3874 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3875 break;
3876 }
3877 } else {
3878 /* Note: control channel is opposite of extension channel */
3879 switch (il->ht.extension_chan_offset) {
3880 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
3881 rxon->flags &=
3882 ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3883 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
3884 break;
3885 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
3886 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3887 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
3888 break;
3889 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
3890 default:
3891 /* channel location only valid if in Mixed mode */
3892 IL_ERR("invalid extension channel offset\n");
3893 break;
3894 }
3895 }
3896 } else {
3897 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
3898 }
3899
3900 if (il->ops->set_rxon_chain)
3901 il->ops->set_rxon_chain(il);
3902
3903 D_ASSOC("rxon flags 0x%X operation mode :0x%X "
3904 "extension channel offset 0x%x\n", le32_to_cpu(rxon->flags),
3905 il->ht.protection, il->ht.extension_chan_offset);
3906 }
3907
3908 void
3909 il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
3910 {
3911 _il_set_rxon_ht(il, ht_conf);
3912 }
3913 EXPORT_SYMBOL(il_set_rxon_ht);
3914
3915 /* Return valid, unused, channel for a passive scan to reset the RF */
3916 u8
3917 il_get_single_channel_number(struct il_priv *il, enum nl80211_band band)
3918 {
3919 const struct il_channel_info *ch_info;
3920 int i;
3921 u8 channel = 0;
3922 u8 min, max;
3923
3924 if (band == NL80211_BAND_5GHZ) {
3925 min = 14;
3926 max = il->channel_count;
3927 } else {
3928 min = 0;
3929 max = 14;
3930 }
3931
3932 for (i = min; i < max; i++) {
3933 channel = il->channel_info[i].channel;
3934 if (channel == le16_to_cpu(il->staging.channel))
3935 continue;
3936
3937 ch_info = il_get_channel_info(il, band, channel);
3938 if (il_is_channel_valid(ch_info))
3939 break;
3940 }
3941
3942 return channel;
3943 }
3944 EXPORT_SYMBOL(il_get_single_channel_number);
3945
3946 /**
3947 * il_set_rxon_channel - Set the band and channel values in staging RXON
3948 * @ch: requested channel as a pointer to struct ieee80211_channel
3949
3950 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3951 * in the staging RXON flag structure based on the ch->band
3952 */
3953 int
3954 il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch)
3955 {
3956 enum nl80211_band band = ch->band;
3957 u16 channel = ch->hw_value;
3958
3959 if (le16_to_cpu(il->staging.channel) == channel && il->band == band)
3960 return 0;
3961
3962 il->staging.channel = cpu_to_le16(channel);
3963 if (band == NL80211_BAND_5GHZ)
3964 il->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
3965 else
3966 il->staging.flags |= RXON_FLG_BAND_24G_MSK;
3967
3968 il->band = band;
3969
3970 D_INFO("Staging channel set to %d [%d]\n", channel, band);
3971
3972 return 0;
3973 }
3974 EXPORT_SYMBOL(il_set_rxon_channel);
3975
3976 void
3977 il_set_flags_for_band(struct il_priv *il, enum nl80211_band band,
3978 struct ieee80211_vif *vif)
3979 {
3980 if (band == NL80211_BAND_5GHZ) {
3981 il->staging.flags &=
3982 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
3983 RXON_FLG_CCK_MSK);
3984 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3985 } else {
3986 /* Copied from il_post_associate() */
3987 if (vif && vif->bss_conf.use_short_slot)
3988 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3989 else
3990 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3991
3992 il->staging.flags |= RXON_FLG_BAND_24G_MSK;
3993 il->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
3994 il->staging.flags &= ~RXON_FLG_CCK_MSK;
3995 }
3996 }
3997 EXPORT_SYMBOL(il_set_flags_for_band);
3998
3999 /*
4000 * initialize rxon structure with default values from eeprom
4001 */
4002 void
4003 il_connection_init_rx_config(struct il_priv *il)
4004 {
4005 const struct il_channel_info *ch_info;
4006
4007 memset(&il->staging, 0, sizeof(il->staging));
4008
4009 switch (il->iw_mode) {
4010 case NL80211_IFTYPE_UNSPECIFIED:
4011 il->staging.dev_type = RXON_DEV_TYPE_ESS;
4012 break;
4013 case NL80211_IFTYPE_STATION:
4014 il->staging.dev_type = RXON_DEV_TYPE_ESS;
4015 il->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
4016 break;
4017 case NL80211_IFTYPE_ADHOC:
4018 il->staging.dev_type = RXON_DEV_TYPE_IBSS;
4019 il->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
4020 il->staging.filter_flags =
4021 RXON_FILTER_BCON_AWARE_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
4022 break;
4023 default:
4024 IL_ERR("Unsupported interface type %d\n", il->vif->type);
4025 return;
4026 }
4027
4028 #if 0
4029 /* TODO: Figure out when short_preamble would be set and cache from
4030 * that */
4031 if (!hw_to_local(il->hw)->short_preamble)
4032 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
4033 else
4034 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
4035 #endif
4036
4037 ch_info =
4038 il_get_channel_info(il, il->band, le16_to_cpu(il->active.channel));
4039
4040 if (!ch_info)
4041 ch_info = &il->channel_info[0];
4042
4043 il->staging.channel = cpu_to_le16(ch_info->channel);
4044 il->band = ch_info->band;
4045
4046 il_set_flags_for_band(il, il->band, il->vif);
4047
4048 il->staging.ofdm_basic_rates =
4049 (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
4050 il->staging.cck_basic_rates =
4051 (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
4052
4053 /* clear both MIX and PURE40 mode flag */
4054 il->staging.flags &=
4055 ~(RXON_FLG_CHANNEL_MODE_MIXED | RXON_FLG_CHANNEL_MODE_PURE_40);
4056 if (il->vif)
4057 memcpy(il->staging.node_addr, il->vif->addr, ETH_ALEN);
4058
4059 il->staging.ofdm_ht_single_stream_basic_rates = 0xff;
4060 il->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
4061 }
4062 EXPORT_SYMBOL(il_connection_init_rx_config);
4063
4064 void
4065 il_set_rate(struct il_priv *il)
4066 {
4067 const struct ieee80211_supported_band *hw = NULL;
4068 struct ieee80211_rate *rate;
4069 int i;
4070
4071 hw = il_get_hw_mode(il, il->band);
4072 if (!hw) {
4073 IL_ERR("Failed to set rate: unable to get hw mode\n");
4074 return;
4075 }
4076
4077 il->active_rate = 0;
4078
4079 for (i = 0; i < hw->n_bitrates; i++) {
4080 rate = &(hw->bitrates[i]);
4081 if (rate->hw_value < RATE_COUNT_LEGACY)
4082 il->active_rate |= (1 << rate->hw_value);
4083 }
4084
4085 D_RATE("Set active_rate = %0x\n", il->active_rate);
4086
4087 il->staging.cck_basic_rates =
4088 (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
4089
4090 il->staging.ofdm_basic_rates =
4091 (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
4092 }
4093 EXPORT_SYMBOL(il_set_rate);
4094
4095 void
4096 il_chswitch_done(struct il_priv *il, bool is_success)
4097 {
4098 if (test_bit(S_EXIT_PENDING, &il->status))
4099 return;
4100
4101 if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
4102 ieee80211_chswitch_done(il->vif, is_success);
4103 }
4104 EXPORT_SYMBOL(il_chswitch_done);
4105
4106 void
4107 il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
4108 {
4109 struct il_rx_pkt *pkt = rxb_addr(rxb);
4110 struct il_csa_notification *csa = &(pkt->u.csa_notif);
4111 struct il_rxon_cmd *rxon = (void *)&il->active;
4112
4113 if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
4114 return;
4115
4116 if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
4117 rxon->channel = csa->channel;
4118 il->staging.channel = csa->channel;
4119 D_11H("CSA notif: channel %d\n", le16_to_cpu(csa->channel));
4120 il_chswitch_done(il, true);
4121 } else {
4122 IL_ERR("CSA notif (fail) : channel %d\n",
4123 le16_to_cpu(csa->channel));
4124 il_chswitch_done(il, false);
4125 }
4126 }
4127 EXPORT_SYMBOL(il_hdl_csa);
4128
4129 #ifdef CONFIG_IWLEGACY_DEBUG
4130 void
4131 il_print_rx_config_cmd(struct il_priv *il)
4132 {
4133 struct il_rxon_cmd *rxon = &il->staging;
4134
4135 D_RADIO("RX CONFIG:\n");
4136 il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4137 D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4138 D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4139 D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags));
4140 D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4141 D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates);
4142 D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4143 D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
4144 D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
4145 D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4146 }
4147 EXPORT_SYMBOL(il_print_rx_config_cmd);
4148 #endif
4149 /**
4150 * il_irq_handle_error - called for HW or SW error interrupt from card
4151 */
4152 void
4153 il_irq_handle_error(struct il_priv *il)
4154 {
4155 /* Set the FW error flag -- cleared on il_down */
4156 set_bit(S_FW_ERROR, &il->status);
4157
4158 /* Cancel currently queued command. */
4159 clear_bit(S_HCMD_ACTIVE, &il->status);
4160
4161 IL_ERR("Loaded firmware version: %s\n", il->hw->wiphy->fw_version);
4162
4163 il->ops->dump_nic_error_log(il);
4164 if (il->ops->dump_fh)
4165 il->ops->dump_fh(il, NULL, false);
4166 #ifdef CONFIG_IWLEGACY_DEBUG
4167 if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
4168 il_print_rx_config_cmd(il);
4169 #endif
4170
4171 wake_up(&il->wait_command_queue);
4172
4173 /* Keep the restart process from trying to send host
4174 * commands by clearing the INIT status bit */
4175 clear_bit(S_READY, &il->status);
4176
4177 if (!test_bit(S_EXIT_PENDING, &il->status)) {
4178 IL_DBG(IL_DL_FW_ERRORS,
4179 "Restarting adapter due to uCode error.\n");
4180
4181 if (il->cfg->mod_params->restart_fw)
4182 queue_work(il->workqueue, &il->restart);
4183 }
4184 }
4185 EXPORT_SYMBOL(il_irq_handle_error);
4186
4187 static int
4188 _il_apm_stop_master(struct il_priv *il)
4189 {
4190 int ret = 0;
4191
4192 /* stop device's busmaster DMA activity */
4193 _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
4194
4195 ret =
4196 _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
4197 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
4198 if (ret < 0)
4199 IL_WARN("Master Disable Timed Out, 100 usec\n");
4200
4201 D_INFO("stop master\n");
4202
4203 return ret;
4204 }
4205
4206 void
4207 _il_apm_stop(struct il_priv *il)
4208 {
4209 lockdep_assert_held(&il->reg_lock);
4210
4211 D_INFO("Stop card, put in low power state\n");
4212
4213 /* Stop device's DMA activity */
4214 _il_apm_stop_master(il);
4215
4216 /* Reset the entire device */
4217 _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
4218
4219 udelay(10);
4220
4221 /*
4222 * Clear "initialization complete" bit to move adapter from
4223 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
4224 */
4225 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
4226 }
4227 EXPORT_SYMBOL(_il_apm_stop);
4228
4229 void
4230 il_apm_stop(struct il_priv *il)
4231 {
4232 unsigned long flags;
4233
4234 spin_lock_irqsave(&il->reg_lock, flags);
4235 _il_apm_stop(il);
4236 spin_unlock_irqrestore(&il->reg_lock, flags);
4237 }
4238 EXPORT_SYMBOL(il_apm_stop);
4239
4240 /*
4241 * Start up NIC's basic functionality after it has been reset
4242 * (e.g. after platform boot, or shutdown via il_apm_stop())
4243 * NOTE: This does not load uCode nor start the embedded processor
4244 */
4245 int
4246 il_apm_init(struct il_priv *il)
4247 {
4248 int ret = 0;
4249 u16 lctl;
4250
4251 D_INFO("Init card's basic functions\n");
4252
4253 /*
4254 * Use "set_bit" below rather than "write", to preserve any hardware
4255 * bits already set by default after reset.
4256 */
4257
4258 /* Disable L0S exit timer (platform NMI Work/Around) */
4259 il_set_bit(il, CSR_GIO_CHICKEN_BITS,
4260 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
4261
4262 /*
4263 * Disable L0s without affecting L1;
4264 * don't wait for ICH L0s (ICH bug W/A)
4265 */
4266 il_set_bit(il, CSR_GIO_CHICKEN_BITS,
4267 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
4268
4269 /* Set FH wait threshold to maximum (HW error during stress W/A) */
4270 il_set_bit(il, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
4271
4272 /*
4273 * Enable HAP INTA (interrupt from management bus) to
4274 * wake device's PCI Express link L1a -> L0s
4275 * NOTE: This is no-op for 3945 (non-existent bit)
4276 */
4277 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
4278 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
4279
4280 /*
4281 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
4282 * Check if BIOS (or OS) enabled L1-ASPM on this device.
4283 * If so (likely), disable L0S, so device moves directly L0->L1;
4284 * costs negligible amount of power savings.
4285 * If not (unlikely), enable L0S, so there is at least some
4286 * power savings, even without L1.
4287 */
4288 if (il->cfg->set_l0s) {
4289 pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
4290 if (lctl & PCI_EXP_LNKCTL_ASPM_L1) {
4291 /* L1-ASPM enabled; disable(!) L0S */
4292 il_set_bit(il, CSR_GIO_REG,
4293 CSR_GIO_REG_VAL_L0S_ENABLED);
4294 D_POWER("L1 Enabled; Disabling L0S\n");
4295 } else {
4296 /* L1-ASPM disabled; enable(!) L0S */
4297 il_clear_bit(il, CSR_GIO_REG,
4298 CSR_GIO_REG_VAL_L0S_ENABLED);
4299 D_POWER("L1 Disabled; Enabling L0S\n");
4300 }
4301 }
4302
4303 /* Configure analog phase-lock-loop before activating to D0A */
4304 if (il->cfg->pll_cfg_val)
4305 il_set_bit(il, CSR_ANA_PLL_CFG,
4306 il->cfg->pll_cfg_val);
4307
4308 /*
4309 * Set "initialization complete" bit to move adapter from
4310 * D0U* --> D0A* (powered-up active) state.
4311 */
4312 il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
4313
4314 /*
4315 * Wait for clock stabilization; once stabilized, access to
4316 * device-internal resources is supported, e.g. il_wr_prph()
4317 * and accesses to uCode SRAM.
4318 */
4319 ret =
4320 _il_poll_bit(il, CSR_GP_CNTRL,
4321 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
4322 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
4323 if (ret < 0) {
4324 D_INFO("Failed to init the card\n");
4325 goto out;
4326 }
4327
4328 /*
4329 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
4330 * BSM (Boostrap State Machine) is only in 3945 and 4965.
4331 *
4332 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
4333 * do not disable clocks. This preserves any hardware bits already
4334 * set by default in "CLK_CTRL_REG" after reset.
4335 */
4336 if (il->cfg->use_bsm)
4337 il_wr_prph(il, APMG_CLK_EN_REG,
4338 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
4339 else
4340 il_wr_prph(il, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
4341 udelay(20);
4342
4343 /* Disable L1-Active */
4344 il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
4345 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
4346
4347 out:
4348 return ret;
4349 }
4350 EXPORT_SYMBOL(il_apm_init);
4351
4352 int
4353 il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
4354 {
4355 int ret;
4356 s8 prev_tx_power;
4357 bool defer;
4358
4359 lockdep_assert_held(&il->mutex);
4360
4361 if (il->tx_power_user_lmt == tx_power && !force)
4362 return 0;
4363
4364 if (!il->ops->send_tx_power)
4365 return -EOPNOTSUPP;
4366
4367 /* 0 dBm mean 1 milliwatt */
4368 if (tx_power < 0) {
4369 IL_WARN("Requested user TXPOWER %d below 1 mW.\n", tx_power);
4370 return -EINVAL;
4371 }
4372
4373 if (tx_power > il->tx_power_device_lmt) {
4374 IL_WARN("Requested user TXPOWER %d above upper limit %d.\n",
4375 tx_power, il->tx_power_device_lmt);
4376 return -EINVAL;
4377 }
4378
4379 if (!il_is_ready_rf(il))
4380 return -EIO;
4381
4382 /* scan complete and commit_rxon use tx_power_next value,
4383 * it always need to be updated for newest request */
4384 il->tx_power_next = tx_power;
4385
4386 /* do not set tx power when scanning or channel changing */
4387 defer = test_bit(S_SCANNING, &il->status) ||
4388 memcmp(&il->active, &il->staging, sizeof(il->staging));
4389 if (defer && !force) {
4390 D_INFO("Deferring tx power set\n");
4391 return 0;
4392 }
4393
4394 prev_tx_power = il->tx_power_user_lmt;
4395 il->tx_power_user_lmt = tx_power;
4396
4397 ret = il->ops->send_tx_power(il);
4398
4399 /* if fail to set tx_power, restore the orig. tx power */
4400 if (ret) {
4401 il->tx_power_user_lmt = prev_tx_power;
4402 il->tx_power_next = prev_tx_power;
4403 }
4404 return ret;
4405 }
4406 EXPORT_SYMBOL(il_set_tx_power);
4407
4408 void
4409 il_send_bt_config(struct il_priv *il)
4410 {
4411 struct il_bt_cmd bt_cmd = {
4412 .lead_time = BT_LEAD_TIME_DEF,
4413 .max_kill = BT_MAX_KILL_DEF,
4414 .kill_ack_mask = 0,
4415 .kill_cts_mask = 0,
4416 };
4417
4418 if (!bt_coex_active)
4419 bt_cmd.flags = BT_COEX_DISABLE;
4420 else
4421 bt_cmd.flags = BT_COEX_ENABLE;
4422
4423 D_INFO("BT coex %s\n",
4424 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
4425
4426 if (il_send_cmd_pdu(il, C_BT_CONFIG, sizeof(struct il_bt_cmd), &bt_cmd))
4427 IL_ERR("failed to send BT Coex Config\n");
4428 }
4429 EXPORT_SYMBOL(il_send_bt_config);
4430
4431 int
4432 il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
4433 {
4434 struct il_stats_cmd stats_cmd = {
4435 .configuration_flags = clear ? IL_STATS_CONF_CLEAR_STATS : 0,
4436 };
4437
4438 if (flags & CMD_ASYNC)
4439 return il_send_cmd_pdu_async(il, C_STATS, sizeof(struct il_stats_cmd),
4440 &stats_cmd, NULL);
4441 else
4442 return il_send_cmd_pdu(il, C_STATS, sizeof(struct il_stats_cmd),
4443 &stats_cmd);
4444 }
4445 EXPORT_SYMBOL(il_send_stats_request);
4446
4447 void
4448 il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb)
4449 {
4450 #ifdef CONFIG_IWLEGACY_DEBUG
4451 struct il_rx_pkt *pkt = rxb_addr(rxb);
4452 struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
4453 D_RX("sleep mode: %d, src: %d\n",
4454 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
4455 #endif
4456 }
4457 EXPORT_SYMBOL(il_hdl_pm_sleep);
4458
4459 void
4460 il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb)
4461 {
4462 struct il_rx_pkt *pkt = rxb_addr(rxb);
4463 u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
4464 D_RADIO("Dumping %d bytes of unhandled notification for %s:\n", len,
4465 il_get_cmd_string(pkt->hdr.cmd));
4466 il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
4467 }
4468 EXPORT_SYMBOL(il_hdl_pm_debug_stats);
4469
4470 void
4471 il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb)
4472 {
4473 struct il_rx_pkt *pkt = rxb_addr(rxb);
4474
4475 IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
4476 "seq 0x%04X ser 0x%08X\n",
4477 le32_to_cpu(pkt->u.err_resp.error_type),
4478 il_get_cmd_string(pkt->u.err_resp.cmd_id),
4479 pkt->u.err_resp.cmd_id,
4480 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
4481 le32_to_cpu(pkt->u.err_resp.error_info));
4482 }
4483 EXPORT_SYMBOL(il_hdl_error);
4484
4485 void
4486 il_clear_isr_stats(struct il_priv *il)
4487 {
4488 memset(&il->isr_stats, 0, sizeof(il->isr_stats));
4489 }
4490
4491 int
4492 il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
4493 const struct ieee80211_tx_queue_params *params)
4494 {
4495 struct il_priv *il = hw->priv;
4496 unsigned long flags;
4497 int q;
4498
4499 D_MAC80211("enter\n");
4500
4501 if (!il_is_ready_rf(il)) {
4502 D_MAC80211("leave - RF not ready\n");
4503 return -EIO;
4504 }
4505
4506 if (queue >= AC_NUM) {
4507 D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
4508 return 0;
4509 }
4510
4511 q = AC_NUM - 1 - queue;
4512
4513 spin_lock_irqsave(&il->lock, flags);
4514
4515 il->qos_data.def_qos_parm.ac[q].cw_min =
4516 cpu_to_le16(params->cw_min);
4517 il->qos_data.def_qos_parm.ac[q].cw_max =
4518 cpu_to_le16(params->cw_max);
4519 il->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4520 il->qos_data.def_qos_parm.ac[q].edca_txop =
4521 cpu_to_le16((params->txop * 32));
4522
4523 il->qos_data.def_qos_parm.ac[q].reserved1 = 0;
4524
4525 spin_unlock_irqrestore(&il->lock, flags);
4526
4527 D_MAC80211("leave\n");
4528 return 0;
4529 }
4530 EXPORT_SYMBOL(il_mac_conf_tx);
4531
4532 int
4533 il_mac_tx_last_beacon(struct ieee80211_hw *hw)
4534 {
4535 struct il_priv *il = hw->priv;
4536 int ret;
4537
4538 D_MAC80211("enter\n");
4539
4540 ret = (il->ibss_manager == IL_IBSS_MANAGER);
4541
4542 D_MAC80211("leave ret %d\n", ret);
4543 return ret;
4544 }
4545 EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
4546
4547 static int
4548 il_set_mode(struct il_priv *il)
4549 {
4550 il_connection_init_rx_config(il);
4551
4552 if (il->ops->set_rxon_chain)
4553 il->ops->set_rxon_chain(il);
4554
4555 return il_commit_rxon(il);
4556 }
4557
4558 int
4559 il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
4560 {
4561 struct il_priv *il = hw->priv;
4562 int err;
4563 bool reset;
4564
4565 mutex_lock(&il->mutex);
4566 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
4567
4568 if (!il_is_ready_rf(il)) {
4569 IL_WARN("Try to add interface when device not ready\n");
4570 err = -EINVAL;
4571 goto out;
4572 }
4573
4574 /*
4575 * We do not support multiple virtual interfaces, but on hardware reset
4576 * we have to add the same interface again.
4577 */
4578 reset = (il->vif == vif);
4579 if (il->vif && !reset) {
4580 err = -EOPNOTSUPP;
4581 goto out;
4582 }
4583
4584 il->vif = vif;
4585 il->iw_mode = vif->type;
4586
4587 err = il_set_mode(il);
4588 if (err) {
4589 IL_WARN("Fail to set mode %d\n", vif->type);
4590 if (!reset) {
4591 il->vif = NULL;
4592 il->iw_mode = NL80211_IFTYPE_STATION;
4593 }
4594 }
4595
4596 out:
4597 D_MAC80211("leave err %d\n", err);
4598 mutex_unlock(&il->mutex);
4599
4600 return err;
4601 }
4602 EXPORT_SYMBOL(il_mac_add_interface);
4603
4604 static void
4605 il_teardown_interface(struct il_priv *il, struct ieee80211_vif *vif)
4606 {
4607 lockdep_assert_held(&il->mutex);
4608
4609 if (il->scan_vif == vif) {
4610 il_scan_cancel_timeout(il, 200);
4611 il_force_scan_end(il);
4612 }
4613
4614 il_set_mode(il);
4615 }
4616
4617 void
4618 il_mac_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
4619 {
4620 struct il_priv *il = hw->priv;
4621
4622 mutex_lock(&il->mutex);
4623 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
4624
4625 WARN_ON(il->vif != vif);
4626 il->vif = NULL;
4627 il->iw_mode = NL80211_IFTYPE_UNSPECIFIED;
4628 il_teardown_interface(il, vif);
4629 eth_zero_addr(il->bssid);
4630
4631 D_MAC80211("leave\n");
4632 mutex_unlock(&il->mutex);
4633 }
4634 EXPORT_SYMBOL(il_mac_remove_interface);
4635
4636 int
4637 il_alloc_txq_mem(struct il_priv *il)
4638 {
4639 if (!il->txq)
4640 il->txq =
4641 kcalloc(il->cfg->num_of_queues,
4642 sizeof(struct il_tx_queue),
4643 GFP_KERNEL);
4644 if (!il->txq) {
4645 IL_ERR("Not enough memory for txq\n");
4646 return -ENOMEM;
4647 }
4648 return 0;
4649 }
4650 EXPORT_SYMBOL(il_alloc_txq_mem);
4651
4652 void
4653 il_free_txq_mem(struct il_priv *il)
4654 {
4655 kfree(il->txq);
4656 il->txq = NULL;
4657 }
4658 EXPORT_SYMBOL(il_free_txq_mem);
4659
4660 int
4661 il_force_reset(struct il_priv *il, bool external)
4662 {
4663 struct il_force_reset *force_reset;
4664
4665 if (test_bit(S_EXIT_PENDING, &il->status))
4666 return -EINVAL;
4667
4668 force_reset = &il->force_reset;
4669 force_reset->reset_request_count++;
4670 if (!external) {
4671 if (force_reset->last_force_reset_jiffies &&
4672 time_after(force_reset->last_force_reset_jiffies +
4673 force_reset->reset_duration, jiffies)) {
4674 D_INFO("force reset rejected\n");
4675 force_reset->reset_reject_count++;
4676 return -EAGAIN;
4677 }
4678 }
4679 force_reset->reset_success_count++;
4680 force_reset->last_force_reset_jiffies = jiffies;
4681
4682 /*
4683 * if the request is from external(ex: debugfs),
4684 * then always perform the request in regardless the module
4685 * parameter setting
4686 * if the request is from internal (uCode error or driver
4687 * detect failure), then fw_restart module parameter
4688 * need to be check before performing firmware reload
4689 */
4690
4691 if (!external && !il->cfg->mod_params->restart_fw) {
4692 D_INFO("Cancel firmware reload based on "
4693 "module parameter setting\n");
4694 return 0;
4695 }
4696
4697 IL_ERR("On demand firmware reload\n");
4698
4699 /* Set the FW error flag -- cleared on il_down */
4700 set_bit(S_FW_ERROR, &il->status);
4701 wake_up(&il->wait_command_queue);
4702 /*
4703 * Keep the restart process from trying to send host
4704 * commands by clearing the INIT status bit
4705 */
4706 clear_bit(S_READY, &il->status);
4707 queue_work(il->workqueue, &il->restart);
4708
4709 return 0;
4710 }
4711 EXPORT_SYMBOL(il_force_reset);
4712
4713 int
4714 il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4715 enum nl80211_iftype newtype, bool newp2p)
4716 {
4717 struct il_priv *il = hw->priv;
4718 int err;
4719
4720 mutex_lock(&il->mutex);
4721 D_MAC80211("enter: type %d, addr %pM newtype %d newp2p %d\n",
4722 vif->type, vif->addr, newtype, newp2p);
4723
4724 if (newp2p) {
4725 err = -EOPNOTSUPP;
4726 goto out;
4727 }
4728
4729 if (!il->vif || !il_is_ready_rf(il)) {
4730 /*
4731 * Huh? But wait ... this can maybe happen when
4732 * we're in the middle of a firmware restart!
4733 */
4734 err = -EBUSY;
4735 goto out;
4736 }
4737
4738 /* success */
4739 vif->type = newtype;
4740 vif->p2p = false;
4741 il->iw_mode = newtype;
4742 il_teardown_interface(il, vif);
4743 err = 0;
4744
4745 out:
4746 D_MAC80211("leave err %d\n", err);
4747 mutex_unlock(&il->mutex);
4748
4749 return err;
4750 }
4751 EXPORT_SYMBOL(il_mac_change_interface);
4752
4753 void il_mac_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4754 u32 queues, bool drop)
4755 {
4756 struct il_priv *il = hw->priv;
4757 unsigned long timeout = jiffies + msecs_to_jiffies(500);
4758 int i;
4759
4760 mutex_lock(&il->mutex);
4761 D_MAC80211("enter\n");
4762
4763 if (il->txq == NULL)
4764 goto out;
4765
4766 for (i = 0; i < il->hw_params.max_txq_num; i++) {
4767 struct il_queue *q;
4768
4769 if (i == il->cmd_queue)
4770 continue;
4771
4772 q = &il->txq[i].q;
4773 if (q->read_ptr == q->write_ptr)
4774 continue;
4775
4776 if (time_after(jiffies, timeout)) {
4777 IL_ERR("Failed to flush queue %d\n", q->id);
4778 break;
4779 }
4780
4781 msleep(20);
4782 }
4783 out:
4784 D_MAC80211("leave\n");
4785 mutex_unlock(&il->mutex);
4786 }
4787 EXPORT_SYMBOL(il_mac_flush);
4788
4789 /*
4790 * On every watchdog tick we check (latest) time stamp. If it does not
4791 * change during timeout period and queue is not empty we reset firmware.
4792 */
4793 static int
4794 il_check_stuck_queue(struct il_priv *il, int cnt)
4795 {
4796 struct il_tx_queue *txq = &il->txq[cnt];
4797 struct il_queue *q = &txq->q;
4798 unsigned long timeout;
4799 unsigned long now = jiffies;
4800 int ret;
4801
4802 if (q->read_ptr == q->write_ptr) {
4803 txq->time_stamp = now;
4804 return 0;
4805 }
4806
4807 timeout =
4808 txq->time_stamp +
4809 msecs_to_jiffies(il->cfg->wd_timeout);
4810
4811 if (time_after(now, timeout)) {
4812 IL_ERR("Queue %d stuck for %u ms.\n", q->id,
4813 jiffies_to_msecs(now - txq->time_stamp));
4814 ret = il_force_reset(il, false);
4815 return (ret == -EAGAIN) ? 0 : 1;
4816 }
4817
4818 return 0;
4819 }
4820
4821 /*
4822 * Making watchdog tick be a quarter of timeout assure we will
4823 * discover the queue hung between timeout and 1.25*timeout
4824 */
4825 #define IL_WD_TICK(timeout) ((timeout) / 4)
4826
4827 /*
4828 * Watchdog timer callback, we check each tx queue for stuck, if if hung
4829 * we reset the firmware. If everything is fine just rearm the timer.
4830 */
4831 void
4832 il_bg_watchdog(struct timer_list *t)
4833 {
4834 struct il_priv *il = from_timer(il, t, watchdog);
4835 int cnt;
4836 unsigned long timeout;
4837
4838 if (test_bit(S_EXIT_PENDING, &il->status))
4839 return;
4840
4841 timeout = il->cfg->wd_timeout;
4842 if (timeout == 0)
4843 return;
4844
4845 /* monitor and check for stuck cmd queue */
4846 if (il_check_stuck_queue(il, il->cmd_queue))
4847 return;
4848
4849 /* monitor and check for other stuck queues */
4850 for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
4851 /* skip as we already checked the command queue */
4852 if (cnt == il->cmd_queue)
4853 continue;
4854 if (il_check_stuck_queue(il, cnt))
4855 return;
4856 }
4857
4858 mod_timer(&il->watchdog,
4859 jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
4860 }
4861 EXPORT_SYMBOL(il_bg_watchdog);
4862
4863 void
4864 il_setup_watchdog(struct il_priv *il)
4865 {
4866 unsigned int timeout = il->cfg->wd_timeout;
4867
4868 if (timeout)
4869 mod_timer(&il->watchdog,
4870 jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
4871 else
4872 del_timer(&il->watchdog);
4873 }
4874 EXPORT_SYMBOL(il_setup_watchdog);
4875
4876 /*
4877 * extended beacon time format
4878 * time in usec will be changed into a 32-bit value in extended:internal format
4879 * the extended part is the beacon counts
4880 * the internal part is the time in usec within one beacon interval
4881 */
4882 u32
4883 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval)
4884 {
4885 u32 quot;
4886 u32 rem;
4887 u32 interval = beacon_interval * TIME_UNIT;
4888
4889 if (!interval || !usec)
4890 return 0;
4891
4892 quot =
4893 (usec /
4894 interval) & (il_beacon_time_mask_high(il,
4895 il->hw_params.
4896 beacon_time_tsf_bits) >> il->
4897 hw_params.beacon_time_tsf_bits);
4898 rem =
4899 (usec % interval) & il_beacon_time_mask_low(il,
4900 il->hw_params.
4901 beacon_time_tsf_bits);
4902
4903 return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
4904 }
4905 EXPORT_SYMBOL(il_usecs_to_beacons);
4906
4907 /* base is usually what we get from ucode with each received frame,
4908 * the same as HW timer counter counting down
4909 */
4910 __le32
4911 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
4912 u32 beacon_interval)
4913 {
4914 u32 base_low = base & il_beacon_time_mask_low(il,
4915 il->hw_params.
4916 beacon_time_tsf_bits);
4917 u32 addon_low = addon & il_beacon_time_mask_low(il,
4918 il->hw_params.
4919 beacon_time_tsf_bits);
4920 u32 interval = beacon_interval * TIME_UNIT;
4921 u32 res = (base & il_beacon_time_mask_high(il,
4922 il->hw_params.
4923 beacon_time_tsf_bits)) +
4924 (addon & il_beacon_time_mask_high(il,
4925 il->hw_params.
4926 beacon_time_tsf_bits));
4927
4928 if (base_low > addon_low)
4929 res += base_low - addon_low;
4930 else if (base_low < addon_low) {
4931 res += interval + base_low - addon_low;
4932 res += (1 << il->hw_params.beacon_time_tsf_bits);
4933 } else
4934 res += (1 << il->hw_params.beacon_time_tsf_bits);
4935
4936 return cpu_to_le32(res);
4937 }
4938 EXPORT_SYMBOL(il_add_beacon_time);
4939
4940 #ifdef CONFIG_PM_SLEEP
4941
4942 static int
4943 il_pci_suspend(struct device *device)
4944 {
4945 struct il_priv *il = dev_get_drvdata(device);
4946
4947 /*
4948 * This function is called when system goes into suspend state
4949 * mac80211 will call il_mac_stop() from the mac80211 suspend function
4950 * first but since il_mac_stop() has no knowledge of who the caller is,
4951 * it will not call apm_ops.stop() to stop the DMA operation.
4952 * Calling apm_ops.stop here to make sure we stop the DMA.
4953 */
4954 il_apm_stop(il);
4955
4956 return 0;
4957 }
4958
4959 static int
4960 il_pci_resume(struct device *device)
4961 {
4962 struct pci_dev *pdev = to_pci_dev(device);
4963 struct il_priv *il = pci_get_drvdata(pdev);
4964 bool hw_rfkill = false;
4965
4966 /*
4967 * We disable the RETRY_TIMEOUT register (0x41) to keep
4968 * PCI Tx retries from interfering with C3 CPU state.
4969 */
4970 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4971
4972 il_enable_interrupts(il);
4973
4974 if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4975 hw_rfkill = true;
4976
4977 if (hw_rfkill)
4978 set_bit(S_RFKILL, &il->status);
4979 else
4980 clear_bit(S_RFKILL, &il->status);
4981
4982 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
4983
4984 return 0;
4985 }
4986
4987 SIMPLE_DEV_PM_OPS(il_pm_ops, il_pci_suspend, il_pci_resume);
4988 EXPORT_SYMBOL(il_pm_ops);
4989
4990 #endif /* CONFIG_PM_SLEEP */
4991
4992 static void
4993 il_update_qos(struct il_priv *il)
4994 {
4995 if (test_bit(S_EXIT_PENDING, &il->status))
4996 return;
4997
4998 il->qos_data.def_qos_parm.qos_flags = 0;
4999
5000 if (il->qos_data.qos_active)
5001 il->qos_data.def_qos_parm.qos_flags |=
5002 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
5003
5004 if (il->ht.enabled)
5005 il->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
5006
5007 D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
5008 il->qos_data.qos_active, il->qos_data.def_qos_parm.qos_flags);
5009
5010 il_send_cmd_pdu_async(il, C_QOS_PARAM, sizeof(struct il_qosparam_cmd),
5011 &il->qos_data.def_qos_parm, NULL);
5012 }
5013
5014 /**
5015 * il_mac_config - mac80211 config callback
5016 */
5017 int
5018 il_mac_config(struct ieee80211_hw *hw, u32 changed)
5019 {
5020 struct il_priv *il = hw->priv;
5021 const struct il_channel_info *ch_info;
5022 struct ieee80211_conf *conf = &hw->conf;
5023 struct ieee80211_channel *channel = conf->chandef.chan;
5024 struct il_ht_config *ht_conf = &il->current_ht_config;
5025 unsigned long flags = 0;
5026 int ret = 0;
5027 u16 ch;
5028 int scan_active = 0;
5029 bool ht_changed = false;
5030
5031 mutex_lock(&il->mutex);
5032 D_MAC80211("enter: channel %d changed 0x%X\n", channel->hw_value,
5033 changed);
5034
5035 if (unlikely(test_bit(S_SCANNING, &il->status))) {
5036 scan_active = 1;
5037 D_MAC80211("scan active\n");
5038 }
5039
5040 if (changed &
5041 (IEEE80211_CONF_CHANGE_SMPS | IEEE80211_CONF_CHANGE_CHANNEL)) {
5042 /* mac80211 uses static for non-HT which is what we want */
5043 il->current_ht_config.smps = conf->smps_mode;
5044
5045 /*
5046 * Recalculate chain counts.
5047 *
5048 * If monitor mode is enabled then mac80211 will
5049 * set up the SM PS mode to OFF if an HT channel is
5050 * configured.
5051 */
5052 if (il->ops->set_rxon_chain)
5053 il->ops->set_rxon_chain(il);
5054 }
5055
5056 /* during scanning mac80211 will delay channel setting until
5057 * scan finish with changed = 0
5058 */
5059 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
5060
5061 if (scan_active)
5062 goto set_ch_out;
5063
5064 ch = channel->hw_value;
5065 ch_info = il_get_channel_info(il, channel->band, ch);
5066 if (!il_is_channel_valid(ch_info)) {
5067 D_MAC80211("leave - invalid channel\n");
5068 ret = -EINVAL;
5069 goto set_ch_out;
5070 }
5071
5072 if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
5073 !il_is_channel_ibss(ch_info)) {
5074 D_MAC80211("leave - not IBSS channel\n");
5075 ret = -EINVAL;
5076 goto set_ch_out;
5077 }
5078
5079 spin_lock_irqsave(&il->lock, flags);
5080
5081 /* Configure HT40 channels */
5082 if (il->ht.enabled != conf_is_ht(conf)) {
5083 il->ht.enabled = conf_is_ht(conf);
5084 ht_changed = true;
5085 }
5086 if (il->ht.enabled) {
5087 if (conf_is_ht40_minus(conf)) {
5088 il->ht.extension_chan_offset =
5089 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
5090 il->ht.is_40mhz = true;
5091 } else if (conf_is_ht40_plus(conf)) {
5092 il->ht.extension_chan_offset =
5093 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
5094 il->ht.is_40mhz = true;
5095 } else {
5096 il->ht.extension_chan_offset =
5097 IEEE80211_HT_PARAM_CHA_SEC_NONE;
5098 il->ht.is_40mhz = false;
5099 }
5100 } else
5101 il->ht.is_40mhz = false;
5102
5103 /*
5104 * Default to no protection. Protection mode will
5105 * later be set from BSS config in il_ht_conf
5106 */
5107 il->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
5108
5109 /* if we are switching from ht to 2.4 clear flags
5110 * from any ht related info since 2.4 does not
5111 * support ht */
5112 if ((le16_to_cpu(il->staging.channel) != ch))
5113 il->staging.flags = 0;
5114
5115 il_set_rxon_channel(il, channel);
5116 il_set_rxon_ht(il, ht_conf);
5117
5118 il_set_flags_for_band(il, channel->band, il->vif);
5119
5120 spin_unlock_irqrestore(&il->lock, flags);
5121
5122 if (il->ops->update_bcast_stations)
5123 ret = il->ops->update_bcast_stations(il);
5124
5125 set_ch_out:
5126 /* The list of supported rates and rate mask can be different
5127 * for each band; since the band may have changed, reset
5128 * the rate mask to what mac80211 lists */
5129 il_set_rate(il);
5130 }
5131
5132 if (changed & (IEEE80211_CONF_CHANGE_PS | IEEE80211_CONF_CHANGE_IDLE)) {
5133 il->power_data.ps_disabled = !(conf->flags & IEEE80211_CONF_PS);
5134 if (!il->power_data.ps_disabled)
5135 IL_WARN_ONCE("Enabling power save might cause firmware crashes\n");
5136 ret = il_power_update_mode(il, false);
5137 if (ret)
5138 D_MAC80211("Error setting sleep level\n");
5139 }
5140
5141 if (changed & IEEE80211_CONF_CHANGE_POWER) {
5142 D_MAC80211("TX Power old=%d new=%d\n", il->tx_power_user_lmt,
5143 conf->power_level);
5144
5145 il_set_tx_power(il, conf->power_level, false);
5146 }
5147
5148 if (!il_is_ready(il)) {
5149 D_MAC80211("leave - not ready\n");
5150 goto out;
5151 }
5152
5153 if (scan_active)
5154 goto out;
5155
5156 if (memcmp(&il->active, &il->staging, sizeof(il->staging)))
5157 il_commit_rxon(il);
5158 else
5159 D_INFO("Not re-sending same RXON configuration.\n");
5160 if (ht_changed)
5161 il_update_qos(il);
5162
5163 out:
5164 D_MAC80211("leave ret %d\n", ret);
5165 mutex_unlock(&il->mutex);
5166
5167 return ret;
5168 }
5169 EXPORT_SYMBOL(il_mac_config);
5170
5171 void
5172 il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
5173 {
5174 struct il_priv *il = hw->priv;
5175 unsigned long flags;
5176
5177 mutex_lock(&il->mutex);
5178 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
5179
5180 spin_lock_irqsave(&il->lock, flags);
5181
5182 memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
5183
5184 /* new association get rid of ibss beacon skb */
5185 dev_kfree_skb(il->beacon_skb);
5186 il->beacon_skb = NULL;
5187 il->timestamp = 0;
5188
5189 spin_unlock_irqrestore(&il->lock, flags);
5190
5191 il_scan_cancel_timeout(il, 100);
5192 if (!il_is_ready_rf(il)) {
5193 D_MAC80211("leave - not ready\n");
5194 mutex_unlock(&il->mutex);
5195 return;
5196 }
5197
5198 /* we are restarting association process */
5199 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5200 il_commit_rxon(il);
5201
5202 il_set_rate(il);
5203
5204 D_MAC80211("leave\n");
5205 mutex_unlock(&il->mutex);
5206 }
5207 EXPORT_SYMBOL(il_mac_reset_tsf);
5208
5209 static void
5210 il_ht_conf(struct il_priv *il, struct ieee80211_vif *vif)
5211 {
5212 struct il_ht_config *ht_conf = &il->current_ht_config;
5213 struct ieee80211_sta *sta;
5214 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5215
5216 D_ASSOC("enter:\n");
5217
5218 if (!il->ht.enabled)
5219 return;
5220
5221 il->ht.protection =
5222 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
5223 il->ht.non_gf_sta_present =
5224 !!(bss_conf->
5225 ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5226
5227 ht_conf->single_chain_sufficient = false;
5228
5229 switch (vif->type) {
5230 case NL80211_IFTYPE_STATION:
5231 rcu_read_lock();
5232 sta = ieee80211_find_sta(vif, bss_conf->bssid);
5233 if (sta) {
5234 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
5235 int maxstreams;
5236
5237 maxstreams =
5238 (ht_cap->mcs.
5239 tx_params & IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
5240 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
5241 maxstreams += 1;
5242
5243 if (ht_cap->mcs.rx_mask[1] == 0 &&
5244 ht_cap->mcs.rx_mask[2] == 0)
5245 ht_conf->single_chain_sufficient = true;
5246 if (maxstreams <= 1)
5247 ht_conf->single_chain_sufficient = true;
5248 } else {
5249 /*
5250 * If at all, this can only happen through a race
5251 * when the AP disconnects us while we're still
5252 * setting up the connection, in that case mac80211
5253 * will soon tell us about that.
5254 */
5255 ht_conf->single_chain_sufficient = true;
5256 }
5257 rcu_read_unlock();
5258 break;
5259 case NL80211_IFTYPE_ADHOC:
5260 ht_conf->single_chain_sufficient = true;
5261 break;
5262 default:
5263 break;
5264 }
5265
5266 D_ASSOC("leave\n");
5267 }
5268
5269 static inline void
5270 il_set_no_assoc(struct il_priv *il, struct ieee80211_vif *vif)
5271 {
5272 /*
5273 * inform the ucode that there is no longer an
5274 * association and that no more packets should be
5275 * sent
5276 */
5277 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5278 il->staging.assoc_id = 0;
5279 il_commit_rxon(il);
5280 }
5281
5282 static void
5283 il_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
5284 {
5285 struct il_priv *il = hw->priv;
5286 unsigned long flags;
5287 __le64 timestamp;
5288 struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
5289
5290 if (!skb)
5291 return;
5292
5293 D_MAC80211("enter\n");
5294
5295 lockdep_assert_held(&il->mutex);
5296
5297 if (!il->beacon_enabled) {
5298 IL_ERR("update beacon with no beaconing enabled\n");
5299 dev_kfree_skb(skb);
5300 return;
5301 }
5302
5303 spin_lock_irqsave(&il->lock, flags);
5304 dev_kfree_skb(il->beacon_skb);
5305 il->beacon_skb = skb;
5306
5307 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
5308 il->timestamp = le64_to_cpu(timestamp);
5309
5310 D_MAC80211("leave\n");
5311 spin_unlock_irqrestore(&il->lock, flags);
5312
5313 if (!il_is_ready_rf(il)) {
5314 D_MAC80211("leave - RF not ready\n");
5315 return;
5316 }
5317
5318 il->ops->post_associate(il);
5319 }
5320
5321 void
5322 il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5323 struct ieee80211_bss_conf *bss_conf, u32 changes)
5324 {
5325 struct il_priv *il = hw->priv;
5326 int ret;
5327
5328 mutex_lock(&il->mutex);
5329 D_MAC80211("enter: changes 0x%x\n", changes);
5330
5331 if (!il_is_alive(il)) {
5332 D_MAC80211("leave - not alive\n");
5333 mutex_unlock(&il->mutex);
5334 return;
5335 }
5336
5337 if (changes & BSS_CHANGED_QOS) {
5338 unsigned long flags;
5339
5340 spin_lock_irqsave(&il->lock, flags);
5341 il->qos_data.qos_active = bss_conf->qos;
5342 il_update_qos(il);
5343 spin_unlock_irqrestore(&il->lock, flags);
5344 }
5345
5346 if (changes & BSS_CHANGED_BEACON_ENABLED) {
5347 /* FIXME: can we remove beacon_enabled ? */
5348 if (vif->bss_conf.enable_beacon)
5349 il->beacon_enabled = true;
5350 else
5351 il->beacon_enabled = false;
5352 }
5353
5354 if (changes & BSS_CHANGED_BSSID) {
5355 D_MAC80211("BSSID %pM\n", bss_conf->bssid);
5356
5357 /*
5358 * On passive channel we wait with blocked queues to see if
5359 * there is traffic on that channel. If no frame will be
5360 * received (what is very unlikely since scan detects AP on
5361 * that channel, but theoretically possible), mac80211 associate
5362 * procedure will time out and mac80211 will call us with NULL
5363 * bssid. We have to unblock queues on such condition.
5364 */
5365 if (is_zero_ether_addr(bss_conf->bssid))
5366 il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE);
5367
5368 /*
5369 * If there is currently a HW scan going on in the background,
5370 * then we need to cancel it, otherwise sometimes we are not
5371 * able to authenticate (FIXME: why ?)
5372 */
5373 if (il_scan_cancel_timeout(il, 100)) {
5374 D_MAC80211("leave - scan abort failed\n");
5375 mutex_unlock(&il->mutex);
5376 return;
5377 }
5378
5379 /* mac80211 only sets assoc when in STATION mode */
5380 memcpy(il->staging.bssid_addr, bss_conf->bssid, ETH_ALEN);
5381
5382 /* FIXME: currently needed in a few places */
5383 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
5384 }
5385
5386 /*
5387 * This needs to be after setting the BSSID in case
5388 * mac80211 decides to do both changes at once because
5389 * it will invoke post_associate.
5390 */
5391 if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
5392 il_beacon_update(hw, vif);
5393
5394 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
5395 D_MAC80211("ERP_PREAMBLE %d\n", bss_conf->use_short_preamble);
5396 if (bss_conf->use_short_preamble)
5397 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5398 else
5399 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5400 }
5401
5402 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
5403 D_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
5404 if (bss_conf->use_cts_prot && il->band != NL80211_BAND_5GHZ)
5405 il->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
5406 else
5407 il->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
5408 if (bss_conf->use_cts_prot)
5409 il->staging.flags |= RXON_FLG_SELF_CTS_EN;
5410 else
5411 il->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
5412 }
5413
5414 if (changes & BSS_CHANGED_BASIC_RATES) {
5415 /* XXX use this information
5416 *
5417 * To do that, remove code from il_set_rate() and put something
5418 * like this here:
5419 *
5420 if (A-band)
5421 il->staging.ofdm_basic_rates =
5422 bss_conf->basic_rates;
5423 else
5424 il->staging.ofdm_basic_rates =
5425 bss_conf->basic_rates >> 4;
5426 il->staging.cck_basic_rates =
5427 bss_conf->basic_rates & 0xF;
5428 */
5429 }
5430
5431 if (changes & BSS_CHANGED_HT) {
5432 il_ht_conf(il, vif);
5433
5434 if (il->ops->set_rxon_chain)
5435 il->ops->set_rxon_chain(il);
5436 }
5437
5438 if (changes & BSS_CHANGED_ASSOC) {
5439 D_MAC80211("ASSOC %d\n", bss_conf->assoc);
5440 if (bss_conf->assoc) {
5441 il->timestamp = bss_conf->sync_tsf;
5442
5443 if (!il_is_rfkill(il))
5444 il->ops->post_associate(il);
5445 } else
5446 il_set_no_assoc(il, vif);
5447 }
5448
5449 if (changes && il_is_associated(il) && bss_conf->aid) {
5450 D_MAC80211("Changes (%#x) while associated\n", changes);
5451 ret = il_send_rxon_assoc(il);
5452 if (!ret) {
5453 /* Sync active_rxon with latest change. */
5454 memcpy((void *)&il->active, &il->staging,
5455 sizeof(struct il_rxon_cmd));
5456 }
5457 }
5458
5459 if (changes & BSS_CHANGED_BEACON_ENABLED) {
5460 if (vif->bss_conf.enable_beacon) {
5461 memcpy(il->staging.bssid_addr, bss_conf->bssid,
5462 ETH_ALEN);
5463 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
5464 il->ops->config_ap(il);
5465 } else
5466 il_set_no_assoc(il, vif);
5467 }
5468
5469 if (changes & BSS_CHANGED_IBSS) {
5470 ret = il->ops->manage_ibss_station(il, vif,
5471 bss_conf->ibss_joined);
5472 if (ret)
5473 IL_ERR("failed to %s IBSS station %pM\n",
5474 bss_conf->ibss_joined ? "add" : "remove",
5475 bss_conf->bssid);
5476 }
5477
5478 D_MAC80211("leave\n");
5479 mutex_unlock(&il->mutex);
5480 }
5481 EXPORT_SYMBOL(il_mac_bss_info_changed);
5482
5483 irqreturn_t
5484 il_isr(int irq, void *data)
5485 {
5486 struct il_priv *il = data;
5487 u32 inta, inta_mask;
5488 u32 inta_fh;
5489 unsigned long flags;
5490 if (!il)
5491 return IRQ_NONE;
5492
5493 spin_lock_irqsave(&il->lock, flags);
5494
5495 /* Disable (but don't clear!) interrupts here to avoid
5496 * back-to-back ISRs and sporadic interrupts from our NIC.
5497 * If we have something to service, the tasklet will re-enable ints.
5498 * If we *don't* have something, we'll re-enable before leaving here. */
5499 inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
5500 _il_wr(il, CSR_INT_MASK, 0x00000000);
5501
5502 /* Discover which interrupts are active/pending */
5503 inta = _il_rd(il, CSR_INT);
5504 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
5505
5506 /* Ignore interrupt if there's nothing in NIC to service.
5507 * This may be due to IRQ shared with another device,
5508 * or due to sporadic interrupts thrown from our NIC. */
5509 if (!inta && !inta_fh) {
5510 D_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5511 goto none;
5512 }
5513
5514 if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
5515 /* Hardware disappeared. It might have already raised
5516 * an interrupt */
5517 IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
5518 goto unplugged;
5519 }
5520
5521 D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, inta_mask,
5522 inta_fh);
5523
5524 inta &= ~CSR_INT_BIT_SCD;
5525
5526 /* il_irq_tasklet() will service interrupts and re-enable them */
5527 if (likely(inta || inta_fh))
5528 tasklet_schedule(&il->irq_tasklet);
5529
5530 unplugged:
5531 spin_unlock_irqrestore(&il->lock, flags);
5532 return IRQ_HANDLED;
5533
5534 none:
5535 /* re-enable interrupts here since we don't have anything to service. */
5536 /* only Re-enable if disabled by irq */
5537 if (test_bit(S_INT_ENABLED, &il->status))
5538 il_enable_interrupts(il);
5539 spin_unlock_irqrestore(&il->lock, flags);
5540 return IRQ_NONE;
5541 }
5542 EXPORT_SYMBOL(il_isr);
5543
5544 /*
5545 * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
5546 * function.
5547 */
5548 void
5549 il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
5550 __le16 fc, __le32 *tx_flags)
5551 {
5552 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
5553 *tx_flags |= TX_CMD_FLG_RTS_MSK;
5554 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
5555 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
5556
5557 if (!ieee80211_is_mgmt(fc))
5558 return;
5559
5560 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
5561 case cpu_to_le16(IEEE80211_STYPE_AUTH):
5562 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
5563 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
5564 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
5565 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
5566 *tx_flags |= TX_CMD_FLG_CTS_MSK;
5567 break;
5568 }
5569 } else if (info->control.rates[0].
5570 flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
5571 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
5572 *tx_flags |= TX_CMD_FLG_CTS_MSK;
5573 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
5574 }
5575 }
5576 EXPORT_SYMBOL(il_tx_cmd_protection);
Linux with added FPC-III support