drivers/net/wireless/mediatek/mt76/mt76x2/mcu.h

   1 /* SPDX-License-Identifier: ISC */
   2 /*
   3  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
   4  */
   5
   6 #ifndef __MT76x2_MCU_H
   7 #define __MT76x2_MCU_H
   8
   9 #include "../mt76x02_mcu.h"
  10
  11 /* Register definitions */
  12 #define MT_MCU_CPU_CTL                  0x0704
  13 #define MT_MCU_CLOCK_CTL                0x0708
  14 #define MT_MCU_PCIE_REMAP_BASE1         0x0740
  15 #define MT_MCU_PCIE_REMAP_BASE2         0x0744
  16 #define MT_MCU_PCIE_REMAP_BASE3         0x0748
  17
  18 #define MT_MCU_ROM_PATCH_OFFSET         0x80000
  19 #define MT_MCU_ROM_PATCH_ADDR           0x90000
  20
  21 #define MT_MCU_ILM_OFFSET               0x80000
  22
  23 #define MT_MCU_DLM_OFFSET               0x100000
  24 #define MT_MCU_DLM_ADDR                 0x90000
  25 #define MT_MCU_DLM_ADDR_E3              0x90800
  26
  27 enum mcu_calibration {
  28         MCU_CAL_R = 1,
  29         MCU_CAL_TEMP_SENSOR,
  30         MCU_CAL_RXDCOC,
  31         MCU_CAL_RC,
  32         MCU_CAL_SX_LOGEN,
  33         MCU_CAL_LC,
  34         MCU_CAL_TX_LOFT,
  35         MCU_CAL_TXIQ,
  36         MCU_CAL_TSSI,
  37         MCU_CAL_TSSI_COMP,
  38         MCU_CAL_DPD,
  39         MCU_CAL_RXIQC_FI,
  40         MCU_CAL_RXIQC_FD,
  41         MCU_CAL_PWRON,
  42         MCU_CAL_TX_SHAPING,
  43 };
  44
  45 enum mt76x2_mcu_cr_mode {
  46         MT_RF_CR,
  47         MT_BBP_CR,
  48         MT_RF_BBP_CR,
  49         MT_HL_TEMP_CR_UPDATE,
  50 };
  51
  52 struct mt76x2_tssi_comp {
  53         u8 pa_mode;
  54         u8 cal_mode;
  55         u16 pad;
  56
  57         u8 slope0;
  58         u8 slope1;
  59         u8 offset0;
  60         u8 offset1;
  61 } __packed __aligned(4);
  62
  63 int mt76x2_mcu_tssi_comp(struct mt76x02_dev *dev,
  64                          struct mt76x2_tssi_comp *tssi_data);
  65 int mt76x2_mcu_init_gain(struct mt76x02_dev *dev, u8 channel, u32 gain,
  66                          bool force);
  67
  68 #endif