1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2009-2012 Realtek Corporation.*/
4 #ifndef __RTL92C_DM_H__
5 #define __RTL92C_DM_H__
7 #define HAL_DM_DIG_DISABLE BIT(0)
8 #define HAL_DM_HIPWR_DISABLE BIT(1)
10 #define OFDM_TABLE_LENGTH 37
11 #define OFDM_TABLE_SIZE_92D 43
12 #define CCK_TABLE_LENGTH 33
14 #define CCK_TABLE_SIZE 33
16 #define BW_AUTO_SWITCH_HIGH_LOW 25
17 #define BW_AUTO_SWITCH_LOW_HIGH 30
19 #define DM_DIG_FA_UPPER 0x32
20 #define DM_DIG_FA_LOWER 0x20
21 #define DM_DIG_FA_TH0 0x100
22 #define DM_DIG_FA_TH1 0x400
23 #define DM_DIG_FA_TH2 0x600
25 #define RXPATHSELECTION_SS_TH_LOW 30
26 #define RXPATHSELECTION_DIFF_TH 18
28 #define DM_RATR_STA_INIT 0
29 #define DM_RATR_STA_HIGH 1
30 #define DM_RATR_STA_MIDDLE 2
31 #define DM_RATR_STA_LOW 3
33 #define CTS2SELF_THVAL 30
38 #define TXHIGHPWRLEVEL_NORMAL 0
39 #define TXHIGHPWRLEVEL_LEVEL1 1
40 #define TXHIGHPWRLEVEL_LEVEL2 2
41 #define TXHIGHPWRLEVEL_BT1 3
42 #define TXHIGHPWRLEVEL_BT2 4
44 #define DM_TYPE_BYFW 0
45 #define DM_TYPE_BYDRIVER 1
47 #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
48 #define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
49 #define INDEX_MAPPING_NUM 13
56 long trying_threshold
;
61 enum tag_dynamic_init_gain_operation_type_definition
{
62 DIG_TYPE_THRESH_HIGH
= 0,
63 DIG_TYPE_THRESH_LOW
= 1,
65 DIG_TYPE_RX_GAIN_MIN
= 3,
66 DIG_TYPE_RX_GAIN_MAX
= 4,
84 enum dm_sw_ant_switch
{
90 void rtl92d_dm_init(struct ieee80211_hw
*hw
);
91 void rtl92d_dm_watchdog(struct ieee80211_hw
*hw
);
92 void rtl92d_dm_init_edca_turbo(struct ieee80211_hw
*hw
);
93 void rtl92d_dm_write_dig(struct ieee80211_hw
*hw
);
94 void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw
*hw
);
95 void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw
*hw
);