1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2018-2019 Realtek Corporation
8 /* ops for PCI, USB and SDIO */
10 int (*tx
)(struct rtw_dev
*rtwdev
,
11 struct rtw_tx_pkt_info
*pkt_info
,
13 int (*setup
)(struct rtw_dev
*rtwdev
);
14 int (*start
)(struct rtw_dev
*rtwdev
);
15 void (*stop
)(struct rtw_dev
*rtwdev
);
16 void (*deep_ps
)(struct rtw_dev
*rtwdev
, bool enter
);
17 void (*link_ps
)(struct rtw_dev
*rtwdev
, bool enter
);
18 void (*interface_cfg
)(struct rtw_dev
*rtwdev
);
20 int (*write_data_rsvd_page
)(struct rtw_dev
*rtwdev
, u8
*buf
, u32 size
);
21 int (*write_data_h2c
)(struct rtw_dev
*rtwdev
, u8
*buf
, u32 size
);
23 u8 (*read8
)(struct rtw_dev
*rtwdev
, u32 addr
);
24 u16 (*read16
)(struct rtw_dev
*rtwdev
, u32 addr
);
25 u32 (*read32
)(struct rtw_dev
*rtwdev
, u32 addr
);
26 void (*write8
)(struct rtw_dev
*rtwdev
, u32 addr
, u8 val
);
27 void (*write16
)(struct rtw_dev
*rtwdev
, u32 addr
, u16 val
);
28 void (*write32
)(struct rtw_dev
*rtwdev
, u32 addr
, u32 val
);
31 static inline int rtw_hci_tx(struct rtw_dev
*rtwdev
,
32 struct rtw_tx_pkt_info
*pkt_info
,
35 return rtwdev
->hci
.ops
->tx(rtwdev
, pkt_info
, skb
);
38 static inline int rtw_hci_setup(struct rtw_dev
*rtwdev
)
40 return rtwdev
->hci
.ops
->setup(rtwdev
);
43 static inline int rtw_hci_start(struct rtw_dev
*rtwdev
)
45 return rtwdev
->hci
.ops
->start(rtwdev
);
48 static inline void rtw_hci_stop(struct rtw_dev
*rtwdev
)
50 rtwdev
->hci
.ops
->stop(rtwdev
);
53 static inline void rtw_hci_deep_ps(struct rtw_dev
*rtwdev
, bool enter
)
55 rtwdev
->hci
.ops
->deep_ps(rtwdev
, enter
);
58 static inline void rtw_hci_link_ps(struct rtw_dev
*rtwdev
, bool enter
)
60 rtwdev
->hci
.ops
->link_ps(rtwdev
, enter
);
63 static inline void rtw_hci_interface_cfg(struct rtw_dev
*rtwdev
)
65 rtwdev
->hci
.ops
->interface_cfg(rtwdev
);
69 rtw_hci_write_data_rsvd_page(struct rtw_dev
*rtwdev
, u8
*buf
, u32 size
)
71 return rtwdev
->hci
.ops
->write_data_rsvd_page(rtwdev
, buf
, size
);
75 rtw_hci_write_data_h2c(struct rtw_dev
*rtwdev
, u8
*buf
, u32 size
)
77 return rtwdev
->hci
.ops
->write_data_h2c(rtwdev
, buf
, size
);
80 static inline u8
rtw_read8(struct rtw_dev
*rtwdev
, u32 addr
)
82 return rtwdev
->hci
.ops
->read8(rtwdev
, addr
);
85 static inline u16
rtw_read16(struct rtw_dev
*rtwdev
, u32 addr
)
87 return rtwdev
->hci
.ops
->read16(rtwdev
, addr
);
90 static inline u32
rtw_read32(struct rtw_dev
*rtwdev
, u32 addr
)
92 return rtwdev
->hci
.ops
->read32(rtwdev
, addr
);
95 static inline void rtw_write8(struct rtw_dev
*rtwdev
, u32 addr
, u8 val
)
97 rtwdev
->hci
.ops
->write8(rtwdev
, addr
, val
);
100 static inline void rtw_write16(struct rtw_dev
*rtwdev
, u32 addr
, u16 val
)
102 rtwdev
->hci
.ops
->write16(rtwdev
, addr
, val
);
105 static inline void rtw_write32(struct rtw_dev
*rtwdev
, u32 addr
, u32 val
)
107 rtwdev
->hci
.ops
->write32(rtwdev
, addr
, val
);
110 static inline void rtw_write8_set(struct rtw_dev
*rtwdev
, u32 addr
, u8 bit
)
114 val
= rtw_read8(rtwdev
, addr
);
115 rtw_write8(rtwdev
, addr
, val
| bit
);
118 static inline void rtw_write16_set(struct rtw_dev
*rtwdev
, u32 addr
, u16 bit
)
122 val
= rtw_read16(rtwdev
, addr
);
123 rtw_write16(rtwdev
, addr
, val
| bit
);
126 static inline void rtw_write32_set(struct rtw_dev
*rtwdev
, u32 addr
, u32 bit
)
130 val
= rtw_read32(rtwdev
, addr
);
131 rtw_write32(rtwdev
, addr
, val
| bit
);
134 static inline void rtw_write8_clr(struct rtw_dev
*rtwdev
, u32 addr
, u8 bit
)
138 val
= rtw_read8(rtwdev
, addr
);
139 rtw_write8(rtwdev
, addr
, val
& ~bit
);
142 static inline void rtw_write16_clr(struct rtw_dev
*rtwdev
, u32 addr
, u16 bit
)
146 val
= rtw_read16(rtwdev
, addr
);
147 rtw_write16(rtwdev
, addr
, val
& ~bit
);
150 static inline void rtw_write32_clr(struct rtw_dev
*rtwdev
, u32 addr
, u32 bit
)
154 val
= rtw_read32(rtwdev
, addr
);
155 rtw_write32(rtwdev
, addr
, val
& ~bit
);
159 rtw_read_rf(struct rtw_dev
*rtwdev
, enum rtw_rf_path rf_path
,
165 spin_lock_irqsave(&rtwdev
->rf_lock
, flags
);
166 val
= rtwdev
->chip
->ops
->read_rf(rtwdev
, rf_path
, addr
, mask
);
167 spin_unlock_irqrestore(&rtwdev
->rf_lock
, flags
);
173 rtw_write_rf(struct rtw_dev
*rtwdev
, enum rtw_rf_path rf_path
,
174 u32 addr
, u32 mask
, u32 data
)
178 spin_lock_irqsave(&rtwdev
->rf_lock
, flags
);
179 rtwdev
->chip
->ops
->write_rf(rtwdev
, rf_path
, addr
, mask
, data
);
180 spin_unlock_irqrestore(&rtwdev
->rf_lock
, flags
);
184 rtw_read32_mask(struct rtw_dev
*rtwdev
, u32 addr
, u32 mask
)
186 u32 shift
= __ffs(mask
);
190 orig
= rtw_read32(rtwdev
, addr
);
191 ret
= (orig
& mask
) >> shift
;
197 rtw_write32_mask(struct rtw_dev
*rtwdev
, u32 addr
, u32 mask
, u32 data
)
199 u32 shift
= __ffs(mask
);
203 WARN(addr
& 0x3, "should be 4-byte aligned, addr = 0x%08x\n", addr
);
205 orig
= rtw_read32(rtwdev
, addr
);
206 set
= (orig
& ~mask
) | ((data
<< shift
) & mask
);
207 rtw_write32(rtwdev
, addr
, set
);
211 rtw_write8_mask(struct rtw_dev
*rtwdev
, u32 addr
, u32 mask
, u8 data
)
219 orig
= rtw_read8(rtwdev
, addr
);
220 set
= (orig
& ~mask
) | ((data
<< shift
) & mask
);
221 rtw_write8(rtwdev
, addr
, set
);
224 static inline enum rtw_hci_type
rtw_hci_type(struct rtw_dev
*rtwdev
)
226 return rtwdev
->hci
.type
;