drivers/pci/controller/pci-versatile.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright 2004 Koninklijke Philips Electronics NV
   4  *
   5  * Conversion to platform driver and DT:
   6  * Copyright 2014 Linaro Ltd.
   7  *
   8  * 14/04/2005 Initial version, colin.king@philips.com
   9  */
  10 #include <linux/kernel.h>
  11 #include <linux/module.h>
  12 #include <linux/of_address.h>
  13 #include <linux/of_pci.h>
  14 #include <linux/of_platform.h>
  15 #include <linux/pci.h>
  16 #include <linux/platform_device.h>
  17
  18 #include "../pci.h"
  19
  20 static void __iomem *versatile_pci_base;
  21 static void __iomem *versatile_cfg_base[2];
  22
  23 #define PCI_IMAP(m)             (versatile_pci_base + ((m) * 4))
  24 #define PCI_SMAP(m)             (versatile_pci_base + 0x14 + ((m) * 4))
  25 #define PCI_SELFID              (versatile_pci_base + 0xc)
  26
  27 #define VP_PCI_DEVICE_ID                0x030010ee
  28 #define VP_PCI_CLASS_ID                 0x0b400000
  29
  30 static u32 pci_slot_ignore;
  31
  32 static int __init versatile_pci_slot_ignore(char *str)
  33 {
  34         int retval;
  35         int slot;
  36
  37         while ((retval = get_option(&str, &slot))) {
  38                 if ((slot < 0) || (slot > 31))
  39                         pr_err("Illegal slot value: %d\n", slot);
  40                 else
  41                         pci_slot_ignore |= (1 << slot);
  42         }
  43         return 1;
  44 }
  45 __setup("pci_slot_ignore=", versatile_pci_slot_ignore);
  46
  47
  48 static void __iomem *versatile_map_bus(struct pci_bus *bus,
  49                                        unsigned int devfn, int offset)
  50 {
  51         unsigned int busnr = bus->number;
  52
  53         if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
  54                 return NULL;
  55
  56         return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
  57 }
  58
  59 static struct pci_ops pci_versatile_ops = {
  60         .map_bus = versatile_map_bus,
  61         .read   = pci_generic_config_read32,
  62         .write  = pci_generic_config_write,
  63 };
  64
  65 static int versatile_pci_probe(struct platform_device *pdev)
  66 {
  67         struct device *dev = &pdev->dev;
  68         struct resource *res;
  69         struct resource_entry *entry;
  70         int ret, i, myslot = -1, mem = 1;
  71         u32 val;
  72         void __iomem *local_pci_cfg_base;
  73         struct pci_bus *bus, *child;
  74         struct pci_host_bridge *bridge;
  75
  76         bridge = devm_pci_alloc_host_bridge(dev, 0);
  77         if (!bridge)
  78                 return -ENOMEM;
  79
  80         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  81         versatile_pci_base = devm_ioremap_resource(dev, res);
  82         if (IS_ERR(versatile_pci_base))
  83                 return PTR_ERR(versatile_pci_base);
  84
  85         res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  86         versatile_cfg_base[0] = devm_ioremap_resource(dev, res);
  87         if (IS_ERR(versatile_cfg_base[0]))
  88                 return PTR_ERR(versatile_cfg_base[0]);
  89
  90         res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
  91         versatile_cfg_base[1] = devm_pci_remap_cfg_resource(dev, res);
  92         if (IS_ERR(versatile_cfg_base[1]))
  93                 return PTR_ERR(versatile_cfg_base[1]);
  94
  95         ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
  96                                               NULL, NULL);
  97         if (ret)
  98                 return ret;
  99
 100         resource_list_for_each_entry(entry, &bridge->windows) {
 101                 if (resource_type(entry->res) == IORESOURCE_MEM) {
 102                         writel(entry->res->start >> 28, PCI_IMAP(mem));
 103                         writel(__pa(PAGE_OFFSET) >> 28, PCI_SMAP(mem));
 104                         mem++;
 105                 }
 106         }
 107
 108         /*
 109          * We need to discover the PCI core first to configure itself
 110          * before the main PCI probing is performed
 111          */
 112         for (i = 0; i < 32; i++) {
 113                 if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
 114                     (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
 115                         myslot = i;
 116                         break;
 117                 }
 118         }
 119         if (myslot == -1) {
 120                 dev_err(dev, "Cannot find PCI core!\n");
 121                 return -EIO;
 122         }
 123         /*
 124          * Do not to map Versatile FPGA PCI device into memory space
 125          */
 126         pci_slot_ignore |= (1 << myslot);
 127
 128         dev_info(dev, "PCI core found (slot %d)\n", myslot);
 129
 130         writel(myslot, PCI_SELFID);
 131         local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
 132
 133         val = readl(local_pci_cfg_base + PCI_COMMAND);
 134         val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
 135         writel(val, local_pci_cfg_base + PCI_COMMAND);
 136
 137         /*
 138          * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
 139          */
 140         writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_0);
 141         writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_1);
 142         writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_2);
 143
 144         /*
 145          * For many years the kernel and QEMU were symbiotically buggy
 146          * in that they both assumed the same broken IRQ mapping.
 147          * QEMU therefore attempts to auto-detect old broken kernels
 148          * so that they still work on newer QEMU as they did on old
 149          * QEMU. Since we now use the correct (ie matching-hardware)
 150          * IRQ mapping we write a definitely different value to a
 151          * PCI_INTERRUPT_LINE register to tell QEMU that we expect
 152          * real hardware behaviour and it need not be backwards
 153          * compatible for us. This write is harmless on real hardware.
 154          */
 155         writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
 156
 157         pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
 158         pci_add_flags(PCI_REASSIGN_ALL_BUS);
 159
 160         bridge->dev.parent = dev;
 161         bridge->sysdata = NULL;
 162         bridge->busnr = 0;
 163         bridge->ops = &pci_versatile_ops;
 164         bridge->map_irq = of_irq_parse_and_map_pci;
 165         bridge->swizzle_irq = pci_common_swizzle;
 166
 167         ret = pci_scan_root_bus_bridge(bridge);
 168         if (ret < 0)
 169                 return ret;
 170
 171         bus = bridge->bus;
 172
 173         pci_assign_unassigned_bus_resources(bus);
 174         list_for_each_entry(child, &bus->children, node)
 175                 pcie_bus_configure_settings(child);
 176         pci_bus_add_devices(bus);
 177
 178         return 0;
 179 }
 180
 181 static const struct of_device_id versatile_pci_of_match[] = {
 182         { .compatible = "arm,versatile-pci", },
 183         { },
 184 };
 185 MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
 186
 187 static struct platform_driver versatile_pci_driver = {
 188         .driver = {
 189                 .name = "versatile-pci",
 190                 .of_match_table = versatile_pci_of_match,
 191                 .suppress_bind_attrs = true,
 192         },
 193         .probe = versatile_pci_probe,
 194 };
 195 module_platform_driver(versatile_pci_driver);
 196
 197 MODULE_DESCRIPTION("Versatile PCI driver");
 198 MODULE_LICENSE("GPL v2");