drivers/pinctrl/freescale/pinctrl-imx6sll.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Copyright (C) 2016 Freescale Semiconductor, Inc.
   4 // Copyright 2017-2018 NXP.
   5
   6 #include <linux/err.h>
   7 #include <linux/init.h>
   8 #include <linux/io.h>
   9 #include <linux/module.h>
  10 #include <linux/of.h>
  11 #include <linux/of_device.h>
  12 #include <linux/pinctrl/pinctrl.h>
  13
  14 #include "pinctrl-imx.h"
  15
  16 enum imx6sll_pads {
  17         MX6SLL_PAD_RESERVE0 = 0,
  18         MX6SLL_PAD_RESERVE1 = 1,
  19         MX6SLL_PAD_RESERVE2 = 2,
  20         MX6SLL_PAD_RESERVE3 = 3,
  21         MX6SLL_PAD_RESERVE4 = 4,
  22         MX6SLL_PAD_WDOG_B = 5,
  23         MX6SLL_PAD_REF_CLK_24M = 6,
  24         MX6SLL_PAD_REF_CLK_32K = 7,
  25         MX6SLL_PAD_PWM1 = 8,
  26         MX6SLL_PAD_KEY_COL0 = 9,
  27         MX6SLL_PAD_KEY_ROW0 = 10,
  28         MX6SLL_PAD_KEY_COL1 = 11,
  29         MX6SLL_PAD_KEY_ROW1 = 12,
  30         MX6SLL_PAD_KEY_COL2 = 13,
  31         MX6SLL_PAD_KEY_ROW2 = 14,
  32         MX6SLL_PAD_KEY_COL3 = 15,
  33         MX6SLL_PAD_KEY_ROW3 = 16,
  34         MX6SLL_PAD_KEY_COL4 = 17,
  35         MX6SLL_PAD_KEY_ROW4 = 18,
  36         MX6SLL_PAD_KEY_COL5 = 19,
  37         MX6SLL_PAD_KEY_ROW5 = 20,
  38         MX6SLL_PAD_KEY_COL6 = 21,
  39         MX6SLL_PAD_KEY_ROW6 = 22,
  40         MX6SLL_PAD_KEY_COL7 = 23,
  41         MX6SLL_PAD_KEY_ROW7 = 24,
  42         MX6SLL_PAD_EPDC_DATA00 = 25,
  43         MX6SLL_PAD_EPDC_DATA01 = 26,
  44         MX6SLL_PAD_EPDC_DATA02 = 27,
  45         MX6SLL_PAD_EPDC_DATA03 = 28,
  46         MX6SLL_PAD_EPDC_DATA04 = 29,
  47         MX6SLL_PAD_EPDC_DATA05 = 30,
  48         MX6SLL_PAD_EPDC_DATA06 = 31,
  49         MX6SLL_PAD_EPDC_DATA07 = 32,
  50         MX6SLL_PAD_EPDC_DATA08 = 33,
  51         MX6SLL_PAD_EPDC_DATA09 = 34,
  52         MX6SLL_PAD_EPDC_DATA10 = 35,
  53         MX6SLL_PAD_EPDC_DATA11 = 36,
  54         MX6SLL_PAD_EPDC_DATA12 = 37,
  55         MX6SLL_PAD_EPDC_DATA13 = 38,
  56         MX6SLL_PAD_EPDC_DATA14 = 39,
  57         MX6SLL_PAD_EPDC_DATA15 = 40,
  58         MX6SLL_PAD_EPDC_SDCLK = 41,
  59         MX6SLL_PAD_EPDC_SDLE = 42,
  60         MX6SLL_PAD_EPDC_SDOE = 43,
  61         MX6SLL_PAD_EPDC_SDSHR = 44,
  62         MX6SLL_PAD_EPDC_SDCE0 = 45,
  63         MX6SLL_PAD_EPDC_SDCE1 = 46,
  64         MX6SLL_PAD_EPDC_SDCE2 = 47,
  65         MX6SLL_PAD_EPDC_SDCE3 = 48,
  66         MX6SLL_PAD_EPDC_GDCLK = 49,
  67         MX6SLL_PAD_EPDC_GDOE = 50,
  68         MX6SLL_PAD_EPDC_GDRL = 51,
  69         MX6SLL_PAD_EPDC_GDSP = 52,
  70         MX6SLL_PAD_EPDC_VCOM0 = 53,
  71         MX6SLL_PAD_EPDC_VCOM1 = 54,
  72         MX6SLL_PAD_EPDC_BDR0 = 55,
  73         MX6SLL_PAD_EPDC_BDR1 = 56,
  74         MX6SLL_PAD_EPDC_PWR_CTRL0 = 57,
  75         MX6SLL_PAD_EPDC_PWR_CTRL1 = 58,
  76         MX6SLL_PAD_EPDC_PWR_CTRL2 = 59,
  77         MX6SLL_PAD_EPDC_PWR_CTRL3 = 60,
  78         MX6SLL_PAD_EPDC_PWR_COM = 61,
  79         MX6SLL_PAD_EPDC_PWR_INT = 62,
  80         MX6SLL_PAD_EPDC_PWR_STAT = 63,
  81         MX6SLL_PAD_EPDC_PWR_WAKE = 64,
  82         MX6SLL_PAD_LCD_CLK = 65,
  83         MX6SLL_PAD_LCD_ENABLE = 66,
  84         MX6SLL_PAD_LCD_HSYNC = 67,
  85         MX6SLL_PAD_LCD_VSYNC = 68,
  86         MX6SLL_PAD_LCD_RESET = 69,
  87         MX6SLL_PAD_LCD_DATA00 = 70,
  88         MX6SLL_PAD_LCD_DATA01 = 71,
  89         MX6SLL_PAD_LCD_DATA02 = 72,
  90         MX6SLL_PAD_LCD_DATA03 = 73,
  91         MX6SLL_PAD_LCD_DATA04 = 74,
  92         MX6SLL_PAD_LCD_DATA05 = 75,
  93         MX6SLL_PAD_LCD_DATA06 = 76,
  94         MX6SLL_PAD_LCD_DATA07 = 77,
  95         MX6SLL_PAD_LCD_DATA08 = 78,
  96         MX6SLL_PAD_LCD_DATA09 = 79,
  97         MX6SLL_PAD_LCD_DATA10 = 80,
  98         MX6SLL_PAD_LCD_DATA11 = 81,
  99         MX6SLL_PAD_LCD_DATA12 = 82,
 100         MX6SLL_PAD_LCD_DATA13 = 83,
 101         MX6SLL_PAD_LCD_DATA14 = 84,
 102         MX6SLL_PAD_LCD_DATA15 = 85,
 103         MX6SLL_PAD_LCD_DATA16 = 86,
 104         MX6SLL_PAD_LCD_DATA17 = 87,
 105         MX6SLL_PAD_LCD_DATA18 = 88,
 106         MX6SLL_PAD_LCD_DATA19 = 89,
 107         MX6SLL_PAD_LCD_DATA20 = 90,
 108         MX6SLL_PAD_LCD_DATA21 = 91,
 109         MX6SLL_PAD_LCD_DATA22 = 92,
 110         MX6SLL_PAD_LCD_DATA23 = 93,
 111         MX6SLL_PAD_AUD_RXFS = 94,
 112         MX6SLL_PAD_AUD_RXC = 95,
 113         MX6SLL_PAD_AUD_RXD = 96,
 114         MX6SLL_PAD_AUD_TXC = 97,
 115         MX6SLL_PAD_AUD_TXFS = 98,
 116         MX6SLL_PAD_AUD_TXD = 99,
 117         MX6SLL_PAD_AUD_MCLK = 100,
 118         MX6SLL_PAD_UART1_RXD = 101,
 119         MX6SLL_PAD_UART1_TXD = 102,
 120         MX6SLL_PAD_I2C1_SCL = 103,
 121         MX6SLL_PAD_I2C1_SDA = 104,
 122         MX6SLL_PAD_I2C2_SCL = 105,
 123         MX6SLL_PAD_I2C2_SDA = 106,
 124         MX6SLL_PAD_ECSPI1_SCLK = 107,
 125         MX6SLL_PAD_ECSPI1_MOSI = 108,
 126         MX6SLL_PAD_ECSPI1_MISO = 109,
 127         MX6SLL_PAD_ECSPI1_SS0 = 110,
 128         MX6SLL_PAD_ECSPI2_SCLK = 111,
 129         MX6SLL_PAD_ECSPI2_MOSI = 112,
 130         MX6SLL_PAD_ECSPI2_MISO = 113,
 131         MX6SLL_PAD_ECSPI2_SS0 = 114,
 132         MX6SLL_PAD_SD1_CLK = 115,
 133         MX6SLL_PAD_SD1_CMD = 116,
 134         MX6SLL_PAD_SD1_DATA0 = 117,
 135         MX6SLL_PAD_SD1_DATA1 = 118,
 136         MX6SLL_PAD_SD1_DATA2 = 119,
 137         MX6SLL_PAD_SD1_DATA3 = 120,
 138         MX6SLL_PAD_SD1_DATA4 = 121,
 139         MX6SLL_PAD_SD1_DATA5 = 122,
 140         MX6SLL_PAD_SD1_DATA6 = 123,
 141         MX6SLL_PAD_SD1_DATA7 = 124,
 142         MX6SLL_PAD_SD2_RESET = 125,
 143         MX6SLL_PAD_SD2_CLK = 126,
 144         MX6SLL_PAD_SD2_CMD = 127,
 145         MX6SLL_PAD_SD2_DATA0 = 128,
 146         MX6SLL_PAD_SD2_DATA1 = 129,
 147         MX6SLL_PAD_SD2_DATA2 = 130,
 148         MX6SLL_PAD_SD2_DATA3 = 131,
 149         MX6SLL_PAD_SD2_DATA4 = 132,
 150         MX6SLL_PAD_SD2_DATA5 = 133,
 151         MX6SLL_PAD_SD2_DATA6 = 134,
 152         MX6SLL_PAD_SD2_DATA7 = 135,
 153         MX6SLL_PAD_SD3_CLK = 136,
 154         MX6SLL_PAD_SD3_CMD = 137,
 155         MX6SLL_PAD_SD3_DATA0 = 138,
 156         MX6SLL_PAD_SD3_DATA1 = 139,
 157         MX6SLL_PAD_SD3_DATA2 = 140,
 158         MX6SLL_PAD_SD3_DATA3 = 141,
 159         MX6SLL_PAD_GPIO4_IO20 = 142,
 160         MX6SLL_PAD_GPIO4_IO21 = 143,
 161         MX6SLL_PAD_GPIO4_IO19 = 144,
 162         MX6SLL_PAD_GPIO4_IO25 = 145,
 163         MX6SLL_PAD_GPIO4_IO18 = 146,
 164         MX6SLL_PAD_GPIO4_IO24 = 147,
 165         MX6SLL_PAD_GPIO4_IO23 = 148,
 166         MX6SLL_PAD_GPIO4_IO17 = 149,
 167         MX6SLL_PAD_GPIO4_IO22 = 150,
 168         MX6SLL_PAD_GPIO4_IO16 = 151,
 169         MX6SLL_PAD_GPIO4_IO26 = 152,
 170 };
 171
 172 /* Pad names for the pinmux subsystem */
 173 static const struct pinctrl_pin_desc imx6sll_pinctrl_pads[] = {
 174         IMX_PINCTRL_PIN(MX6SLL_PAD_RESERVE0),
 175         IMX_PINCTRL_PIN(MX6SLL_PAD_RESERVE1),
 176         IMX_PINCTRL_PIN(MX6SLL_PAD_RESERVE2),
 177         IMX_PINCTRL_PIN(MX6SLL_PAD_RESERVE3),
 178         IMX_PINCTRL_PIN(MX6SLL_PAD_RESERVE4),
 179         IMX_PINCTRL_PIN(MX6SLL_PAD_WDOG_B),
 180         IMX_PINCTRL_PIN(MX6SLL_PAD_REF_CLK_24M),
 181         IMX_PINCTRL_PIN(MX6SLL_PAD_REF_CLK_32K),
 182         IMX_PINCTRL_PIN(MX6SLL_PAD_PWM1),
 183         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL0),
 184         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW0),
 185         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL1),
 186         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW1),
 187         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL2),
 188         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW2),
 189         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL3),
 190         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW3),
 191         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL4),
 192         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW4),
 193         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL5),
 194         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW5),
 195         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL6),
 196         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW6),
 197         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_COL7),
 198         IMX_PINCTRL_PIN(MX6SLL_PAD_KEY_ROW7),
 199         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA00),
 200         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA01),
 201         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA02),
 202         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA03),
 203         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA04),
 204         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA05),
 205         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA06),
 206         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA07),
 207         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA08),
 208         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA09),
 209         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA10),
 210         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA11),
 211         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA12),
 212         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA13),
 213         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA14),
 214         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_DATA15),
 215         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDCLK),
 216         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDLE),
 217         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDOE),
 218         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDSHR),
 219         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDCE0),
 220         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDCE1),
 221         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDCE2),
 222         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_SDCE3),
 223         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_GDCLK),
 224         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_GDOE),
 225         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_GDRL),
 226         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_GDSP),
 227         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_VCOM0),
 228         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_VCOM1),
 229         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_BDR0),
 230         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_BDR1),
 231         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_CTRL0),
 232         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_CTRL1),
 233         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_CTRL2),
 234         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_CTRL3),
 235         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_COM),
 236         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_INT),
 237         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_STAT),
 238         IMX_PINCTRL_PIN(MX6SLL_PAD_EPDC_PWR_WAKE),
 239         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_CLK),
 240         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_ENABLE),
 241         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_HSYNC),
 242         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_VSYNC),
 243         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_RESET),
 244         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA00),
 245         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA01),
 246         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA02),
 247         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA03),
 248         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA04),
 249         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA05),
 250         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA06),
 251         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA07),
 252         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA08),
 253         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA09),
 254         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA10),
 255         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA11),
 256         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA12),
 257         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA13),
 258         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA14),
 259         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA15),
 260         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA16),
 261         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA17),
 262         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA18),
 263         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA19),
 264         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA20),
 265         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA21),
 266         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA22),
 267         IMX_PINCTRL_PIN(MX6SLL_PAD_LCD_DATA23),
 268         IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_RXFS),
 269         IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_RXC),
 270         IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_RXD),
 271         IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_TXC),
 272         IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_TXFS),
 273         IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_TXD),
 274         IMX_PINCTRL_PIN(MX6SLL_PAD_AUD_MCLK),
 275         IMX_PINCTRL_PIN(MX6SLL_PAD_UART1_RXD),
 276         IMX_PINCTRL_PIN(MX6SLL_PAD_UART1_TXD),
 277         IMX_PINCTRL_PIN(MX6SLL_PAD_I2C1_SCL),
 278         IMX_PINCTRL_PIN(MX6SLL_PAD_I2C1_SDA),
 279         IMX_PINCTRL_PIN(MX6SLL_PAD_I2C2_SCL),
 280         IMX_PINCTRL_PIN(MX6SLL_PAD_I2C2_SDA),
 281         IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI1_SCLK),
 282         IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI1_MOSI),
 283         IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI1_MISO),
 284         IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI1_SS0),
 285         IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI2_SCLK),
 286         IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI2_MOSI),
 287         IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI2_MISO),
 288         IMX_PINCTRL_PIN(MX6SLL_PAD_ECSPI2_SS0),
 289         IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_CLK),
 290         IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_CMD),
 291         IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA0),
 292         IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA1),
 293         IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA2),
 294         IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA3),
 295         IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA4),
 296         IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA5),
 297         IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA6),
 298         IMX_PINCTRL_PIN(MX6SLL_PAD_SD1_DATA7),
 299         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_RESET),
 300         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_CLK),
 301         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_CMD),
 302         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA0),
 303         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA1),
 304         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA2),
 305         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA3),
 306         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA4),
 307         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA5),
 308         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA6),
 309         IMX_PINCTRL_PIN(MX6SLL_PAD_SD2_DATA7),
 310         IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_CLK),
 311         IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_CMD),
 312         IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_DATA0),
 313         IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_DATA1),
 314         IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_DATA2),
 315         IMX_PINCTRL_PIN(MX6SLL_PAD_SD3_DATA3),
 316         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO20),
 317         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO21),
 318         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO19),
 319         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO25),
 320         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO18),
 321         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO24),
 322         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO23),
 323         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO17),
 324         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO22),
 325         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO16),
 326         IMX_PINCTRL_PIN(MX6SLL_PAD_GPIO4_IO26),
 327 };
 328
 329 static const struct imx_pinctrl_soc_info imx6sll_pinctrl_info = {
 330         .pins = imx6sll_pinctrl_pads,
 331         .npins = ARRAY_SIZE(imx6sll_pinctrl_pads),
 332         .gpr_compatible = "fsl,imx6sll-iomuxc-gpr",
 333 };
 334
 335 static const struct of_device_id imx6sll_pinctrl_of_match[] = {
 336         { .compatible = "fsl,imx6sll-iomuxc", .data = &imx6sll_pinctrl_info, },
 337         { /* sentinel */ }
 338 };
 339
 340 static int imx6sll_pinctrl_probe(struct platform_device *pdev)
 341 {
 342         return imx_pinctrl_probe(pdev, &imx6sll_pinctrl_info);
 343 }
 344
 345 static struct platform_driver imx6sll_pinctrl_driver = {
 346         .driver = {
 347                 .name = "imx6sll-pinctrl",
 348                 .of_match_table = of_match_ptr(imx6sll_pinctrl_of_match),
 349                 .suppress_bind_attrs = true,
 350         },
 351         .probe = imx6sll_pinctrl_probe,
 352 };
 353
 354 static int __init imx6sll_pinctrl_init(void)
 355 {
 356         return platform_driver_register(&imx6sll_pinctrl_driver);
 357 }
 358 arch_initcall(imx6sll_pinctrl_init);