1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek Pinctrl Moore Driver, which implement the generic dt-binding
4 * pinctrl-bindings.txt for MediaTek SoC.
6 * Copyright (C) 2017-2018 MediaTek Inc.
7 * Author: Sean Wang <sean.wang@mediatek.com>
11 #include <linux/gpio/driver.h>
12 #include "pinctrl-moore.h"
14 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME
16 /* Custom pinconf parameters */
17 #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1)
18 #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2)
19 #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3)
20 #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4)
22 static const struct pinconf_generic_params mtk_custom_bindings
[] = {
23 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL
, 0},
24 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL
, 0},
25 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV
, 1},
26 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV
, 1},
29 #ifdef CONFIG_DEBUG_FS
30 static const struct pin_config_item mtk_conf_items
[] = {
31 PCONFDUMP(MTK_PIN_CONFIG_TDSEL
, "tdsel", NULL
, true),
32 PCONFDUMP(MTK_PIN_CONFIG_RDSEL
, "rdsel", NULL
, true),
33 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV
, "pu-adv", NULL
, true),
34 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV
, "pd-adv", NULL
, true),
38 static int mtk_pinmux_set_mux(struct pinctrl_dev
*pctldev
,
39 unsigned int selector
, unsigned int group
)
41 struct mtk_pinctrl
*hw
= pinctrl_dev_get_drvdata(pctldev
);
42 struct function_desc
*func
;
43 struct group_desc
*grp
;
46 func
= pinmux_generic_get_function(pctldev
, selector
);
50 grp
= pinctrl_generic_get_group(pctldev
, group
);
54 dev_dbg(pctldev
->dev
, "enable function %s group %s\n",
55 func
->name
, grp
->name
);
57 for (i
= 0; i
< grp
->num_pins
; i
++) {
58 const struct mtk_pin_desc
*desc
;
59 int *pin_modes
= grp
->data
;
60 int pin
= grp
->pins
[i
];
62 desc
= (const struct mtk_pin_desc
*)&hw
->soc
->pins
[pin
];
64 mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_MODE
,
71 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev
*pctldev
,
72 struct pinctrl_gpio_range
*range
,
75 struct mtk_pinctrl
*hw
= pinctrl_dev_get_drvdata(pctldev
);
76 const struct mtk_pin_desc
*desc
;
78 desc
= (const struct mtk_pin_desc
*)&hw
->soc
->pins
[pin
];
80 return mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_MODE
,
84 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev
*pctldev
,
85 struct pinctrl_gpio_range
*range
,
86 unsigned int pin
, bool input
)
88 struct mtk_pinctrl
*hw
= pinctrl_dev_get_drvdata(pctldev
);
89 const struct mtk_pin_desc
*desc
;
91 desc
= (const struct mtk_pin_desc
*)&hw
->soc
->pins
[pin
];
93 /* hardware would take 0 as input direction */
94 return mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_DIR
, !input
);
97 static int mtk_pinconf_get(struct pinctrl_dev
*pctldev
,
98 unsigned int pin
, unsigned long *config
)
100 struct mtk_pinctrl
*hw
= pinctrl_dev_get_drvdata(pctldev
);
101 u32 param
= pinconf_to_config_param(*config
);
102 int val
, val2
, err
, reg
, ret
= 1;
103 const struct mtk_pin_desc
*desc
;
105 desc
= (const struct mtk_pin_desc
*)&hw
->soc
->pins
[pin
];
108 case PIN_CONFIG_BIAS_DISABLE
:
109 if (hw
->soc
->bias_disable_get
) {
110 err
= hw
->soc
->bias_disable_get(hw
, desc
, &ret
);
117 case PIN_CONFIG_BIAS_PULL_UP
:
118 if (hw
->soc
->bias_get
) {
119 err
= hw
->soc
->bias_get(hw
, desc
, 1, &ret
);
126 case PIN_CONFIG_BIAS_PULL_DOWN
:
127 if (hw
->soc
->bias_get
) {
128 err
= hw
->soc
->bias_get(hw
, desc
, 0, &ret
);
135 case PIN_CONFIG_SLEW_RATE
:
136 err
= mtk_hw_get_value(hw
, desc
, PINCTRL_PIN_REG_SR
, &val
);
144 case PIN_CONFIG_INPUT_ENABLE
:
145 case PIN_CONFIG_OUTPUT_ENABLE
:
146 err
= mtk_hw_get_value(hw
, desc
, PINCTRL_PIN_REG_DIR
, &val
);
150 /* HW takes input mode as zero; output mode as non-zero */
151 if ((val
&& param
== PIN_CONFIG_INPUT_ENABLE
) ||
152 (!val
&& param
== PIN_CONFIG_OUTPUT_ENABLE
))
156 case PIN_CONFIG_INPUT_SCHMITT_ENABLE
:
157 err
= mtk_hw_get_value(hw
, desc
, PINCTRL_PIN_REG_DIR
, &val
);
161 err
= mtk_hw_get_value(hw
, desc
, PINCTRL_PIN_REG_SMT
, &val2
);
169 case PIN_CONFIG_DRIVE_STRENGTH
:
170 if (hw
->soc
->drive_get
) {
171 err
= hw
->soc
->drive_get(hw
, desc
, &ret
);
178 case MTK_PIN_CONFIG_TDSEL
:
179 case MTK_PIN_CONFIG_RDSEL
:
180 reg
= (param
== MTK_PIN_CONFIG_TDSEL
) ?
181 PINCTRL_PIN_REG_TDSEL
: PINCTRL_PIN_REG_RDSEL
;
183 err
= mtk_hw_get_value(hw
, desc
, reg
, &val
);
190 case MTK_PIN_CONFIG_PU_ADV
:
191 case MTK_PIN_CONFIG_PD_ADV
:
192 if (hw
->soc
->adv_pull_get
) {
195 pullup
= param
== MTK_PIN_CONFIG_PU_ADV
;
196 err
= hw
->soc
->adv_pull_get(hw
, desc
, pullup
, &ret
);
207 *config
= pinconf_to_config_packed(param
, ret
);
212 static int mtk_pinconf_set(struct pinctrl_dev
*pctldev
, unsigned int pin
,
213 unsigned long *configs
, unsigned int num_configs
)
215 struct mtk_pinctrl
*hw
= pinctrl_dev_get_drvdata(pctldev
);
216 const struct mtk_pin_desc
*desc
;
220 desc
= (const struct mtk_pin_desc
*)&hw
->soc
->pins
[pin
];
222 for (cfg
= 0; cfg
< num_configs
; cfg
++) {
223 param
= pinconf_to_config_param(configs
[cfg
]);
224 arg
= pinconf_to_config_argument(configs
[cfg
]);
227 case PIN_CONFIG_BIAS_DISABLE
:
228 if (hw
->soc
->bias_disable_set
) {
229 err
= hw
->soc
->bias_disable_set(hw
, desc
);
236 case PIN_CONFIG_BIAS_PULL_UP
:
237 if (hw
->soc
->bias_set
) {
238 err
= hw
->soc
->bias_set(hw
, desc
, 1);
245 case PIN_CONFIG_BIAS_PULL_DOWN
:
246 if (hw
->soc
->bias_set
) {
247 err
= hw
->soc
->bias_set(hw
, desc
, 0);
254 case PIN_CONFIG_OUTPUT_ENABLE
:
255 err
= mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_SMT
,
260 err
= mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_DIR
,
265 case PIN_CONFIG_INPUT_ENABLE
:
267 if (hw
->soc
->ies_present
) {
268 mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_IES
,
272 err
= mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_DIR
,
277 case PIN_CONFIG_SLEW_RATE
:
278 err
= mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_SR
,
284 case PIN_CONFIG_OUTPUT
:
285 err
= mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_DIR
,
290 err
= mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_DO
,
295 case PIN_CONFIG_INPUT_SCHMITT_ENABLE
:
296 /* arg = 1: Input mode & SMT enable ;
297 * arg = 0: Output mode & SMT disable
300 err
= mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_DIR
,
305 err
= mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_SMT
,
310 case PIN_CONFIG_DRIVE_STRENGTH
:
311 if (hw
->soc
->drive_set
) {
312 err
= hw
->soc
->drive_set(hw
, desc
, arg
);
319 case MTK_PIN_CONFIG_TDSEL
:
320 case MTK_PIN_CONFIG_RDSEL
:
321 reg
= (param
== MTK_PIN_CONFIG_TDSEL
) ?
322 PINCTRL_PIN_REG_TDSEL
: PINCTRL_PIN_REG_RDSEL
;
324 err
= mtk_hw_set_value(hw
, desc
, reg
, arg
);
328 case MTK_PIN_CONFIG_PU_ADV
:
329 case MTK_PIN_CONFIG_PD_ADV
:
330 if (hw
->soc
->adv_pull_set
) {
333 pullup
= param
== MTK_PIN_CONFIG_PU_ADV
;
334 err
= hw
->soc
->adv_pull_set(hw
, desc
, pullup
,
350 static int mtk_pinconf_group_get(struct pinctrl_dev
*pctldev
,
351 unsigned int group
, unsigned long *config
)
353 const unsigned int *pins
;
354 unsigned int i
, npins
, old
= 0;
357 ret
= pinctrl_generic_get_group_pins(pctldev
, group
, &pins
, &npins
);
361 for (i
= 0; i
< npins
; i
++) {
362 if (mtk_pinconf_get(pctldev
, pins
[i
], config
))
365 /* configs do not match between two pins */
366 if (i
&& old
!= *config
)
375 static int mtk_pinconf_group_set(struct pinctrl_dev
*pctldev
,
376 unsigned int group
, unsigned long *configs
,
377 unsigned int num_configs
)
379 const unsigned int *pins
;
380 unsigned int i
, npins
;
383 ret
= pinctrl_generic_get_group_pins(pctldev
, group
, &pins
, &npins
);
387 for (i
= 0; i
< npins
; i
++) {
388 ret
= mtk_pinconf_set(pctldev
, pins
[i
], configs
, num_configs
);
396 static const struct pinctrl_ops mtk_pctlops
= {
397 .get_groups_count
= pinctrl_generic_get_group_count
,
398 .get_group_name
= pinctrl_generic_get_group_name
,
399 .get_group_pins
= pinctrl_generic_get_group_pins
,
400 .dt_node_to_map
= pinconf_generic_dt_node_to_map_all
,
401 .dt_free_map
= pinconf_generic_dt_free_map
,
404 static const struct pinmux_ops mtk_pmxops
= {
405 .get_functions_count
= pinmux_generic_get_function_count
,
406 .get_function_name
= pinmux_generic_get_function_name
,
407 .get_function_groups
= pinmux_generic_get_function_groups
,
408 .set_mux
= mtk_pinmux_set_mux
,
409 .gpio_request_enable
= mtk_pinmux_gpio_request_enable
,
410 .gpio_set_direction
= mtk_pinmux_gpio_set_direction
,
414 static const struct pinconf_ops mtk_confops
= {
416 .pin_config_get
= mtk_pinconf_get
,
417 .pin_config_set
= mtk_pinconf_set
,
418 .pin_config_group_get
= mtk_pinconf_group_get
,
419 .pin_config_group_set
= mtk_pinconf_group_set
,
420 .pin_config_config_dbg_show
= pinconf_generic_dump_config
,
423 static struct pinctrl_desc mtk_desc
= {
424 .name
= PINCTRL_PINCTRL_DEV
,
425 .pctlops
= &mtk_pctlops
,
426 .pmxops
= &mtk_pmxops
,
427 .confops
= &mtk_confops
,
428 .owner
= THIS_MODULE
,
431 static int mtk_gpio_get(struct gpio_chip
*chip
, unsigned int gpio
)
433 struct mtk_pinctrl
*hw
= gpiochip_get_data(chip
);
434 const struct mtk_pin_desc
*desc
;
437 desc
= (const struct mtk_pin_desc
*)&hw
->soc
->pins
[gpio
];
439 err
= mtk_hw_get_value(hw
, desc
, PINCTRL_PIN_REG_DI
, &value
);
446 static void mtk_gpio_set(struct gpio_chip
*chip
, unsigned int gpio
, int value
)
448 struct mtk_pinctrl
*hw
= gpiochip_get_data(chip
);
449 const struct mtk_pin_desc
*desc
;
451 desc
= (const struct mtk_pin_desc
*)&hw
->soc
->pins
[gpio
];
453 mtk_hw_set_value(hw
, desc
, PINCTRL_PIN_REG_DO
, !!value
);
456 static int mtk_gpio_direction_input(struct gpio_chip
*chip
, unsigned int gpio
)
458 return pinctrl_gpio_direction_input(chip
->base
+ gpio
);
461 static int mtk_gpio_direction_output(struct gpio_chip
*chip
, unsigned int gpio
,
464 mtk_gpio_set(chip
, gpio
, value
);
466 return pinctrl_gpio_direction_output(chip
->base
+ gpio
);
469 static int mtk_gpio_to_irq(struct gpio_chip
*chip
, unsigned int offset
)
471 struct mtk_pinctrl
*hw
= gpiochip_get_data(chip
);
472 const struct mtk_pin_desc
*desc
;
477 desc
= (const struct mtk_pin_desc
*)&hw
->soc
->pins
[offset
];
479 if (desc
->eint
.eint_n
== (u16
)EINT_NA
)
482 return mtk_eint_find_irq(hw
->eint
, desc
->eint
.eint_n
);
485 static int mtk_gpio_set_config(struct gpio_chip
*chip
, unsigned int offset
,
486 unsigned long config
)
488 struct mtk_pinctrl
*hw
= gpiochip_get_data(chip
);
489 const struct mtk_pin_desc
*desc
;
492 desc
= (const struct mtk_pin_desc
*)&hw
->soc
->pins
[offset
];
495 pinconf_to_config_param(config
) != PIN_CONFIG_INPUT_DEBOUNCE
||
496 desc
->eint
.eint_n
== (u16
)EINT_NA
)
499 debounce
= pinconf_to_config_argument(config
);
501 return mtk_eint_set_debounce(hw
->eint
, desc
->eint
.eint_n
, debounce
);
504 static int mtk_build_gpiochip(struct mtk_pinctrl
*hw
, struct device_node
*np
)
506 struct gpio_chip
*chip
= &hw
->chip
;
509 chip
->label
= PINCTRL_PINCTRL_DEV
;
510 chip
->parent
= hw
->dev
;
511 chip
->request
= gpiochip_generic_request
;
512 chip
->free
= gpiochip_generic_free
;
513 chip
->direction_input
= mtk_gpio_direction_input
;
514 chip
->direction_output
= mtk_gpio_direction_output
;
515 chip
->get
= mtk_gpio_get
;
516 chip
->set
= mtk_gpio_set
;
517 chip
->to_irq
= mtk_gpio_to_irq
,
518 chip
->set_config
= mtk_gpio_set_config
,
520 chip
->ngpio
= hw
->soc
->npins
;
522 chip
->of_gpio_n_cells
= 2;
524 ret
= gpiochip_add_data(chip
, hw
);
528 /* Just for backward compatible for these old pinctrl nodes without
529 * "gpio-ranges" property. Otherwise, called directly from a
530 * DeviceTree-supported pinctrl driver is DEPRECATED.
531 * Please see Section 2.1 of
532 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
533 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
535 if (!of_find_property(np
, "gpio-ranges", NULL
)) {
536 ret
= gpiochip_add_pin_range(chip
, dev_name(hw
->dev
), 0, 0,
539 gpiochip_remove(chip
);
547 static int mtk_build_groups(struct mtk_pinctrl
*hw
)
551 for (i
= 0; i
< hw
->soc
->ngrps
; i
++) {
552 const struct group_desc
*group
= hw
->soc
->grps
+ i
;
554 err
= pinctrl_generic_add_group(hw
->pctrl
, group
->name
,
555 group
->pins
, group
->num_pins
,
558 dev_err(hw
->dev
, "Failed to register group %s\n",
567 static int mtk_build_functions(struct mtk_pinctrl
*hw
)
571 for (i
= 0; i
< hw
->soc
->nfuncs
; i
++) {
572 const struct function_desc
*func
= hw
->soc
->funcs
+ i
;
574 err
= pinmux_generic_add_function(hw
->pctrl
, func
->name
,
576 func
->num_group_names
,
579 dev_err(hw
->dev
, "Failed to register function %s\n",
588 int mtk_moore_pinctrl_probe(struct platform_device
*pdev
,
589 const struct mtk_pin_soc
*soc
)
591 struct pinctrl_pin_desc
*pins
;
592 struct resource
*res
;
593 struct mtk_pinctrl
*hw
;
596 hw
= devm_kzalloc(&pdev
->dev
, sizeof(*hw
), GFP_KERNEL
);
601 hw
->dev
= &pdev
->dev
;
603 if (!hw
->soc
->nbase_names
) {
605 "SoC should be assigned at least one register base\n");
609 hw
->base
= devm_kmalloc_array(&pdev
->dev
, hw
->soc
->nbase_names
,
610 sizeof(*hw
->base
), GFP_KERNEL
);
614 for (i
= 0; i
< hw
->soc
->nbase_names
; i
++) {
615 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
616 hw
->soc
->base_names
[i
]);
618 dev_err(&pdev
->dev
, "missing IO resource\n");
622 hw
->base
[i
] = devm_ioremap_resource(&pdev
->dev
, res
);
623 if (IS_ERR(hw
->base
[i
]))
624 return PTR_ERR(hw
->base
[i
]);
627 hw
->nbase
= hw
->soc
->nbase_names
;
629 /* Copy from internal struct mtk_pin_desc to register to the core */
630 pins
= devm_kmalloc_array(&pdev
->dev
, hw
->soc
->npins
, sizeof(*pins
),
635 for (i
= 0; i
< hw
->soc
->npins
; i
++) {
636 pins
[i
].number
= hw
->soc
->pins
[i
].number
;
637 pins
[i
].name
= hw
->soc
->pins
[i
].name
;
640 /* Setup pins descriptions per SoC types */
641 mtk_desc
.pins
= (const struct pinctrl_pin_desc
*)pins
;
642 mtk_desc
.npins
= hw
->soc
->npins
;
643 mtk_desc
.num_custom_params
= ARRAY_SIZE(mtk_custom_bindings
);
644 mtk_desc
.custom_params
= mtk_custom_bindings
;
645 #ifdef CONFIG_DEBUG_FS
646 mtk_desc
.custom_conf_items
= mtk_conf_items
;
649 err
= devm_pinctrl_register_and_init(&pdev
->dev
, &mtk_desc
, hw
,
654 /* Setup groups descriptions per SoC types */
655 err
= mtk_build_groups(hw
);
657 dev_err(&pdev
->dev
, "Failed to build groups\n");
661 /* Setup functions descriptions per SoC types */
662 err
= mtk_build_functions(hw
);
664 dev_err(&pdev
->dev
, "Failed to build functions\n");
668 /* For able to make pinctrl_claim_hogs, we must not enable pinctrl
669 * until all groups and functions are being added one.
671 err
= pinctrl_enable(hw
->pctrl
);
675 err
= mtk_build_eint(hw
, pdev
);
678 "Failed to add EINT, but pinctrl still can work\n");
680 /* Build gpiochip should be after pinctrl_enable is done */
681 err
= mtk_build_gpiochip(hw
, pdev
->dev
.of_node
);
683 dev_err(&pdev
->dev
, "Failed to add gpio_chip\n");
687 platform_set_drvdata(pdev
, hw
);