drivers/pinctrl/nomadik/pinctrl-abx500.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) ST-Ericsson SA 2013
   4  *
   5  * Author: Patrice Chotard <patrice.chotard@st.com>
   6  *
   7  * Driver allows to use AxB5xx unused pins to be used as GPIO
   8  */
   9 #include <linux/kernel.h>
  10 #include <linux/types.h>
  11 #include <linux/slab.h>
  12 #include <linux/init.h>
  13 #include <linux/err.h>
  14 #include <linux/of.h>
  15 #include <linux/of_device.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/gpio/driver.h>
  18 #include <linux/irq.h>
  19 #include <linux/irqdomain.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/bitops.h>
  22 #include <linux/mfd/abx500.h>
  23 #include <linux/mfd/abx500/ab8500.h>
  24 #include <linux/pinctrl/pinctrl.h>
  25 #include <linux/pinctrl/consumer.h>
  26 #include <linux/pinctrl/pinmux.h>
  27 #include <linux/pinctrl/pinconf.h>
  28 #include <linux/pinctrl/pinconf-generic.h>
  29 #include <linux/pinctrl/machine.h>
  30
  31 #include "pinctrl-abx500.h"
  32 #include "../core.h"
  33 #include "../pinconf.h"
  34 #include "../pinctrl-utils.h"
  35
  36 /*
  37  * GPIO registers offset
  38  * Bank: 0x10
  39  */
  40 #define AB8500_GPIO_SEL1_REG    0x00
  41 #define AB8500_GPIO_SEL2_REG    0x01
  42 #define AB8500_GPIO_SEL3_REG    0x02
  43 #define AB8500_GPIO_SEL4_REG    0x03
  44 #define AB8500_GPIO_SEL5_REG    0x04
  45 #define AB8500_GPIO_SEL6_REG    0x05
  46
  47 #define AB8500_GPIO_DIR1_REG    0x10
  48 #define AB8500_GPIO_DIR2_REG    0x11
  49 #define AB8500_GPIO_DIR3_REG    0x12
  50 #define AB8500_GPIO_DIR4_REG    0x13
  51 #define AB8500_GPIO_DIR5_REG    0x14
  52 #define AB8500_GPIO_DIR6_REG    0x15
  53
  54 #define AB8500_GPIO_OUT1_REG    0x20
  55 #define AB8500_GPIO_OUT2_REG    0x21
  56 #define AB8500_GPIO_OUT3_REG    0x22
  57 #define AB8500_GPIO_OUT4_REG    0x23
  58 #define AB8500_GPIO_OUT5_REG    0x24
  59 #define AB8500_GPIO_OUT6_REG    0x25
  60
  61 #define AB8500_GPIO_PUD1_REG    0x30
  62 #define AB8500_GPIO_PUD2_REG    0x31
  63 #define AB8500_GPIO_PUD3_REG    0x32
  64 #define AB8500_GPIO_PUD4_REG    0x33
  65 #define AB8500_GPIO_PUD5_REG    0x34
  66 #define AB8500_GPIO_PUD6_REG    0x35
  67
  68 #define AB8500_GPIO_IN1_REG     0x40
  69 #define AB8500_GPIO_IN2_REG     0x41
  70 #define AB8500_GPIO_IN3_REG     0x42
  71 #define AB8500_GPIO_IN4_REG     0x43
  72 #define AB8500_GPIO_IN5_REG     0x44
  73 #define AB8500_GPIO_IN6_REG     0x45
  74 #define AB8500_GPIO_ALTFUN_REG  0x50
  75
  76 #define ABX500_GPIO_INPUT       0
  77 #define ABX500_GPIO_OUTPUT      1
  78
  79 struct abx500_pinctrl {
  80         struct device *dev;
  81         struct pinctrl_dev *pctldev;
  82         struct abx500_pinctrl_soc_data *soc;
  83         struct gpio_chip chip;
  84         struct ab8500 *parent;
  85         struct abx500_gpio_irq_cluster *irq_cluster;
  86         int irq_cluster_size;
  87 };
  88
  89 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
  90                                unsigned offset, bool *bit)
  91 {
  92         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
  93         u8 pos = offset % 8;
  94         u8 val;
  95         int ret;
  96
  97         reg += offset / 8;
  98         ret = abx500_get_register_interruptible(pct->dev,
  99                                                 AB8500_MISC, reg, &val);
 100         if (ret < 0) {
 101                 dev_err(pct->dev,
 102                         "%s read reg =%x, offset=%x failed (%d)\n",
 103                         __func__, reg, offset, ret);
 104                 return ret;
 105         }
 106
 107         *bit = !!(val & BIT(pos));
 108
 109         return 0;
 110 }
 111
 112 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
 113                                 unsigned offset, int val)
 114 {
 115         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 116         u8 pos = offset % 8;
 117         int ret;
 118
 119         reg += offset / 8;
 120         ret = abx500_mask_and_set_register_interruptible(pct->dev,
 121                                 AB8500_MISC, reg, BIT(pos), val << pos);
 122         if (ret < 0)
 123                 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
 124                                 __func__, reg, offset, ret);
 125
 126         return ret;
 127 }
 128
 129 /**
 130  * abx500_gpio_get() - Get the particular GPIO value
 131  * @chip:       Gpio device
 132  * @offset:     GPIO number to read
 133  */
 134 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
 135 {
 136         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 137         bool bit;
 138         bool is_out;
 139         u8 gpio_offset = offset - 1;
 140         int ret;
 141
 142         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 143                         gpio_offset, &is_out);
 144         if (ret < 0)
 145                 goto out;
 146
 147         if (is_out)
 148                 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
 149                                 gpio_offset, &bit);
 150         else
 151                 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
 152                                 gpio_offset, &bit);
 153 out:
 154         if (ret < 0) {
 155                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 156                 return ret;
 157         }
 158
 159         return bit;
 160 }
 161
 162 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
 163 {
 164         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 165         int ret;
 166
 167         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 168         if (ret < 0)
 169                 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
 170 }
 171
 172 static int abx500_gpio_direction_output(struct gpio_chip *chip,
 173                                         unsigned offset,
 174                                         int val)
 175 {
 176         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 177         int ret;
 178
 179         /* set direction as output */
 180         ret = abx500_gpio_set_bits(chip,
 181                                 AB8500_GPIO_DIR1_REG,
 182                                 offset,
 183                                 ABX500_GPIO_OUTPUT);
 184         if (ret < 0)
 185                 goto out;
 186
 187         /* disable pull down */
 188         ret = abx500_gpio_set_bits(chip,
 189                                 AB8500_GPIO_PUD1_REG,
 190                                 offset,
 191                                 ABX500_GPIO_PULL_NONE);
 192
 193 out:
 194         if (ret < 0) {
 195                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 196                 return ret;
 197         }
 198
 199         /* set the output as 1 or 0 */
 200         return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 201 }
 202
 203 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 204 {
 205         /* set the register as input */
 206         return abx500_gpio_set_bits(chip,
 207                                 AB8500_GPIO_DIR1_REG,
 208                                 offset,
 209                                 ABX500_GPIO_INPUT);
 210 }
 211
 212 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
 213 {
 214         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 215         /* The AB8500 GPIO numbers are off by one */
 216         int gpio = offset + 1;
 217         int hwirq;
 218         int i;
 219
 220         for (i = 0; i < pct->irq_cluster_size; i++) {
 221                 struct abx500_gpio_irq_cluster *cluster =
 222                         &pct->irq_cluster[i];
 223
 224                 if (gpio >= cluster->start && gpio <= cluster->end) {
 225                         /*
 226                          * The ABx500 GPIO's associated IRQs are clustered together
 227                          * throughout the interrupt numbers at irregular intervals.
 228                          * To solve this quandry, we have placed the read-in values
 229                          * into the cluster information table.
 230                          */
 231                         hwirq = gpio - cluster->start + cluster->to_irq;
 232                         return irq_create_mapping(pct->parent->domain, hwirq);
 233                 }
 234         }
 235
 236         return -EINVAL;
 237 }
 238
 239 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 240                            unsigned gpio, int alt_setting)
 241 {
 242         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 243         struct alternate_functions af = pct->soc->alternate_functions[gpio];
 244         int ret;
 245         int val;
 246         unsigned offset;
 247
 248         const char *modes[] = {
 249                 [ABX500_DEFAULT]        = "default",
 250                 [ABX500_ALT_A]          = "altA",
 251                 [ABX500_ALT_B]          = "altB",
 252                 [ABX500_ALT_C]          = "altC",
 253         };
 254
 255         /* sanity check */
 256         if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
 257             ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
 258             ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
 259                 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
 260                                 modes[alt_setting]);
 261                 return -EINVAL;
 262         }
 263
 264         /* on ABx5xx, there is no GPIO0, so adjust the offset */
 265         offset = gpio - 1;
 266
 267         switch (alt_setting) {
 268         case ABX500_DEFAULT:
 269                 /*
 270                  * for ABx5xx family, default mode is always selected by
 271                  * writing 0 to GPIOSELx register, except for pins which
 272                  * support at least ALT_B mode, default mode is selected
 273                  * by writing 1 to GPIOSELx register
 274                  */
 275                 val = 0;
 276                 if (af.alt_bit1 != UNUSED)
 277                         val++;
 278
 279                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 280                                            offset, val);
 281                 break;
 282
 283         case ABX500_ALT_A:
 284                 /*
 285                  * for ABx5xx family, alt_a mode is always selected by
 286                  * writing 1 to GPIOSELx register, except for pins which
 287                  * support at least ALT_B mode, alt_a mode is selected
 288                  * by writing 0 to GPIOSELx register and 0 in ALTFUNC
 289                  * register
 290                  */
 291                 if (af.alt_bit1 != UNUSED) {
 292                         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 293                                         offset, 0);
 294                         if (ret < 0)
 295                                 goto out;
 296
 297                         ret = abx500_gpio_set_bits(chip,
 298                                         AB8500_GPIO_ALTFUN_REG,
 299                                         af.alt_bit1,
 300                                         !!(af.alta_val & BIT(0)));
 301                         if (ret < 0)
 302                                 goto out;
 303
 304                         if (af.alt_bit2 != UNUSED)
 305                                 ret = abx500_gpio_set_bits(chip,
 306                                         AB8500_GPIO_ALTFUN_REG,
 307                                         af.alt_bit2,
 308                                         !!(af.alta_val & BIT(1)));
 309                 } else
 310                         ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 311                                         offset, 1);
 312                 break;
 313
 314         case ABX500_ALT_B:
 315                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 316                                 offset, 0);
 317                 if (ret < 0)
 318                         goto out;
 319
 320                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 321                                 af.alt_bit1, !!(af.altb_val & BIT(0)));
 322                 if (ret < 0)
 323                         goto out;
 324
 325                 if (af.alt_bit2 != UNUSED)
 326                         ret = abx500_gpio_set_bits(chip,
 327                                         AB8500_GPIO_ALTFUN_REG,
 328                                         af.alt_bit2,
 329                                         !!(af.altb_val & BIT(1)));
 330                 break;
 331
 332         case ABX500_ALT_C:
 333                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 334                                 offset, 0);
 335                 if (ret < 0)
 336                         goto out;
 337
 338                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 339                                 af.alt_bit2, !!(af.altc_val & BIT(0)));
 340                 if (ret < 0)
 341                         goto out;
 342
 343                 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 344                                 af.alt_bit2, !!(af.altc_val & BIT(1)));
 345                 break;
 346
 347         default:
 348                 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
 349
 350                 return -EINVAL;
 351         }
 352 out:
 353         if (ret < 0)
 354                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 355
 356         return ret;
 357 }
 358
 359 #ifdef CONFIG_DEBUG_FS
 360 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 361                           unsigned gpio)
 362 {
 363         u8 mode;
 364         bool bit_mode;
 365         bool alt_bit1;
 366         bool alt_bit2;
 367         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 368         struct alternate_functions af = pct->soc->alternate_functions[gpio];
 369         /* on ABx5xx, there is no GPIO0, so adjust the offset */
 370         unsigned offset = gpio - 1;
 371         int ret;
 372
 373         /*
 374          * if gpiosel_bit is set to unused,
 375          * it means no GPIO or special case
 376          */
 377         if (af.gpiosel_bit == UNUSED)
 378                 return ABX500_DEFAULT;
 379
 380         /* read GpioSelx register */
 381         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
 382                         af.gpiosel_bit, &bit_mode);
 383         if (ret < 0)
 384                 goto out;
 385
 386         mode = bit_mode;
 387
 388         /* sanity check */
 389         if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
 390             (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
 391                 dev_err(pct->dev,
 392                         "alt_bitX value not in correct range (-1 to 7)\n");
 393                 return -EINVAL;
 394         }
 395
 396         /* if alt_bit2 is used, alt_bit1 must be used too */
 397         if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
 398                 dev_err(pct->dev,
 399                         "if alt_bit2 is used, alt_bit1 can't be unused\n");
 400                 return -EINVAL;
 401         }
 402
 403         /* check if pin use AlternateFunction register */
 404         if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
 405                 return mode;
 406         /*
 407          * if pin GPIOSEL bit is set and pin supports alternate function,
 408          * it means DEFAULT mode
 409          */
 410         if (mode)
 411                 return ABX500_DEFAULT;
 412
 413         /*
 414          * pin use the AlternatFunction register
 415          * read alt_bit1 value
 416          */
 417         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 418                             af.alt_bit1, &alt_bit1);
 419         if (ret < 0)
 420                 goto out;
 421
 422         if (af.alt_bit2 != UNUSED) {
 423                 /* read alt_bit2 value */
 424                 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 425                                 af.alt_bit2,
 426                                 &alt_bit2);
 427                 if (ret < 0)
 428                         goto out;
 429         } else
 430                 alt_bit2 = 0;
 431
 432         mode = (alt_bit2 << 1) + alt_bit1;
 433         if (mode == af.alta_val)
 434                 return ABX500_ALT_A;
 435         else if (mode == af.altb_val)
 436                 return ABX500_ALT_B;
 437         else
 438                 return ABX500_ALT_C;
 439
 440 out:
 441         dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 442         return ret;
 443 }
 444
 445 #include <linux/seq_file.h>
 446
 447 static void abx500_gpio_dbg_show_one(struct seq_file *s,
 448                                      struct pinctrl_dev *pctldev,
 449                                      struct gpio_chip *chip,
 450                                      unsigned offset, unsigned gpio)
 451 {
 452         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 453         const char *label = gpiochip_is_requested(chip, offset - 1);
 454         u8 gpio_offset = offset - 1;
 455         int mode = -1;
 456         bool is_out;
 457         bool pd;
 458         int ret;
 459
 460         const char *modes[] = {
 461                 [ABX500_DEFAULT]        = "default",
 462                 [ABX500_ALT_A]          = "altA",
 463                 [ABX500_ALT_B]          = "altB",
 464                 [ABX500_ALT_C]          = "altC",
 465         };
 466
 467         const char *pull_up_down[] = {
 468                 [ABX500_GPIO_PULL_DOWN]         = "pull down",
 469                 [ABX500_GPIO_PULL_NONE]         = "pull none",
 470                 [ABX500_GPIO_PULL_NONE + 1]     = "pull none",
 471                 [ABX500_GPIO_PULL_UP]           = "pull up",
 472         };
 473
 474         ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 475                         gpio_offset, &is_out);
 476         if (ret < 0)
 477                 goto out;
 478
 479         seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
 480                    gpio, label ?: "(none)",
 481                    is_out ? "out" : "in ");
 482
 483         if (!is_out) {
 484                 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
 485                                 gpio_offset, &pd);
 486                 if (ret < 0)
 487                         goto out;
 488
 489                 seq_printf(s, " %-9s", pull_up_down[pd]);
 490         } else
 491                 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
 492
 493         mode = abx500_get_mode(pctldev, chip, offset);
 494
 495         seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
 496
 497 out:
 498         if (ret < 0)
 499                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 500 }
 501
 502 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 503 {
 504         unsigned i;
 505         unsigned gpio = chip->base;
 506         struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 507         struct pinctrl_dev *pctldev = pct->pctldev;
 508
 509         for (i = 0; i < chip->ngpio; i++, gpio++) {
 510                 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
 511                 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
 512                 seq_putc(s, '\n');
 513         }
 514 }
 515
 516 #else
 517 static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
 518                                             struct pinctrl_dev *pctldev,
 519                                             struct gpio_chip *chip,
 520                                             unsigned offset, unsigned gpio)
 521 {
 522 }
 523 #define abx500_gpio_dbg_show    NULL
 524 #endif
 525
 526 static const struct gpio_chip abx500gpio_chip = {
 527         .label                  = "abx500-gpio",
 528         .owner                  = THIS_MODULE,
 529         .request                = gpiochip_generic_request,
 530         .free                   = gpiochip_generic_free,
 531         .direction_input        = abx500_gpio_direction_input,
 532         .get                    = abx500_gpio_get,
 533         .direction_output       = abx500_gpio_direction_output,
 534         .set                    = abx500_gpio_set,
 535         .to_irq                 = abx500_gpio_to_irq,
 536         .dbg_show               = abx500_gpio_dbg_show,
 537 };
 538
 539 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
 540 {
 541         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 542
 543         return pct->soc->nfunctions;
 544 }
 545
 546 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
 547                                          unsigned function)
 548 {
 549         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 550
 551         return pct->soc->functions[function].name;
 552 }
 553
 554 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
 555                                       unsigned function,
 556                                       const char * const **groups,
 557                                       unsigned * const num_groups)
 558 {
 559         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 560
 561         *groups = pct->soc->functions[function].groups;
 562         *num_groups = pct->soc->functions[function].ngroups;
 563
 564         return 0;
 565 }
 566
 567 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
 568                           unsigned group)
 569 {
 570         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 571         struct gpio_chip *chip = &pct->chip;
 572         const struct abx500_pingroup *g;
 573         int i;
 574         int ret = 0;
 575
 576         g = &pct->soc->groups[group];
 577         if (g->altsetting < 0)
 578                 return -EINVAL;
 579
 580         dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
 581
 582         for (i = 0; i < g->npins; i++) {
 583                 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
 584                         g->pins[i], g->altsetting);
 585
 586                 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
 587         }
 588
 589         if (ret < 0)
 590                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 591
 592         return ret;
 593 }
 594
 595 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
 596                                struct pinctrl_gpio_range *range,
 597                                unsigned offset)
 598 {
 599         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 600         const struct abx500_pinrange *p;
 601         int ret;
 602         int i;
 603
 604         /*
 605          * Different ranges have different ways to enable GPIO function on a
 606          * pin, so refer back to our local range type, where we handily define
 607          * what altfunc enables GPIO for a certain pin.
 608          */
 609         for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
 610                 p = &pct->soc->gpio_ranges[i];
 611                 if ((offset >= p->offset) &&
 612                     (offset < (p->offset + p->npins)))
 613                   break;
 614         }
 615
 616         if (i == pct->soc->gpio_num_ranges) {
 617                 dev_err(pct->dev, "%s failed to locate range\n", __func__);
 618                 return -ENODEV;
 619         }
 620
 621         dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
 622                 p->altfunc, offset);
 623
 624         ret = abx500_set_mode(pct->pctldev, &pct->chip,
 625                               offset, p->altfunc);
 626         if (ret < 0)
 627                 dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
 628
 629         return ret;
 630 }
 631
 632 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
 633                                      struct pinctrl_gpio_range *range,
 634                                      unsigned offset)
 635 {
 636 }
 637
 638 static const struct pinmux_ops abx500_pinmux_ops = {
 639         .get_functions_count = abx500_pmx_get_funcs_cnt,
 640         .get_function_name = abx500_pmx_get_func_name,
 641         .get_function_groups = abx500_pmx_get_func_groups,
 642         .set_mux = abx500_pmx_set,
 643         .gpio_request_enable = abx500_gpio_request_enable,
 644         .gpio_disable_free = abx500_gpio_disable_free,
 645 };
 646
 647 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
 648 {
 649         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 650
 651         return pct->soc->ngroups;
 652 }
 653
 654 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
 655                                          unsigned selector)
 656 {
 657         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 658
 659         return pct->soc->groups[selector].name;
 660 }
 661
 662 static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
 663                                  unsigned selector,
 664                                  const unsigned **pins,
 665                                  unsigned *num_pins)
 666 {
 667         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 668
 669         *pins = pct->soc->groups[selector].pins;
 670         *num_pins = pct->soc->groups[selector].npins;
 671
 672         return 0;
 673 }
 674
 675 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
 676                                 struct seq_file *s, unsigned offset)
 677 {
 678         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 679         struct gpio_chip *chip = &pct->chip;
 680
 681         abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
 682                                  chip->base + offset - 1);
 683 }
 684
 685 static int abx500_dt_add_map_mux(struct pinctrl_map **map,
 686                 unsigned *reserved_maps,
 687                 unsigned *num_maps, const char *group,
 688                 const char *function)
 689 {
 690         if (*num_maps == *reserved_maps)
 691                 return -ENOSPC;
 692
 693         (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
 694         (*map)[*num_maps].data.mux.group = group;
 695         (*map)[*num_maps].data.mux.function = function;
 696         (*num_maps)++;
 697
 698         return 0;
 699 }
 700
 701 static int abx500_dt_add_map_configs(struct pinctrl_map **map,
 702                 unsigned *reserved_maps,
 703                 unsigned *num_maps, const char *group,
 704                 unsigned long *configs, unsigned num_configs)
 705 {
 706         unsigned long *dup_configs;
 707
 708         if (*num_maps == *reserved_maps)
 709                 return -ENOSPC;
 710
 711         dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
 712                               GFP_KERNEL);
 713         if (!dup_configs)
 714                 return -ENOMEM;
 715
 716         (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
 717
 718         (*map)[*num_maps].data.configs.group_or_pin = group;
 719         (*map)[*num_maps].data.configs.configs = dup_configs;
 720         (*map)[*num_maps].data.configs.num_configs = num_configs;
 721         (*num_maps)++;
 722
 723         return 0;
 724 }
 725
 726 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
 727                                         const char *pin_name)
 728 {
 729         int i, pin_number;
 730         struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
 731
 732         if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
 733                 for (i = 0; i < npct->soc->npins; i++)
 734                         if (npct->soc->pins[i].number == pin_number)
 735                                 return npct->soc->pins[i].name;
 736         return NULL;
 737 }
 738
 739 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 740                 struct device_node *np,
 741                 struct pinctrl_map **map,
 742                 unsigned *reserved_maps,
 743                 unsigned *num_maps)
 744 {
 745         int ret;
 746         const char *function = NULL;
 747         unsigned long *configs;
 748         unsigned int nconfigs = 0;
 749         struct property *prop;
 750
 751         ret = of_property_read_string(np, "function", &function);
 752         if (ret >= 0) {
 753                 const char *group;
 754
 755                 ret = of_property_count_strings(np, "groups");
 756                 if (ret < 0)
 757                         goto exit;
 758
 759                 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
 760                                                 num_maps, ret);
 761                 if (ret < 0)
 762                         goto exit;
 763
 764                 of_property_for_each_string(np, "groups", prop, group) {
 765                         ret = abx500_dt_add_map_mux(map, reserved_maps,
 766                                         num_maps, group, function);
 767                         if (ret < 0)
 768                                 goto exit;
 769                 }
 770         }
 771
 772         ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs);
 773         if (nconfigs) {
 774                 const char *gpio_name;
 775                 const char *pin;
 776
 777                 ret = of_property_count_strings(np, "pins");
 778                 if (ret < 0)
 779                         goto exit;
 780
 781                 ret = pinctrl_utils_reserve_map(pctldev, map,
 782                                                 reserved_maps,
 783                                                 num_maps, ret);
 784                 if (ret < 0)
 785                         goto exit;
 786
 787                 of_property_for_each_string(np, "pins", prop, pin) {
 788                         gpio_name = abx500_find_pin_name(pctldev, pin);
 789
 790                         ret = abx500_dt_add_map_configs(map, reserved_maps,
 791                                         num_maps, gpio_name, configs, 1);
 792                         if (ret < 0)
 793                                 goto exit;
 794                 }
 795         }
 796
 797 exit:
 798         return ret;
 799 }
 800
 801 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
 802                                  struct device_node *np_config,
 803                                  struct pinctrl_map **map, unsigned *num_maps)
 804 {
 805         unsigned reserved_maps;
 806         struct device_node *np;
 807         int ret;
 808
 809         reserved_maps = 0;
 810         *map = NULL;
 811         *num_maps = 0;
 812
 813         for_each_child_of_node(np_config, np) {
 814                 ret = abx500_dt_subnode_to_map(pctldev, np, map,
 815                                 &reserved_maps, num_maps);
 816                 if (ret < 0) {
 817                         pinctrl_utils_free_map(pctldev, *map, *num_maps);
 818                         of_node_put(np);
 819                         return ret;
 820                 }
 821         }
 822
 823         return 0;
 824 }
 825
 826 static const struct pinctrl_ops abx500_pinctrl_ops = {
 827         .get_groups_count = abx500_get_groups_cnt,
 828         .get_group_name = abx500_get_group_name,
 829         .get_group_pins = abx500_get_group_pins,
 830         .pin_dbg_show = abx500_pin_dbg_show,
 831         .dt_node_to_map = abx500_dt_node_to_map,
 832         .dt_free_map = pinctrl_utils_free_map,
 833 };
 834
 835 static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
 836                           unsigned pin,
 837                           unsigned long *config)
 838 {
 839         return -ENOSYS;
 840 }
 841
 842 static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
 843                           unsigned pin,
 844                           unsigned long *configs,
 845                           unsigned num_configs)
 846 {
 847         struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 848         struct gpio_chip *chip = &pct->chip;
 849         unsigned offset;
 850         int ret = -EINVAL;
 851         int i;
 852         enum pin_config_param param;
 853         enum pin_config_param argument;
 854
 855         for (i = 0; i < num_configs; i++) {
 856                 param = pinconf_to_config_param(configs[i]);
 857                 argument = pinconf_to_config_argument(configs[i]);
 858
 859                 dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
 860                         pin, configs[i],
 861                         (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
 862                         (param == PIN_CONFIG_OUTPUT) ?
 863                         (argument ? "high" : "low") :
 864                         (argument ? "pull up" : "pull down"));
 865
 866                 /* on ABx500, there is no GPIO0, so adjust the offset */
 867                 offset = pin - 1;
 868
 869                 switch (param) {
 870                 case PIN_CONFIG_BIAS_DISABLE:
 871                         ret = abx500_gpio_direction_input(chip, offset);
 872                         if (ret < 0)
 873                                 goto out;
 874
 875                         /* Chip only supports pull down */
 876                         ret = abx500_gpio_set_bits(chip,
 877                                 AB8500_GPIO_PUD1_REG, offset,
 878                                 ABX500_GPIO_PULL_NONE);
 879                         break;
 880
 881                 case PIN_CONFIG_BIAS_PULL_DOWN:
 882                         ret = abx500_gpio_direction_input(chip, offset);
 883                         if (ret < 0)
 884                                 goto out;
 885                         /*
 886                          * if argument = 1 set the pull down
 887                          * else clear the pull down
 888                          * Chip only supports pull down
 889                          */
 890                         ret = abx500_gpio_set_bits(chip,
 891                         AB8500_GPIO_PUD1_REG,
 892                                 offset,
 893                                 argument ? ABX500_GPIO_PULL_DOWN :
 894                                 ABX500_GPIO_PULL_NONE);
 895                         break;
 896
 897                 case PIN_CONFIG_BIAS_PULL_UP:
 898                         ret = abx500_gpio_direction_input(chip, offset);
 899                         if (ret < 0)
 900                                 goto out;
 901                         /*
 902                          * if argument = 1 set the pull up
 903                          * else clear the pull up
 904                          */
 905                         ret = abx500_gpio_direction_input(chip, offset);
 906                         break;
 907
 908                 case PIN_CONFIG_OUTPUT:
 909                         ret = abx500_gpio_direction_output(chip, offset,
 910                                 argument);
 911                         break;
 912
 913                 default:
 914                         dev_err(chip->parent,
 915                                 "illegal configuration requested\n");
 916                 }
 917         } /* for each config */
 918 out:
 919         if (ret < 0)
 920                 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 921
 922         return ret;
 923 }
 924
 925 static const struct pinconf_ops abx500_pinconf_ops = {
 926         .pin_config_get = abx500_pin_config_get,
 927         .pin_config_set = abx500_pin_config_set,
 928         .is_generic = true,
 929 };
 930
 931 static struct pinctrl_desc abx500_pinctrl_desc = {
 932         .name = "pinctrl-abx500",
 933         .pctlops = &abx500_pinctrl_ops,
 934         .pmxops = &abx500_pinmux_ops,
 935         .confops = &abx500_pinconf_ops,
 936         .owner = THIS_MODULE,
 937 };
 938
 939 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
 940 {
 941         unsigned int lowest = 0;
 942         unsigned int highest = 0;
 943         unsigned int npins = 0;
 944         int i;
 945
 946         /*
 947          * Compute number of GPIOs from the last SoC gpio range descriptors
 948          * These ranges may include "holes" but the GPIO number space shall
 949          * still be homogeneous, so we need to detect and account for any
 950          * such holes so that these are included in the number of GPIO pins.
 951          */
 952         for (i = 0; i < soc->gpio_num_ranges; i++) {
 953                 unsigned gstart;
 954                 unsigned gend;
 955                 const struct abx500_pinrange *p;
 956
 957                 p = &soc->gpio_ranges[i];
 958                 gstart = p->offset;
 959                 gend = p->offset + p->npins - 1;
 960
 961                 if (i == 0) {
 962                         /* First iteration, set start values */
 963                         lowest = gstart;
 964                         highest = gend;
 965                 } else {
 966                         if (gstart < lowest)
 967                                 lowest = gstart;
 968                         if (gend > highest)
 969                                 highest = gend;
 970                 }
 971         }
 972         /* this gives the absolute number of pins */
 973         npins = highest - lowest + 1;
 974         return npins;
 975 }
 976
 977 static const struct of_device_id abx500_gpio_match[] = {
 978         { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
 979         { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
 980         { }
 981 };
 982
 983 static int abx500_gpio_probe(struct platform_device *pdev)
 984 {
 985         struct device_node *np = pdev->dev.of_node;
 986         const struct of_device_id *match;
 987         struct abx500_pinctrl *pct;
 988         unsigned int id = -1;
 989         int ret;
 990         int i;
 991
 992         if (!np) {
 993                 dev_err(&pdev->dev, "gpio dt node missing\n");
 994                 return -ENODEV;
 995         }
 996
 997         pct = devm_kzalloc(&pdev->dev, sizeof(*pct), GFP_KERNEL);
 998         if (!pct)
 999                 return -ENOMEM;
1000
1001         pct->dev = &pdev->dev;
1002         pct->parent = dev_get_drvdata(pdev->dev.parent);
1003         pct->chip = abx500gpio_chip;
1004         pct->chip.parent = &pdev->dev;
1005         pct->chip.base = -1; /* Dynamic allocation */
1006
1007         match = of_match_device(abx500_gpio_match, &pdev->dev);
1008         if (!match) {
1009                 dev_err(&pdev->dev, "gpio dt not matching\n");
1010                 return -ENODEV;
1011         }
1012         id = (unsigned long)match->data;
1013
1014         /* Poke in other ASIC variants here */
1015         switch (id) {
1016         case PINCTRL_AB8500:
1017                 abx500_pinctrl_ab8500_init(&pct->soc);
1018                 break;
1019         case PINCTRL_AB8505:
1020                 abx500_pinctrl_ab8505_init(&pct->soc);
1021                 break;
1022         default:
1023                 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1024                 return -EINVAL;
1025         }
1026
1027         if (!pct->soc) {
1028                 dev_err(&pdev->dev, "Invalid SOC data\n");
1029                 return -EINVAL;
1030         }
1031
1032         pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1033         pct->irq_cluster = pct->soc->gpio_irq_cluster;
1034         pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1035
1036         ret = gpiochip_add_data(&pct->chip, pct);
1037         if (ret) {
1038                 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1039                 return ret;
1040         }
1041         dev_info(&pdev->dev, "added gpiochip\n");
1042
1043         abx500_pinctrl_desc.pins = pct->soc->pins;
1044         abx500_pinctrl_desc.npins = pct->soc->npins;
1045         pct->pctldev = devm_pinctrl_register(&pdev->dev, &abx500_pinctrl_desc,
1046                                              pct);
1047         if (IS_ERR(pct->pctldev)) {
1048                 dev_err(&pdev->dev,
1049                         "could not register abx500 pinctrl driver\n");
1050                 ret = PTR_ERR(pct->pctldev);
1051                 goto out_rem_chip;
1052         }
1053         dev_info(&pdev->dev, "registered pin controller\n");
1054
1055         /* We will handle a range of GPIO pins */
1056         for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1057                 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1058
1059                 ret = gpiochip_add_pin_range(&pct->chip,
1060                                         dev_name(&pdev->dev),
1061                                         p->offset - 1, p->offset, p->npins);
1062                 if (ret < 0)
1063                         goto out_rem_chip;
1064         }
1065
1066         platform_set_drvdata(pdev, pct);
1067         dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1068
1069         return 0;
1070
1071 out_rem_chip:
1072         gpiochip_remove(&pct->chip);
1073         return ret;
1074 }
1075
1076 /**
1077  * abx500_gpio_remove() - remove Ab8500-gpio driver
1078  * @pdev:       Platform device registered
1079  */
1080 static int abx500_gpio_remove(struct platform_device *pdev)
1081 {
1082         struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1083
1084         gpiochip_remove(&pct->chip);
1085         return 0;
1086 }
1087
1088 static struct platform_driver abx500_gpio_driver = {
1089         .driver = {
1090                 .name = "abx500-gpio",
1091                 .of_match_table = abx500_gpio_match,
1092         },
1093         .probe = abx500_gpio_probe,
1094         .remove = abx500_gpio_remove,
1095 };
1096
1097 static int __init abx500_gpio_init(void)
1098 {
1099         return platform_driver_register(&abx500_gpio_driver);
1100 }
1101 core_initcall(abx500_gpio_init);