drivers/pinctrl/nomadik/pinctrl-abx500.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef PINCTRL_PINCTRL_ABx500_H
   3 #define PINCTRL_PINCTRL_ABx500_H
   4
   5 /* Package definitions */
   6 #define PINCTRL_AB8500  0
   7 #define PINCTRL_AB8505  1
   8
   9 /* pins alternate function */
  10 enum abx500_pin_func {
  11         ABX500_DEFAULT,
  12         ABX500_ALT_A,
  13         ABX500_ALT_B,
  14         ABX500_ALT_C,
  15 };
  16
  17 enum abx500_gpio_pull_updown {
  18         ABX500_GPIO_PULL_DOWN = 0x0,
  19         ABX500_GPIO_PULL_NONE = 0x1,
  20         ABX500_GPIO_PULL_UP = 0x3,
  21 };
  22
  23 enum abx500_gpio_vinsel {
  24         ABX500_GPIO_VINSEL_VBAT = 0x0,
  25         ABX500_GPIO_VINSEL_VIN_1V8 = 0x1,
  26         ABX500_GPIO_VINSEL_VDD_BIF = 0x2,
  27 };
  28
  29 /**
  30  * struct abx500_function - ABx500 pinctrl mux function
  31  * @name: The name of the function, exported to pinctrl core.
  32  * @groups: An array of pin groups that may select this function.
  33  * @ngroups: The number of entries in @groups.
  34  */
  35 struct abx500_function {
  36         const char *name;
  37         const char * const *groups;
  38         unsigned ngroups;
  39 };
  40
  41 /**
  42  * struct abx500_pingroup - describes a ABx500 pin group
  43  * @name: the name of this specific pin group
  44  * @pins: an array of discrete physical pins used in this group, taken
  45  *      from the driver-local pin enumeration space
  46  * @num_pins: the number of pins in this group array, i.e. the number of
  47  *      elements in .pins so we can iterate over that array
  48  * @altsetting: the altsetting to apply to all pins in this group to
  49  *      configure them to be used by a function
  50  */
  51 struct abx500_pingroup {
  52         const char *name;
  53         const unsigned int *pins;
  54         const unsigned npins;
  55         int altsetting;
  56 };
  57
  58 #define ALTERNATE_FUNCTIONS(pin, sel_bit, alt1, alt2, alta, altb, altc) \
  59 {                                                                       \
  60         .pin_number = pin,                                              \
  61         .gpiosel_bit = sel_bit,                                         \
  62         .alt_bit1 = alt1,                                               \
  63         .alt_bit2 = alt2,                                               \
  64         .alta_val = alta,                                               \
  65         .altb_val = altb,                                               \
  66         .altc_val = altc,                                               \
  67 }
  68
  69 #define UNUSED -1
  70 /**
  71  * struct alternate_functions
  72  * @pin_number:         The pin number
  73  * @gpiosel_bit:        Control bit in GPIOSEL register,
  74  * @alt_bit1:           First AlternateFunction bit used to select the
  75  *                      alternate function
  76  * @alt_bit2:           Second AlternateFunction bit used to select the
  77  *                      alternate function
  78  *
  79  *                      these 3 following fields are necessary due to none
  80  *                      coherency on how to select the altA, altB and altC
  81  *                      function between the ABx500 SOC family when using
  82  *                      alternatfunc register.
  83  * @alta_val:           value to write in alternatfunc to select altA function
  84  * @altb_val:           value to write in alternatfunc to select altB function
  85  * @altc_val:           value to write in alternatfunc to select altC function
  86  */
  87 struct alternate_functions {
  88         unsigned pin_number;
  89         s8 gpiosel_bit;
  90         s8 alt_bit1;
  91         s8 alt_bit2;
  92         u8 alta_val;
  93         u8 altb_val;
  94         u8 altc_val;
  95 };
  96
  97 #define GPIO_IRQ_CLUSTER(a, b, c)       \
  98 {                                       \
  99         .start = a,                     \
 100         .end = b,                       \
 101         .to_irq = c,                    \
 102 }
 103
 104 /**
 105  * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
 106  *                      capable
 107  * @start:              The pin number of the first pin interrupt capable
 108  * @end:                The pin number of the last pin interrupt capable
 109  * @to_irq:             The ABx500 GPIO's associated IRQs are clustered
 110  *                      together throughout the interrupt numbers at irregular
 111  *                      intervals. To solve this quandary, we will place the
 112  *                      read-in values into the cluster information table
 113  */
 114
 115 struct abx500_gpio_irq_cluster {
 116         int start;
 117         int end;
 118         int to_irq;
 119 };
 120
 121 /**
 122  * struct abx500_pinrange - map pin numbers to GPIO offsets
 123  * @offset:             offset into the GPIO local numberspace, incidentally
 124  *                      identical to the offset into the local pin numberspace
 125  * @npins:              number of pins to map from both offsets
 126  * @altfunc:            altfunc setting to be used to enable GPIO on a pin in
 127  *                      this range (may vary)
 128  */
 129 struct abx500_pinrange {
 130         unsigned int offset;
 131         unsigned int npins;
 132         int altfunc;
 133 };
 134
 135 #define ABX500_PINRANGE(a, b, c) { .offset = a, .npins = b, .altfunc = c }
 136
 137 /**
 138  * struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration
 139  * @gpio_ranges:        An array of GPIO ranges for this SoC
 140  * @gpio_num_ranges:    The number of GPIO ranges for this SoC
 141  * @pins:               An array describing all pins the pin controller affects.
 142  *                      All pins which are also GPIOs must be listed first within the
 143  *                      array, and be numbered identically to the GPIO controller's
 144  *                      numbering.
 145  * @npins:              The number of entries in @pins.
 146  * @functions:          The functions supported on this SoC.
 147  * @nfunction:          The number of entries in @functions.
 148  * @groups:             An array describing all pin groups the pin SoC supports.
 149  * @ngroups:            The number of entries in @groups.
 150  * @alternate_functions: array describing pins which supports alternate and
 151  *                      how to set it.
 152  * @gpio_irq_cluster:   An array of GPIO interrupt capable for this SoC
 153  * @ngpio_irq_cluster:  The number of GPIO inetrrupt capable for this SoC
 154  * @irq_gpio_rising_offset: Interrupt offset used as base to compute specific
 155  *                      setting strategy of the rising interrupt line
 156  * @irq_gpio_falling_offset: Interrupt offset used as base to compute specific
 157  *                      setting strategy of the falling interrupt line
 158  * @irq_gpio_factor:    Factor used to compute specific setting strategy of
 159  *                      the interrupt line
 160  */
 161
 162 struct abx500_pinctrl_soc_data {
 163         const struct abx500_pinrange *gpio_ranges;
 164         unsigned gpio_num_ranges;
 165         const struct pinctrl_pin_desc *pins;
 166         unsigned npins;
 167         const struct abx500_function *functions;
 168         unsigned nfunctions;
 169         const struct abx500_pingroup *groups;
 170         unsigned ngroups;
 171         struct alternate_functions *alternate_functions;
 172         struct abx500_gpio_irq_cluster *gpio_irq_cluster;
 173         unsigned ngpio_irq_cluster;
 174         int irq_gpio_rising_offset;
 175         int irq_gpio_falling_offset;
 176         int irq_gpio_factor;
 177 };
 178
 179 #ifdef CONFIG_PINCTRL_AB8500
 180
 181 void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc);
 182
 183 #else
 184
 185 static inline void
 186 abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc)
 187 {
 188 }
 189
 190 #endif
 191
 192 #ifdef CONFIG_PINCTRL_AB8505
 193
 194 void abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc);
 195
 196 #else
 197
 198 static inline void
 199 abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc)
 200 {
 201 }
 202
 203 #endif
 204
 205 #endif /* PINCTRL_PINCTRL_ABx500_H */