1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2014 MediaTek Inc.
4 // Author: Flora Fu <flora.fu@mediatek.com>
6 #include <linux/module.h>
8 #include <linux/platform_device.h>
9 #include <linux/regmap.h>
10 #include <linux/mfd/mt6397/core.h>
11 #include <linux/mfd/mt6397/registers.h>
12 #include <linux/regulator/driver.h>
13 #include <linux/regulator/machine.h>
14 #include <linux/regulator/mt6397-regulator.h>
15 #include <linux/regulator/of_regulator.h>
17 #define MT6397_BUCK_MODE_AUTO 0
18 #define MT6397_BUCK_MODE_FORCE_PWM 1
21 * MT6397 regulators' information
23 * @desc: standard fields of regulator description.
24 * @qi: Mask for query enable signal status of regulators
25 * @vselon_reg: Register sections for hardware control mode of bucks
26 * @vselctrl_reg: Register for controlling the buck control mode.
27 * @vselctrl_mask: Mask for query buck's voltage control mode.
29 struct mt6397_regulator_info
{
30 struct regulator_desc desc
;
40 #define MT6397_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \
41 vosel, vosel_mask, voselon, vosel_ctrl, _modeset_reg, \
43 [MT6397_ID_##vreg] = { \
46 .of_match = of_match_ptr(match), \
47 .ops = &mt6397_volt_range_ops, \
48 .type = REGULATOR_VOLTAGE, \
49 .id = MT6397_ID_##vreg, \
50 .owner = THIS_MODULE, \
51 .n_voltages = (max - min)/step + 1, \
52 .linear_ranges = volt_ranges, \
53 .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
55 .vsel_mask = vosel_mask, \
56 .enable_reg = enreg, \
57 .enable_mask = BIT(0), \
60 .vselon_reg = voselon, \
61 .vselctrl_reg = vosel_ctrl, \
62 .vselctrl_mask = BIT(1), \
63 .modeset_reg = _modeset_reg, \
64 .modeset_mask = BIT(_modeset_shift), \
65 .modeset_shift = _modeset_shift \
68 #define MT6397_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
70 [MT6397_ID_##vreg] = { \
73 .of_match = of_match_ptr(match), \
74 .ops = &mt6397_volt_table_ops, \
75 .type = REGULATOR_VOLTAGE, \
76 .id = MT6397_ID_##vreg, \
77 .owner = THIS_MODULE, \
78 .n_voltages = ARRAY_SIZE(ldo_volt_table), \
79 .volt_table = ldo_volt_table, \
81 .vsel_mask = vosel_mask, \
82 .enable_reg = enreg, \
83 .enable_mask = BIT(enbit), \
88 #define MT6397_REG_FIXED(match, vreg, enreg, enbit, volt) \
89 [MT6397_ID_##vreg] = { \
92 .of_match = of_match_ptr(match), \
93 .ops = &mt6397_volt_fixed_ops, \
94 .type = REGULATOR_VOLTAGE, \
95 .id = MT6397_ID_##vreg, \
96 .owner = THIS_MODULE, \
98 .enable_reg = enreg, \
99 .enable_mask = BIT(enbit), \
105 static const struct regulator_linear_range buck_volt_range1
[] = {
106 REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
109 static const struct regulator_linear_range buck_volt_range2
[] = {
110 REGULATOR_LINEAR_RANGE(800000, 0, 0x7f, 6250),
113 static const struct regulator_linear_range buck_volt_range3
[] = {
114 REGULATOR_LINEAR_RANGE(1500000, 0, 0x1f, 20000),
117 static const unsigned int ldo_volt_table1
[] = {
118 1500000, 1800000, 2500000, 2800000,
121 static const unsigned int ldo_volt_table2
[] = {
125 static const unsigned int ldo_volt_table3
[] = {
129 static const unsigned int ldo_volt_table4
[] = {
130 1220000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
133 static const unsigned int ldo_volt_table5
[] = {
134 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
137 static const unsigned int ldo_volt_table5_v2
[] = {
138 1200000, 1000000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
141 static const unsigned int ldo_volt_table6
[] = {
142 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000,
145 static const unsigned int ldo_volt_table7
[] = {
146 1300000, 1500000, 1800000, 2000000, 2500000, 2800000, 3000000, 3300000,
149 static int mt6397_regulator_set_mode(struct regulator_dev
*rdev
,
152 struct mt6397_regulator_info
*info
= rdev_get_drvdata(rdev
);
156 case REGULATOR_MODE_FAST
:
157 val
= MT6397_BUCK_MODE_FORCE_PWM
;
159 case REGULATOR_MODE_NORMAL
:
160 val
= MT6397_BUCK_MODE_AUTO
;
167 dev_dbg(&rdev
->dev
, "mt6397 buck set_mode %#x, %#x, %#x, %#x\n",
168 info
->modeset_reg
, info
->modeset_mask
,
169 info
->modeset_shift
, val
);
171 val
<<= info
->modeset_shift
;
172 ret
= regmap_update_bits(rdev
->regmap
, info
->modeset_reg
,
173 info
->modeset_mask
, val
);
177 "Failed to set mt6397 buck mode: %d\n", ret
);
184 static unsigned int mt6397_regulator_get_mode(struct regulator_dev
*rdev
)
186 struct mt6397_regulator_info
*info
= rdev_get_drvdata(rdev
);
189 ret
= regmap_read(rdev
->regmap
, info
->modeset_reg
, ®val
);
192 "Failed to get mt6397 buck mode: %d\n", ret
);
196 switch ((regval
& info
->modeset_mask
) >> info
->modeset_shift
) {
197 case MT6397_BUCK_MODE_AUTO
:
198 return REGULATOR_MODE_NORMAL
;
199 case MT6397_BUCK_MODE_FORCE_PWM
:
200 return REGULATOR_MODE_FAST
;
206 static int mt6397_get_status(struct regulator_dev
*rdev
)
210 struct mt6397_regulator_info
*info
= rdev_get_drvdata(rdev
);
212 ret
= regmap_read(rdev
->regmap
, info
->desc
.enable_reg
, ®val
);
214 dev_err(&rdev
->dev
, "Failed to get enable reg: %d\n", ret
);
218 return (regval
& info
->qi
) ? REGULATOR_STATUS_ON
: REGULATOR_STATUS_OFF
;
221 static const struct regulator_ops mt6397_volt_range_ops
= {
222 .list_voltage
= regulator_list_voltage_linear_range
,
223 .map_voltage
= regulator_map_voltage_linear_range
,
224 .set_voltage_sel
= regulator_set_voltage_sel_regmap
,
225 .get_voltage_sel
= regulator_get_voltage_sel_regmap
,
226 .set_voltage_time_sel
= regulator_set_voltage_time_sel
,
227 .enable
= regulator_enable_regmap
,
228 .disable
= regulator_disable_regmap
,
229 .is_enabled
= regulator_is_enabled_regmap
,
230 .get_status
= mt6397_get_status
,
231 .set_mode
= mt6397_regulator_set_mode
,
232 .get_mode
= mt6397_regulator_get_mode
,
235 static const struct regulator_ops mt6397_volt_table_ops
= {
236 .list_voltage
= regulator_list_voltage_table
,
237 .map_voltage
= regulator_map_voltage_iterate
,
238 .set_voltage_sel
= regulator_set_voltage_sel_regmap
,
239 .get_voltage_sel
= regulator_get_voltage_sel_regmap
,
240 .set_voltage_time_sel
= regulator_set_voltage_time_sel
,
241 .enable
= regulator_enable_regmap
,
242 .disable
= regulator_disable_regmap
,
243 .is_enabled
= regulator_is_enabled_regmap
,
244 .get_status
= mt6397_get_status
,
247 static const struct regulator_ops mt6397_volt_fixed_ops
= {
248 .list_voltage
= regulator_list_voltage_linear
,
249 .enable
= regulator_enable_regmap
,
250 .disable
= regulator_disable_regmap
,
251 .is_enabled
= regulator_is_enabled_regmap
,
252 .get_status
= mt6397_get_status
,
255 /* The array is indexed by id(MT6397_ID_XXX) */
256 static struct mt6397_regulator_info mt6397_regulators
[] = {
257 MT6397_BUCK("buck_vpca15", VPCA15
, 700000, 1493750, 6250,
258 buck_volt_range1
, MT6397_VCA15_CON7
, MT6397_VCA15_CON9
, 0x7f,
259 MT6397_VCA15_CON10
, MT6397_VCA15_CON5
, MT6397_VCA15_CON2
, 11),
260 MT6397_BUCK("buck_vpca7", VPCA7
, 700000, 1493750, 6250,
261 buck_volt_range1
, MT6397_VPCA7_CON7
, MT6397_VPCA7_CON9
, 0x7f,
262 MT6397_VPCA7_CON10
, MT6397_VPCA7_CON5
, MT6397_VPCA7_CON2
, 8),
263 MT6397_BUCK("buck_vsramca15", VSRAMCA15
, 700000, 1493750, 6250,
264 buck_volt_range1
, MT6397_VSRMCA15_CON7
, MT6397_VSRMCA15_CON9
,
265 0x7f, MT6397_VSRMCA15_CON10
, MT6397_VSRMCA15_CON5
,
266 MT6397_VSRMCA15_CON2
, 8),
267 MT6397_BUCK("buck_vsramca7", VSRAMCA7
, 700000, 1493750, 6250,
268 buck_volt_range1
, MT6397_VSRMCA7_CON7
, MT6397_VSRMCA7_CON9
,
269 0x7f, MT6397_VSRMCA7_CON10
, MT6397_VSRMCA7_CON5
,
270 MT6397_VSRMCA7_CON2
, 8),
271 MT6397_BUCK("buck_vcore", VCORE
, 700000, 1493750, 6250,
272 buck_volt_range1
, MT6397_VCORE_CON7
, MT6397_VCORE_CON9
, 0x7f,
273 MT6397_VCORE_CON10
, MT6397_VCORE_CON5
, MT6397_VCORE_CON2
, 8),
274 MT6397_BUCK("buck_vgpu", VGPU
, 700000, 1493750, 6250, buck_volt_range1
,
275 MT6397_VGPU_CON7
, MT6397_VGPU_CON9
, 0x7f,
276 MT6397_VGPU_CON10
, MT6397_VGPU_CON5
, MT6397_VGPU_CON2
, 8),
277 MT6397_BUCK("buck_vdrm", VDRM
, 800000, 1593750, 6250, buck_volt_range2
,
278 MT6397_VDRM_CON7
, MT6397_VDRM_CON9
, 0x7f,
279 MT6397_VDRM_CON10
, MT6397_VDRM_CON5
, MT6397_VDRM_CON2
, 8),
280 MT6397_BUCK("buck_vio18", VIO18
, 1500000, 2120000, 20000,
281 buck_volt_range3
, MT6397_VIO18_CON7
, MT6397_VIO18_CON9
, 0x1f,
282 MT6397_VIO18_CON10
, MT6397_VIO18_CON5
, MT6397_VIO18_CON2
, 8),
283 MT6397_REG_FIXED("ldo_vtcxo", VTCXO
, MT6397_ANALDO_CON0
, 10, 2800000),
284 MT6397_REG_FIXED("ldo_va28", VA28
, MT6397_ANALDO_CON1
, 14, 2800000),
285 MT6397_LDO("ldo_vcama", VCAMA
, ldo_volt_table1
,
286 MT6397_ANALDO_CON2
, 15, MT6397_ANALDO_CON6
, 0xC0),
287 MT6397_REG_FIXED("ldo_vio28", VIO28
, MT6397_DIGLDO_CON0
, 14, 2800000),
288 MT6397_REG_FIXED("ldo_vusb", VUSB
, MT6397_DIGLDO_CON1
, 14, 3300000),
289 MT6397_LDO("ldo_vmc", VMC
, ldo_volt_table2
,
290 MT6397_DIGLDO_CON2
, 12, MT6397_DIGLDO_CON29
, 0x10),
291 MT6397_LDO("ldo_vmch", VMCH
, ldo_volt_table3
,
292 MT6397_DIGLDO_CON3
, 14, MT6397_DIGLDO_CON17
, 0x80),
293 MT6397_LDO("ldo_vemc3v3", VEMC3V3
, ldo_volt_table3
,
294 MT6397_DIGLDO_CON4
, 14, MT6397_DIGLDO_CON18
, 0x10),
295 MT6397_LDO("ldo_vgp1", VGP1
, ldo_volt_table4
,
296 MT6397_DIGLDO_CON5
, 15, MT6397_DIGLDO_CON19
, 0xE0),
297 MT6397_LDO("ldo_vgp2", VGP2
, ldo_volt_table5
,
298 MT6397_DIGLDO_CON6
, 15, MT6397_DIGLDO_CON20
, 0xE0),
299 MT6397_LDO("ldo_vgp3", VGP3
, ldo_volt_table5
,
300 MT6397_DIGLDO_CON7
, 15, MT6397_DIGLDO_CON21
, 0xE0),
301 MT6397_LDO("ldo_vgp4", VGP4
, ldo_volt_table5
,
302 MT6397_DIGLDO_CON8
, 15, MT6397_DIGLDO_CON22
, 0xE0),
303 MT6397_LDO("ldo_vgp5", VGP5
, ldo_volt_table6
,
304 MT6397_DIGLDO_CON9
, 15, MT6397_DIGLDO_CON23
, 0xE0),
305 MT6397_LDO("ldo_vgp6", VGP6
, ldo_volt_table5
,
306 MT6397_DIGLDO_CON10
, 15, MT6397_DIGLDO_CON33
, 0xE0),
307 MT6397_LDO("ldo_vibr", VIBR
, ldo_volt_table7
,
308 MT6397_DIGLDO_CON24
, 15, MT6397_DIGLDO_CON25
, 0xE00),
311 static int mt6397_set_buck_vosel_reg(struct platform_device
*pdev
)
313 struct mt6397_chip
*mt6397
= dev_get_drvdata(pdev
->dev
.parent
);
317 for (i
= 0; i
< MT6397_MAX_REGULATOR
; i
++) {
318 if (mt6397_regulators
[i
].vselctrl_reg
) {
319 if (regmap_read(mt6397
->regmap
,
320 mt6397_regulators
[i
].vselctrl_reg
,
323 "Failed to read buck ctrl\n");
327 if (regval
& mt6397_regulators
[i
].vselctrl_mask
) {
328 mt6397_regulators
[i
].desc
.vsel_reg
=
329 mt6397_regulators
[i
].vselon_reg
;
337 static int mt6397_regulator_probe(struct platform_device
*pdev
)
339 struct mt6397_chip
*mt6397
= dev_get_drvdata(pdev
->dev
.parent
);
340 struct regulator_config config
= {};
341 struct regulator_dev
*rdev
;
343 u32 reg_value
, version
;
345 /* Query buck controller to select activated voltage register part */
346 if (mt6397_set_buck_vosel_reg(pdev
))
349 /* Read PMIC chip revision to update constraints and voltage table */
350 if (regmap_read(mt6397
->regmap
, MT6397_CID
, ®_value
) < 0) {
351 dev_err(&pdev
->dev
, "Failed to read Chip ID\n");
354 dev_info(&pdev
->dev
, "Chip ID = 0x%x\n", reg_value
);
356 version
= (reg_value
& 0xFF);
358 case MT6397_REGULATOR_ID91
:
359 mt6397_regulators
[MT6397_ID_VGP2
].desc
.volt_table
=
366 for (i
= 0; i
< MT6397_MAX_REGULATOR
; i
++) {
367 config
.dev
= &pdev
->dev
;
368 config
.driver_data
= &mt6397_regulators
[i
];
369 config
.regmap
= mt6397
->regmap
;
370 rdev
= devm_regulator_register(&pdev
->dev
,
371 &mt6397_regulators
[i
].desc
, &config
);
373 dev_err(&pdev
->dev
, "failed to register %s\n",
374 mt6397_regulators
[i
].desc
.name
);
375 return PTR_ERR(rdev
);
382 static const struct platform_device_id mt6397_platform_ids
[] = {
383 {"mt6397-regulator", 0},
386 MODULE_DEVICE_TABLE(platform
, mt6397_platform_ids
);
388 static const struct of_device_id mt6397_of_match
[] = {
389 { .compatible
= "mediatek,mt6397-regulator", },
392 MODULE_DEVICE_TABLE(of
, mt6397_of_match
);
394 static struct platform_driver mt6397_regulator_driver
= {
396 .name
= "mt6397-regulator",
397 .of_match_table
= of_match_ptr(mt6397_of_match
),
399 .probe
= mt6397_regulator_probe
,
400 .id_table
= mt6397_platform_ids
,
403 module_platform_driver(mt6397_regulator_driver
);
405 MODULE_AUTHOR("Flora Fu <flora.fu@mediatek.com>");
406 MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6397 PMIC");
407 MODULE_LICENSE("GPL");