1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015 MediaTek Inc.
4 * Author: Tianping.Fang <tianping.fang@mediatek.com>
8 #include <linux/interrupt.h>
9 #include <linux/mfd/mt6397/core.h>
10 #include <linux/module.h>
11 #include <linux/mutex.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
14 #include <linux/rtc.h>
15 #include <linux/mfd/mt6397/rtc.h>
16 #include <linux/mod_devicetable.h>
18 static int mtk_rtc_write_trigger(struct mt6397_rtc
*rtc
)
23 ret
= regmap_write(rtc
->regmap
, rtc
->addr_base
+ RTC_WRTGR
, 1);
27 ret
= regmap_read_poll_timeout(rtc
->regmap
,
28 rtc
->addr_base
+ RTC_BBPU
, data
,
29 !(data
& RTC_BBPU_CBUSY
),
30 MTK_RTC_POLL_DELAY_US
,
31 MTK_RTC_POLL_TIMEOUT
);
33 dev_err(rtc
->dev
, "failed to write WRTGE: %d\n", ret
);
38 static irqreturn_t
mtk_rtc_irq_handler_thread(int irq
, void *data
)
40 struct mt6397_rtc
*rtc
= data
;
44 ret
= regmap_read(rtc
->regmap
, rtc
->addr_base
+ RTC_IRQ_STA
, &irqsta
);
45 if ((ret
>= 0) && (irqsta
& RTC_IRQ_STA_AL
)) {
46 rtc_update_irq(rtc
->rtc_dev
, 1, RTC_IRQF
| RTC_AF
);
47 irqen
= irqsta
& ~RTC_IRQ_EN_AL
;
48 mutex_lock(&rtc
->lock
);
49 if (regmap_write(rtc
->regmap
, rtc
->addr_base
+ RTC_IRQ_EN
,
51 mtk_rtc_write_trigger(rtc
);
52 mutex_unlock(&rtc
->lock
);
60 static int __mtk_rtc_read_time(struct mt6397_rtc
*rtc
,
61 struct rtc_time
*tm
, int *sec
)
64 u16 data
[RTC_OFFSET_COUNT
];
66 mutex_lock(&rtc
->lock
);
67 ret
= regmap_bulk_read(rtc
->regmap
, rtc
->addr_base
+ RTC_TC_SEC
,
68 data
, RTC_OFFSET_COUNT
);
72 tm
->tm_sec
= data
[RTC_OFFSET_SEC
];
73 tm
->tm_min
= data
[RTC_OFFSET_MIN
];
74 tm
->tm_hour
= data
[RTC_OFFSET_HOUR
];
75 tm
->tm_mday
= data
[RTC_OFFSET_DOM
];
76 tm
->tm_mon
= data
[RTC_OFFSET_MTH
];
77 tm
->tm_year
= data
[RTC_OFFSET_YEAR
];
79 ret
= regmap_read(rtc
->regmap
, rtc
->addr_base
+ RTC_TC_SEC
, sec
);
81 mutex_unlock(&rtc
->lock
);
85 static int mtk_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
88 struct mt6397_rtc
*rtc
= dev_get_drvdata(dev
);
92 ret
= __mtk_rtc_read_time(rtc
, tm
, &sec
);
95 } while (sec
< tm
->tm_sec
);
97 /* HW register use 7 bits to store year data, minus
98 * RTC_MIN_YEAR_OFFSET before write year data to register, and plus
99 * RTC_MIN_YEAR_OFFSET back after read year from register
101 tm
->tm_year
+= RTC_MIN_YEAR_OFFSET
;
103 /* HW register start mon from one, but tm_mon start from zero. */
105 time
= rtc_tm_to_time64(tm
);
107 /* rtc_tm_to_time64 covert Gregorian date to seconds since
108 * 01-01-1970 00:00:00, and this date is Thursday.
110 days
= div_s64(time
, 86400);
111 tm
->tm_wday
= (days
+ 4) % 7;
117 static int mtk_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
119 struct mt6397_rtc
*rtc
= dev_get_drvdata(dev
);
121 u16 data
[RTC_OFFSET_COUNT
];
123 tm
->tm_year
-= RTC_MIN_YEAR_OFFSET
;
126 data
[RTC_OFFSET_SEC
] = tm
->tm_sec
;
127 data
[RTC_OFFSET_MIN
] = tm
->tm_min
;
128 data
[RTC_OFFSET_HOUR
] = tm
->tm_hour
;
129 data
[RTC_OFFSET_DOM
] = tm
->tm_mday
;
130 data
[RTC_OFFSET_MTH
] = tm
->tm_mon
;
131 data
[RTC_OFFSET_YEAR
] = tm
->tm_year
;
133 mutex_lock(&rtc
->lock
);
134 ret
= regmap_bulk_write(rtc
->regmap
, rtc
->addr_base
+ RTC_TC_SEC
,
135 data
, RTC_OFFSET_COUNT
);
139 /* Time register write to hardware after call trigger function */
140 ret
= mtk_rtc_write_trigger(rtc
);
143 mutex_unlock(&rtc
->lock
);
147 static int mtk_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
149 struct rtc_time
*tm
= &alm
->time
;
150 struct mt6397_rtc
*rtc
= dev_get_drvdata(dev
);
153 u16 data
[RTC_OFFSET_COUNT
];
155 mutex_lock(&rtc
->lock
);
156 ret
= regmap_read(rtc
->regmap
, rtc
->addr_base
+ RTC_IRQ_EN
, &irqen
);
159 ret
= regmap_read(rtc
->regmap
, rtc
->addr_base
+ RTC_PDN2
, &pdn2
);
163 ret
= regmap_bulk_read(rtc
->regmap
, rtc
->addr_base
+ RTC_AL_SEC
,
164 data
, RTC_OFFSET_COUNT
);
168 alm
->enabled
= !!(irqen
& RTC_IRQ_EN_AL
);
169 alm
->pending
= !!(pdn2
& RTC_PDN2_PWRON_ALARM
);
170 mutex_unlock(&rtc
->lock
);
172 tm
->tm_sec
= data
[RTC_OFFSET_SEC
] & RTC_AL_SEC_MASK
;
173 tm
->tm_min
= data
[RTC_OFFSET_MIN
] & RTC_AL_MIN_MASK
;
174 tm
->tm_hour
= data
[RTC_OFFSET_HOUR
] & RTC_AL_HOU_MASK
;
175 tm
->tm_mday
= data
[RTC_OFFSET_DOM
] & RTC_AL_DOM_MASK
;
176 tm
->tm_mon
= data
[RTC_OFFSET_MTH
] & RTC_AL_MTH_MASK
;
177 tm
->tm_year
= data
[RTC_OFFSET_YEAR
] & RTC_AL_YEA_MASK
;
179 tm
->tm_year
+= RTC_MIN_YEAR_OFFSET
;
184 mutex_unlock(&rtc
->lock
);
188 static int mtk_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
190 struct rtc_time
*tm
= &alm
->time
;
191 struct mt6397_rtc
*rtc
= dev_get_drvdata(dev
);
193 u16 data
[RTC_OFFSET_COUNT
];
195 tm
->tm_year
-= RTC_MIN_YEAR_OFFSET
;
198 mutex_lock(&rtc
->lock
);
199 ret
= regmap_bulk_read(rtc
->regmap
, rtc
->addr_base
+ RTC_AL_SEC
,
200 data
, RTC_OFFSET_COUNT
);
204 data
[RTC_OFFSET_SEC
] = ((data
[RTC_OFFSET_SEC
] & ~(RTC_AL_SEC_MASK
)) |
205 (tm
->tm_sec
& RTC_AL_SEC_MASK
));
206 data
[RTC_OFFSET_MIN
] = ((data
[RTC_OFFSET_MIN
] & ~(RTC_AL_MIN_MASK
)) |
207 (tm
->tm_min
& RTC_AL_MIN_MASK
));
208 data
[RTC_OFFSET_HOUR
] = ((data
[RTC_OFFSET_HOUR
] & ~(RTC_AL_HOU_MASK
)) |
209 (tm
->tm_hour
& RTC_AL_HOU_MASK
));
210 data
[RTC_OFFSET_DOM
] = ((data
[RTC_OFFSET_DOM
] & ~(RTC_AL_DOM_MASK
)) |
211 (tm
->tm_mday
& RTC_AL_DOM_MASK
));
212 data
[RTC_OFFSET_MTH
] = ((data
[RTC_OFFSET_MTH
] & ~(RTC_AL_MTH_MASK
)) |
213 (tm
->tm_mon
& RTC_AL_MTH_MASK
));
214 data
[RTC_OFFSET_YEAR
] = ((data
[RTC_OFFSET_YEAR
] & ~(RTC_AL_YEA_MASK
)) |
215 (tm
->tm_year
& RTC_AL_YEA_MASK
));
218 ret
= regmap_bulk_write(rtc
->regmap
,
219 rtc
->addr_base
+ RTC_AL_SEC
,
220 data
, RTC_OFFSET_COUNT
);
223 ret
= regmap_write(rtc
->regmap
, rtc
->addr_base
+ RTC_AL_MASK
,
227 ret
= regmap_update_bits(rtc
->regmap
,
228 rtc
->addr_base
+ RTC_IRQ_EN
,
229 RTC_IRQ_EN_ONESHOT_AL
,
230 RTC_IRQ_EN_ONESHOT_AL
);
234 ret
= regmap_update_bits(rtc
->regmap
,
235 rtc
->addr_base
+ RTC_IRQ_EN
,
236 RTC_IRQ_EN_ONESHOT_AL
, 0);
241 /* All alarm time register write to hardware after calling
242 * mtk_rtc_write_trigger. This can avoid race condition if alarm
243 * occur happen during writing alarm time register.
245 ret
= mtk_rtc_write_trigger(rtc
);
247 mutex_unlock(&rtc
->lock
);
251 static const struct rtc_class_ops mtk_rtc_ops
= {
252 .read_time
= mtk_rtc_read_time
,
253 .set_time
= mtk_rtc_set_time
,
254 .read_alarm
= mtk_rtc_read_alarm
,
255 .set_alarm
= mtk_rtc_set_alarm
,
258 static int mtk_rtc_probe(struct platform_device
*pdev
)
260 struct resource
*res
;
261 struct mt6397_chip
*mt6397_chip
= dev_get_drvdata(pdev
->dev
.parent
);
262 struct mt6397_rtc
*rtc
;
265 rtc
= devm_kzalloc(&pdev
->dev
, sizeof(struct mt6397_rtc
), GFP_KERNEL
);
269 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
270 rtc
->addr_base
= res
->start
;
272 rtc
->irq
= platform_get_irq(pdev
, 0);
276 rtc
->regmap
= mt6397_chip
->regmap
;
277 mutex_init(&rtc
->lock
);
279 platform_set_drvdata(pdev
, rtc
);
281 rtc
->rtc_dev
= devm_rtc_allocate_device(&pdev
->dev
);
282 if (IS_ERR(rtc
->rtc_dev
))
283 return PTR_ERR(rtc
->rtc_dev
);
285 ret
= devm_request_threaded_irq(&pdev
->dev
, rtc
->irq
, NULL
,
286 mtk_rtc_irq_handler_thread
,
287 IRQF_ONESHOT
| IRQF_TRIGGER_HIGH
,
291 dev_err(&pdev
->dev
, "Failed to request alarm IRQ: %d: %d\n",
296 device_init_wakeup(&pdev
->dev
, 1);
298 rtc
->rtc_dev
->ops
= &mtk_rtc_ops
;
300 ret
= rtc_register_device(rtc
->rtc_dev
);
307 free_irq(rtc
->irq
, rtc
);
311 #ifdef CONFIG_PM_SLEEP
312 static int mt6397_rtc_suspend(struct device
*dev
)
314 struct mt6397_rtc
*rtc
= dev_get_drvdata(dev
);
316 if (device_may_wakeup(dev
))
317 enable_irq_wake(rtc
->irq
);
322 static int mt6397_rtc_resume(struct device
*dev
)
324 struct mt6397_rtc
*rtc
= dev_get_drvdata(dev
);
326 if (device_may_wakeup(dev
))
327 disable_irq_wake(rtc
->irq
);
333 static SIMPLE_DEV_PM_OPS(mt6397_pm_ops
, mt6397_rtc_suspend
,
336 static const struct of_device_id mt6397_rtc_of_match
[] = {
337 { .compatible
= "mediatek,mt6323-rtc", },
338 { .compatible
= "mediatek,mt6397-rtc", },
341 MODULE_DEVICE_TABLE(of
, mt6397_rtc_of_match
);
343 static struct platform_driver mtk_rtc_driver
= {
345 .name
= "mt6397-rtc",
346 .of_match_table
= mt6397_rtc_of_match
,
347 .pm
= &mt6397_pm_ops
,
349 .probe
= mtk_rtc_probe
,
352 module_platform_driver(mtk_rtc_driver
);
354 MODULE_LICENSE("GPL v2");
355 MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
356 MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");